Patents by Inventor Takahiro Yamaura

Takahiro Yamaura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220197841
    Abstract: A communication control device according to an embodiment includes one or more hardware processors functioning as a transmission control unit and a communication unit. The transmission control unit performs control of transmission of messages by opening and closing a gate based on transmission permission information. The transmission permission information is generated based on gate control information including a plurality of entries for determining whether to open a plurality of gates corresponding to a plurality of queues. The transmission permission information indicates an amount of transmittable messages in a period corresponding to one or more continuous entries. The communication unit transmits and receives messages in accordance with the control of the transmission control unit.
    Type: Application
    Filed: August 30, 2021
    Publication date: June 23, 2022
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Takahiro YAMAURA, Yasin OGE
  • Patent number: 11336725
    Abstract: According to an embodiment, a communication apparatus includes a plurality of virtual machines, a storage unit, a transfer unit, and a descriptor output unit. The storage unit includes a multicast storage area specified for each multicast group and storing a multicast frame addressed to virtual machines belonging to a multicast group. The transfer unit writes the multicast frame into a multicast transfer virtual storage area mapped to the multicast storage area. The descriptor output unit outputs a descriptor of the multicast frame to the virtual machines belonging to the multicast group. The virtual machine includes a descriptor receiving unit and a reading unit. The descriptor receiving unit receives the descriptor. When the descriptor is received by the descriptor receiving unit, the reading unit reads the multicast frame from the multicast storage area specified based on the descriptor.
    Type: Grant
    Filed: August 27, 2020
    Date of Patent: May 17, 2022
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Yuta Kobayashi, Takahiro Yamaura, Masashi Ito, Yasin Oge
  • Publication number: 20220150058
    Abstract: According to an embodiment, a forwarding device, which is connected to a key management server device configured to generate a decryption key by using quantum key distribution, includes a memory and one or more processors coupled to the memory. The one or more processors are configured to: receive a reception packet; decrypt the reception packet when the reception packet is a decryption target packet; and forward the decrypted reception packet or the undecrypted reception packet.
    Type: Application
    Filed: August 30, 2021
    Publication date: May 12, 2022
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Yasuyuki TANAKA, Takahiro Yamaura
  • Publication number: 20220150059
    Abstract: According to an embodiment, a forwarding device, which is connected to a key management server device configured to generate a decryption key by using quantum key distribution, includes a memory and one or more processors coupled to the memory. The one or more processors are configured to: receive information specifying a decryption target packet from a mobile phone network management server device; receive a reception packet; decrypt the reception packet when the reception packet is the decryption target packet specified from the mobile phone network management server device; and forward the decrypted reception packet or the undecrypted reception packet.
    Type: Application
    Filed: August 31, 2021
    Publication date: May 12, 2022
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Yasuyuki TANAKA, Takahiro YAMAURA, Yoshimichi TANIZAWA
  • Publication number: 20210377181
    Abstract: A communication system according an embodiment includes one or more hardware processors. The one or more hardware processors calculate indicators used to detect presence of abnormality caused by a situation in which a size of a message is larger than a maximum allowable size of a queue, the indicators being calculated based on gate control information including a plurality of entries each of which indicates gate states corresponding to a plurality of queues.
    Type: Application
    Filed: February 24, 2021
    Publication date: December 2, 2021
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Yasin OGE, Takahiro YAMAURA, Yuta KOBAYASHI, Masashi ITO
  • Publication number: 20210377189
    Abstract: A communication control device according to an embodiment includes one or more hardware processors. The one or more hardware processors are configured to: perform control of transmission of messages by opening and closing a gate based on transmission permission information, the transmission permission information being generated based on gate control information including a plurality of entries for determining whether to open a plurality of gates corresponding to a plurality of queues, the transmission permission information indicating a time permitted to transmit messages in a period corresponding to one or more continuous entries or indicating an amount of transmittable messages in the period; and transmit and receive messages in accordance with the control.
    Type: Application
    Filed: February 25, 2021
    Publication date: December 2, 2021
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Takahiro YAMAURA, Yasin OGE, Yuta KOBAYASHI
  • Patent number: 11188399
    Abstract: According to an embodiment, a notification control device includes a memory and one or more hardware processors configured to function as a determination unit and a notification unit. The determination unit is configured to determine, using notification control information set according to a priority of a frame, whether to notify of completion notification indicating completion of processing of the frame. The notification unit is configured to notify the completion notification when it is determined to notify of the completion notification.
    Type: Grant
    Filed: March 5, 2018
    Date of Patent: November 30, 2021
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Takahiro Yamaura
  • Patent number: 11150815
    Abstract: According to an embodiment, an information processing apparatus includes a non-volatile memory manager. The non-volatile memory manager is configured to save, in a non-volatile memory section, information of a plurality of storage sections to be read after rebooting. The non-volatile memory section is configured to keep storing information even if power is off.
    Type: Grant
    Filed: December 11, 2019
    Date of Patent: October 19, 2021
    Assignee: Toshiba Memory Corporation
    Inventors: Takahiro Yamaura, Shingo Tanaka
  • Patent number: 11096087
    Abstract: According to one embodiment, a control device includes one or more processors. The one or more processors receive a message. The one or more processors determine whether the received message has been replicated and transmitted. The one or more processors instruct recording of difference information between a message before replication and the received message when it is determined that the received message has been replicated and transmitted.
    Type: Grant
    Filed: September 10, 2018
    Date of Patent: August 17, 2021
    Assignee: Toshiba Memory Corporation
    Inventors: Takahiro Yamaura, Masataka Goto
  • Patent number: 11032208
    Abstract: According to an embodiment, an information processing apparatus includes one or more processors. The processors prefetch a scheduling entry corresponding a future time period in advance from scheduling information including one or more scheduling entries, each entry of which contains a transmission state and an interval for each of one or more transmission queues. The processors determine a starting time of transmission for one or more frames waiting for transmission in each queue, based on the scheduling entry. At least one of timing of the prefetching process and timing of the scheduling process is determined based on a result of comparison of a time difference and one or more thresholds. The time difference is a difference between current time and future time where the future time is a candidate for starting time of transmission.
    Type: Grant
    Filed: August 27, 2019
    Date of Patent: June 8, 2021
    Assignee: KABUSHIKl KAISHA TOSHIBA
    Inventors: Yasin Oge, Yuta Kobayashi, Takahiro Yamaura
  • Patent number: 11018986
    Abstract: According to an embodiment, a communication apparatus includes a memory and one or more hardware processors configured to function as a distribution unit. The memory is configured to store frame information for referring to first storage areas in each of which a frame to be transmitted or received is stored, in a plurality of second storage areas depending on priorities of frames. The distribution unit is configured to distribute and store the frame information of the frames into the plurality of second storage areas according to the priorities of the frames.
    Type: Grant
    Filed: February 12, 2018
    Date of Patent: May 25, 2021
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Takahiro Yamaura, Yuta Kobayashi
  • Publication number: 20210152635
    Abstract: According to an embodiment, a communication apparatus includes a plurality of virtual machines, a storage unit, a transfer unit, and a descriptor output unit. The storage unit includes a multicast storage area specified for each multicast group and storing a multicast frame addressed to virtual machines belonging to a multicast group. The transfer unit writes the multicast frame into a multicast transfer virtual storage area mapped to the multicast storage area. The descriptor output unit outputs a descriptor of the multicast frame to the virtual machines belonging to the multicast group. The virtual machine includes a descriptor receiving unit and a reading unit. The descriptor receiving unit receives the descriptor. When the descriptor is received by the descriptor receiving unit, the reading unit reads the multicast frame from the multicast storage area specified based on the descriptor.
    Type: Application
    Filed: August 27, 2020
    Publication date: May 20, 2021
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Yuta Kobayashi, Takahiro Yamaura, Masashi Ito, Yasin Oge
  • Publication number: 20210149603
    Abstract: According to an embodiment, a communication apparatus includes a writing unit, a transfer control unit, a descriptor receiving unit, and a reading unit. The writing unit writes a frame in a first virtual storage area. The transfer control unit controls a timing for transferring a descriptor of the frame based on schedule information. The descriptor receiving unit receives the descriptor. The reading unit that reads the frame from a second virtual storage area specified based on the descriptor when the descriptor is received by the descriptor receiving unit.
    Type: Application
    Filed: August 27, 2020
    Publication date: May 20, 2021
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Yuta KOBAYASHI, Takahiro YAMAURA, Masashi ITO, Yasin OGE
  • Publication number: 20210081235
    Abstract: According to one embodiment, a memory system includes a non-volatile memory and a memory controller. The memory controller acquires each of one or more first commands for execution from a plurality of queues storing the one or more first commands at timing based on first information. The one or more first commands include a second command from a host. The second command is a command requiring an access to the non-volatile memory for being executed. The first information serves to define, for each of the queues, a periodic temporal section in which execution of a first command is permissible.
    Type: Application
    Filed: March 6, 2020
    Publication date: March 18, 2021
    Applicant: Kioxia Corporation
    Inventors: Masataka GOTO, Takahiro YAMAURA
  • Publication number: 20210044365
    Abstract: A communication device according to an embodiment is capable of communicating with another communication device via a first network and a second network each transmitting radio signal data by different communication methods. The communication device includes: a first communicator capable of communicating with another communication device via the first network; a second communicator capable of communicating with another communication device via the second network; a delay parameter acquirer to acquire a delay parameter of the first network; and a delay parameter reflector to reflect the delay parameter of the first network acquired by the delay parameter acquirer on a delay parameter of the second network.
    Type: Application
    Filed: July 23, 2020
    Publication date: February 11, 2021
    Applicants: KABUSHIKI KAISHA TOSHIBA, TOSHIBA INFRASTRUCTURE SYSTEMS & SOLUTIONS CORPORATION
    Inventors: Kenichi OHNO, Toshihiro TANGO, Takahiro YAMAURA
  • Patent number: 10884786
    Abstract: According to an embodiment, a switch device includes a memory and one or more hardware processors coupled to the memory. The one or more hardware processors are configured to function as a selection unit and a determination unit. The selection unit, based on task schedule information synchronized with transmission schedule information where transmission timing of first data is determined for each priority of the first data, selects a first task of executing transfer processing of the first data and calculates an end time of transfer processing executed by the selected first task. The determination unit, from the end time and a current time, determines whether transfer processing of the first data is executable. The first task selected by the selection unit, when the transfer processing is executable, executes the transfer processing of the first data based on the transmission schedule information.
    Type: Grant
    Filed: February 21, 2019
    Date of Patent: January 5, 2021
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Yuta Kobayashi, Yasin Oge, Takahiro Yamaura
  • Publication number: 20200296050
    Abstract: According to an embodiment, an information processing apparatus includes one or more processors. The processors prefetch a scheduling entry corresponding a future time period in advance from scheduling information including one or more scheduling entries, each entry of which contains a transmission state and an interval for each of one or more transmission queues. The processors determine a starting time of transmission for one or more frames waiting for transmission in each queue, based on the scheduling entry. At least one of timing of the prefetching process and timing of the scheduling process is determined based on a result of comparison of a time difference and one or more thresholds. The time difference is a difference between current time and future time where the future time is a candidate for starting time of transmission.
    Type: Application
    Filed: August 27, 2019
    Publication date: September 17, 2020
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Yasin Oge, Yuta Kobayashi, Takahiro Yamaura
  • Publication number: 20200293353
    Abstract: According to an embodiment, a processing apparatus includes a memory and a processor coupled to the memory. The processor is configured to: execute data access that is at least one of data writing to the memory and data reading from the memory; receive access control information for controlling timing of the data access to be executed; and control the timing of the data access based on the received access control information.
    Type: Application
    Filed: August 28, 2019
    Publication date: September 17, 2020
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Takahiro YAMAURA, Yasin Oge, Yuta Kobayashi
  • Patent number: 10778594
    Abstract: According to an embodiment, a transfer control device controls transfer of data stored in a communication device. The transfer control device includes a memory and one or more hardware processors electrically coupled to the memory and configured to function as a control unit, and a determining unit. The control unit performs control for transferring the data to a first transmission buffer. The determining unit determines, depending on a state of the communication device, data to be restricted from being transferred. When transfer is to be restricted, the control unit delays transfer of data to be restricted from being transferred.
    Type: Grant
    Filed: August 30, 2018
    Date of Patent: September 15, 2020
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yuta Kobayashi, Yasin Oge, Takahiro Yamaura
  • Publication number: 20200163082
    Abstract: A transmission device includes a receiving unit and a transmission processing unit. The receiving unit receives transmission schedule information including a frame identifier (ID) of a frame to be transmitted and a transmission parameter relating to transmission timing of the frame. The transmission processing unit transmits a frame identified by the frame ID to a receiving device, according to the transmission parameter included in the transmission schedule information.
    Type: Application
    Filed: August 23, 2019
    Publication date: May 21, 2020
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Takahiro YAMAURA, Yasin OGE, Yuta KOBAYASHI