Abstract: A laser diode capable of independently driving each ridge section, and inhibiting rotation of a polarization angle resulting from a stress applied to the ridge section without lowering reliability and a method of manufacturing the same are provided. A laser diode includes: three or more strip-like ridge sections in parallel with each other with a strip-like trench in between, including at least a lower cladding layer, an active layer, and an upper cladding layer in this order; an upper electrode on a top face of each ridge section, being electrically connected to the upper cladding layer; a wiring layer electrically connected to the upper electrode, in the air at least over the trench; and a pad electrode in a region different from regions of both the ridge section and the trench, being electrically connected to the upper electrode through the wiring layer.

Abstract: The semiconductor device includes a nonvolatile memory, having a memory array containing 1-bit twin cells, each composed of electrically rewritable first and second storage devices, the first and second storage devices holding binary data according to difference of their threshold voltages, and having different retention characteristics depending on difference of the binary data thereof; a read circuit for differentially amplifying complementary data output from the first and second storage devices of the twin cell selected for read, and judging information stored in the twin cell; and a control circuit. Two memory cells constituting a twin cell are arranged to hold different data. Therefore, even when the retention performance of one memory cell deteriorates, the difference between data held by the two memory cells can be maintained. Hence, differential amplification of such difference enables acquisition of proper stored information.

Abstract: A laser diode capable of independently driving each ridge section, and inhibiting rotation of a polarization angle resulting from a stress applied to the ridge section without lowering reliability and a method of manufacturing the same are provided. A laser diode includes: three or more strip-like ridge sections in parallel with each other with a strip-like trench in between, including at least a lower cladding layer, an active layer, and an upper cladding layer in this order; an upper electrode on a top face of each ridge section, being electrically connected to the upper cladding layer; a wiring layer electrically connected to the upper electrode, in the air at least over the trench; and a pad electrode in a region different from regions of both the ridge section and the trench, being electrically connected to the upper electrode through the wiring layer.

Abstract: In a full CMOS SRAM having a lateral type cell (memory cell having three partitioned wells arranged side by side in a word line extending direction and longer in the word line direction than in the bit line direction) including first and second driver MOS transistors, first and second load MOS transistors and first and second access MOS transistors, two capacitors are arranged spaced apart from each other on embedded interconnections to be storage nodes, with lower and upper cell plates cross-coupled to each other.

Abstract: The semiconductor device includes a nonvolatile memory, having a memory array containing 1-bit twin cells, each composed of electrically rewritable first and second storage devices, the first and second storage devices holding binary data according to difference of their threshold voltages, and having different retention characteristics depending on difference of the binary data thereof; a read circuit for differentially amplifying complementary data output from the first and second storage devices of the twin cell selected for read, and judging information stored in the twin cell; and a control circuit. Two memory cells constituting a twin cell are arranged to hold different data. Therefore, even when the retention performance of one memory cell deteriorates, the difference between data held by the two memory cells can be maintained. Hence, differential amplification of such difference enables acquisition of proper stored information.

Abstract: The semiconductor device includes a nonvolatile memory, having a memory array containing 1-bit twin cells, each composed of electrically rewritable first and second storage devices, the first and second storage devices holding binary data according to difference of their threshold voltages, and having different retention characteristics depending on difference of the binary data thereof; a read circuit for differentially amplifying complementary data output from the first and second storage devices of the twin cell selected for read, and judging information stored in the twin cell; and a control circuit. Two memory cells constituting a twin cell are arranged to hold different data. Therefore, even when the retention performance of one memory cell deteriorates, the difference between data held by the two memory cells can be maintained. Hence, differential amplification of such difference enables acquisition of proper stored information.

Abstract: A stream data generating method for a computer system for generating stream data having time information applied thereto in a time series order and processing the generated stream data on the basis of a registered query. The computer system includes a storage for storing therein query information indicative of a plurality of sorts of constituent elements forming stream data corresponding to the query on the basis of the query and a stream definition indicative of the plurality of constituent elements, a data generator for generating and transmitting stream data; and a stream data processor for processing the stream data transmitted from the data generator. The data generator a less quantity of stream data to be transmitted to the stream data processor on the basis of the query information.

Abstract: The present invention provides a semiconductor laser device including: a plurality of light emitting sections arranged in strip shapes in parallel; a plurality of first electrodes arranged along top faces of the light emitting sections, respectively; an insulating film covering a whole surface of the plurality of first electrodes, and including contact apertures corresponding to the first electrodes, respectively; a plurality of second electrodes arranged in positions different from those of the plurality of light emitting sections, correspondingly to the first electrodes; a plurality of wiring layers arranged on the insulating layer, and electrically connecting the second electrodes and the corresponding first electrodes through the contact apertures, respectively; and a plurality of window regions arranged for the light emitting sections in the insulating film so as to expose the first electrodes, respectively, and including at least two window regions having areas different from each other.

Abstract: A laser diode includes: a plurality of strip-shaped laser structures arranged in parallel with each other, and including a lower cladding layer, an active layer, and an upper cladding layer in this order; a plurality of strip-shaped upper electrodes singly formed on a top face of the respective laser structures, and being electrically connected to the upper cladding layer; a plurality of wiring layers being at least singly and electrically connected to one of the respective upper electrodes; and a plurality of pad electrodes formed in a region different from that of the plurality of laser structures, and being electrically connected to one of the respective upper electrodes with the wiring layer in between. The respective wiring layers have an end in a region different from a region where the respective wiring layers are contacted with the upper electrode.

Abstract: In a full CMOS SRAM having a lateral type cell (memory cell having three partitioned wells arranged side by side in a word line extending direction and longer in the word line direction than in the bit line direction) including first and second driver MOS transistors, first and second load MOS transistors and first and second access MOS transistors, two capacitors are arranged spaced apart from each other on embedded interconnections to be storage nodes, with lower and upper cell plates cross-coupled to each other.

Abstract: In a full CMOS SRAM having a lateral type cell (memory cell having three partitioned wells arranged side by side in a word line extending direction and longer in the word line direction than in the bit line direction) including first and second driver MOS transistors, first and second load MOS transistors and first and second access MOS transistors, two capacitors are arranged spaced apart from each other on embedded interconnections to be storage nodes, with lower and upper cell plates cross-coupled to each other.

Abstract: There is provided a method of managing an organization of a computer system including a plurality of servers each capable of executing requested services, the services belonging to a service group defined based on data necessary for executing the services. Service groups are assigned to the plurality of servers. The method including: selecting, when a load imposed on a server exceeds a predetermined upper limit, a server of transfer destination for executing some of the services to be executed on the server having the load exceeding the upper limit; selecting at least one service group out of service groups assigned to the server having the load exceeding the upper limit; assigning the selected service group to the server of transfer destination; and transferring data necessary for executing services belonging to the selected service group from the server having the load exceeding the upper limit to the server of transfer destination.

Abstract: A laser diode capable of independently driving each ridge section, and inhibiting rotation of a polarization angle resulting from a stress applied to the ridge section without lowering reliability and a method of manufacturing the same are provided. A laser diode includes: three or more strip-like ridge sections in parallel with each other with a strip-like trench in between, including at least a lower cladding layer, an active layer, and an upper cladding layer in this order; an upper electrode on a top face of each ridge section, being electrically connected to the upper cladding layer; a wiring layer electrically connected to the upper electrode, in the air at least over the trench; and a pad electrode in a region different from regions of both the ridge section and the trench, being electrically connected to the upper electrode through the wiring layer.

Abstract: The semiconductor device includes a nonvolatile memory, having a memory array containing 1-bit twin cells, each composed of electrically rewritable first and second storage devices, the first and second storage devices holding binary data according to difference of their threshold voltages, and having different retention characteristics depending on difference of the binary data thereof; a read circuit for differentially amplifying complementary data output from the first and second storage devices of the twin cell selected for read, and judging information stored in the twin cell; and a control circuit. Two memory cells constituting a twin cell are arranged to hold different data. Therefore, even when the retention performance of one memory cell deteriorates, the difference between data held by the two memory cells can be maintained. Hence, differential amplification of such difference enables acquisition of proper stored information.

Abstract: Provided is a data processing system which includes: a first computer for receiving a processing request for a task processing, executing the processing, and holding data used therein; and a second computer for holding a duplicate of the data held in the first computer, halting the first computer if the first computer is determined to be halted, and receiving and processing the processing request. The first computer receives at least an update request as the processing request including request identification information to which unique numbers assigned to the individual processing requests in an ascending order are allocated, updates the held data, and transmits the update request including the request identification information to the second computer. The second computer stores a transmitted reference request and the update request as the processing requests, and processes the processing requests in an ascending order of the unique numbers included in the individual processing requests.

Abstract: The semiconductor device includes a nonvolatile memory, having a memory array containing 1-bit twin cells, each composed of electrically rewritable first and second storage devices, the first and second storage devices holding binary data according to difference of their threshold voltages, and having different retention characteristics depending on difference of the binary data thereof; a read circuit for differentially amplifying complementary data output from the first and second storage devices of the twin cell selected for read, and judging information stored in the twin cell; and a control circuit. Two memory cells constituting a twin cell are arranged to hold different data. Therefore, even when the retention performance of one memory cell deteriorates, the difference between data held by the two memory cells can be maintained. Hence, differential amplification of such difference enables acquisition of proper stored information.

Abstract: In a full CMOS SRAM having a lateral type cell (memory cell having three partitioned wells arranged side by side in a word line extending direction and longer in the word line direction than in the bit line direction) including first and second driver MOS transistors, first and second load MOS transistors and first and second access MOS transistors, two capacitors are arranged spaced apart from each other on embedded interconnections to be storage nodes, with lower and upper cell plates cross-coupled to each other.

Abstract: In a full CMOS SRAM having a lateral type cell (memory cell having three partitioned wells arranged side by side in a word line extending direction and longer in the word line direction than in the bit line direction) including first and second driver MOS transistors, first and second load MOS transistors and first and second access MOS transistors, two capacitors are arranged spaced apart from each other on embedded interconnections to be storage nodes, with lower and upper cell plates cross-coupled to each other.

Abstract: The semiconductor device includes a nonvolatile memory, having a memory array containing 1-bit twin cells, each composed of electrically rewritable first and second storage devices, the first and second storage devices holding binary data according to difference of their threshold voltages, and having different retention characteristics depending on difference of the binary data thereof; a read circuit for differentially amplifying complementary data output from the first and second storage devices of the twin cell selected for read, and judging information stored in the twin cell; and a control circuit. Two memory cells constituting a twin cell are arranged to hold different data. Therefore, even when the retention performance of one memory cell deteriorates, the difference between data held by the two memory cells can be maintained. Hence, differential amplification of such difference enables acquisition of proper stored information.

Abstract: In a full CMOS SRAM having a lateral type cell (memory cell having three partitioned wells arranged side by side in a word line extending direction and longer in the word line direction than in the bit line direction) including first and second driver MOS transistors, first and second load MOS transistors and first and second access MOS transistors, two capacitors are arranged spaced apart from each other on embedded interconnections to be storage nodes, with lower and upper cell plates cross-coupled to each other.