Abstract: After forming a contact hole in an insulator layer, which is formed on a substrate covering an impurity doped region, a Ti film, a TiN film (or TiON film), and an Al alloy (for example, an alloy of Al--Si--Cu) layer are sputtered (consecutively from the bottom level) for forming a wiring material layer. A wiring layer is formed by patterning the wiring material layer in accordance with a wiring pattern. Portions with a 0% coverage of the Al alloy layer are eliminated by sputtering the Al alloy layer with a substrate temperature in a range between 100.degree.and 150.degree. C.

Abstract: On an insulating film covering the surface of a semiconductor substrate, a lower wiring layer made of Al or Al alloy is formed. An insulating film having a contact hole is formed on the lower wiring layer and the substrate. An upper wiring layer made of Al or Al alloy is formed on the insulating film and connected to the lower wiring layer via the contact hole. In such a multilayered wiring structure, the size of Al grain of the lower wiring layer, at least at the surface just under the contact hole, is made smaller than the bottom size of the contact hole. With this setting, Al atoms are supplied sufficiently from the lower wiring layer to the interface between the lower and upper wiring layers, preventing wiring disconnection caused by the peeling off of the interface.

Abstract: In an IC chip having an interlevel insulation film constituted by a first level silicon oxide film, a spin-on-glass film, a second level silicon oxide film, the SOG film is partially removed in a buffer region of a closed loop shape inside of the chip periphery and surrounding the chip inner region. The second level silicon oxide film and a passivation insulation film are formed covering the SOG film and buffer region. Water contents are intercepted by the buffer region and will not reach the element region. It is therefore possible to prevent an inversion of the conductivity type at the surface of a well region in the element region or a corrosion of wiring layers, thereby improving the reliability of an IC device.

Abstract: In an IC chip having an interlevel insulation film constituted by a first level silicon oxide film, a spin-on-glass film, a second level silicon oxide film, the SOG film is partially removed in a buffer region of a closed loop shape inside of the chip periphery and surrounding the chip inner region. The second level silicon oxide film and a passivation insulation film are formed covering the SOG film and buffer region. Water contents are intercepted by the buffer region and will not reach the element region. It is therefore possible to prevent an inversion of the conductivity type at the surface of a well region in the element region or a corrosion of wiring layers, thereby improving the reliability of an IC device.

Abstract: In a multi-layer wiring structure of an integrated circuit device, occurrence of voids due to electromigration in the vicinity of an interface between upper and lower wiring layers is suppressed. The interface is cleaned in vacuum and grain size of the wiring layers is controlled. After an interlayer insulating film (16) having a connection hole (16A) is formed to cover a first wiring layer (14) of Al or an Al alloy, a second wiring layer (18) of Al or an Al alloy is formed and connected to the first wiring layer through the connection hole. When the second wiring layer is formed, grains (G.sub.2) of the second wiring layer are formed so as to be :respectively continuously adjacent to and substantially equal in size to grains (G.sub.1) of the first wiring layer which appear at the interface.

Abstract: A multi level wiring structure incorporated in a semiconductor device has a wiring layer sandwiched between insulating films and coupled to upper and lower conduction paths through contact windows formed in the insulating films, respectively, and the wiring layer is implemented by an aluminum-silicon alloy film sandwiched between upper and lower barrier films formed of a conductive substance selected from the group consisting of a refractory metal silicide, a refractory metal and a refractory metal alloy, and the barrier films are operative to prevent undesirable recrystallized silicon precipitates from direct contacting the upper and lower conduction paths, so that the wiring layer is kept well conductive with respect to the upper and lower conduction paths.