Patents by Inventor Takahito Nakajima
Takahito Nakajima has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20220401708Abstract: A medical catheter includes a multi-lumen tube including a first lumen and a second lumen; an extension tube fixed to an end surface in a longitudinal direction of the multi-lumen tube, extending from the end surface along the longitudinal direction, and including a third lumen communicating with the first lumen; and an outer wall portion extending from the multi-lumen tube along the extension tube and configured to cover a part of an outer surface of the extension tube, the outer wall portion including a pipeline formed to communicate with the second lumen and having a part of the outer surface in an inner surface of the pipeline.Type: ApplicationFiled: August 18, 2022Publication date: December 22, 2022Applicant: OLYMPUS CORPORATIONInventors: Takahito NAKAJIMA, Junichi SATO, Yasunori OKI
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Patent number: 10770341Abstract: A method for manufacturing a semiconductor device according to an embodiment includes forming a first insulating film on a semiconductor substrate, the first insulating film being patterned; forming a trench in the semiconductor substrate using the first insulating film as a mask; depositing a second insulating film in the trench and on the first insulating film; removing the second insulating film on the first insulating film using a CMP method; removing a portion of the first insulating film; removing a portion of the second insulating film using isotropic etching; and removing a remaining portion of the first insulating film.Type: GrantFiled: September 21, 2018Date of Patent: September 8, 2020Assignees: Kabushiki Kaisha Toshiba, Toshiba Electronic Devices & Storage CorporationInventors: Takahito Nakajima, Shinya Ito
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Publication number: 20190295888Abstract: A semiconductor device according to an. embodiment includes a gate electrode; a conductive layer; an insulating layer provided between the gate electrode and the conductive layer; and a contact plug that is surrounded by the insulating layer, connects the gate electrode and the conductive layer, and includes a first region and a second region, the second region being closer to the conductive layer than the first region, the width of the first region being greater than the width of the second region.Type: ApplicationFiled: September 21, 2018Publication date: September 26, 2019Inventors: Takahito Nakajima, Shinya Ito, Masaru Hatano
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Publication number: 20190295882Abstract: A method for manufacturing a semiconductor device according to an embodiment includes forming a first insulating film on a semiconductor substrate, the first insulating film being patterned; forming a trench in the semiconductor substrate using the first insulating film as a mask; depositing a second insulating film in the trench and on the first insulating film; removing the second insulating film on the first insulating film using a CMP method; removing a portion of the first insulating film; removing a portion of the second insulating film using isotropic etching; and removing a remaining portion of the first insulating film.Type: ApplicationFiled: September 21, 2018Publication date: September 26, 2019Inventors: Takahito Nakajima, Shinya Ito
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Publication number: 20150073860Abstract: According to one embodiment, a data input unit inputs data affecting progress of production, a development risk calculation unit calculates development risks related to development time of the production based on results of classification of the data, a production capability calculation unit calculates production capabilities by process based on results of analysis of the data, and an expected value calculation unit calculates expected values of production volume by process based on the development risks and the production capabilities.Type: ApplicationFiled: August 15, 2014Publication date: March 12, 2015Applicant: Kabushiki Kaisha ToshibaInventors: Masato KIMOTO, Yasunori TAKASE, Michio ITO, Noboru HODAMA, Takahito NAKAJIMA
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Patent number: 8816204Abstract: A wire connecting method and a wiring harness that allows one to utilize a single terminal for multiple core wires having various diameters thereby reducing the number and different types of terminals. The wire connecting method allows the larger wire cores first to be ultrasonic pressed such that the diameter of the larger core wires are reduced to sizes that are small enough to utilize the single terminal used on smaller core wires.Type: GrantFiled: April 8, 2011Date of Patent: August 26, 2014Assignee: Yazaki CorporationInventors: Tsutomu Takayama, Hiroshi Kobayashi, Saori Muramatsu, Shinya Kai, Takahito Nakajima
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Patent number: 8513140Abstract: A post-dry etching cleaning liquid composition for cleaning a substrate after dry etching is provided, the cleaning liquid composition containing at least one type of fluorine compound, glyoxylic acid, at least one type of organic acid salt, and water. With regard to the fluorine compound, ammonium fluoride may be used. With regard to the organic acid salt, at least one of ammonium oxalate, ammonium tartarate, ammonium citrate, and ammonium acetate may be used.Type: GrantFiled: September 23, 2010Date of Patent: August 20, 2013Assignees: Sony Corporation, Kabushiki Kaisha Toshiba, Kanto Kagaku Kabushiki KaishaInventors: Masafumi Muramatsu, Kazumi Asada, Yukino Hagino, Atsushi Okuyama, Takahito Nakajima, Kazuhiko Takase, Yoshihiro Uozumi, Tsuyoshi Matsumura, Takuo Ohwada, Norio Ishikawa
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Publication number: 20130025935Abstract: [Technical Problem]An object of the present invention is to provide a wire connecting method and a wiring harness allowed to reduce the number of types of terminals for reducing cost by increasing the number of core wire sizes able to be crimped or press-connected with respect to one terminal. [Solution to Problem]Regarding covered wires 13, 14 of which core wire diameter is larger than the core wire diameter allowed to be crimped with a wire barrel 18, an ultrasonic processing in which while pressure is applied to a core wire 16, ultrasonic energy is applied to the core wire 16 is performed. Thereby, the core wire diameter is reduced to be allowed to be crimped to the wire barrel 18, and the core wire 16 of the covered wire 13, 14 is crimped or press-connected between a pair of crimping pieces 18B of the terminal 15.Type: ApplicationFiled: April 8, 2011Publication date: January 31, 2013Applicant: YAZAKI CORPORATIONInventors: Tsutomu Takayama, Hiroshi Kobayashi, Saori Muramatsu, Shinya Kai, Takahito Nakajima
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Publication number: 20120149208Abstract: According to one embodiment, a substrate processing apparatus includes a substrate support unit configured to support a substrate by fixing the substrate from a back surface side of a surface to be processed; and a substrate processing unit in which a pad into which a predetermined liquid is soaked is arranged and which performs a substrate process on the surface to be processed of the substrate with the liquid. The surface to be processed of the substrate is brought into contact with the liquid on the pad surface by bringing the surface to be processed of the substrate close to a side of the pad, without rotating the substrate and the pad, to perform a substrate process.Type: ApplicationFiled: September 21, 2011Publication date: June 14, 2012Applicant: KABUSHIKI KAISHA TOSHIBAInventor: Takahito NAKAJIMA
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Patent number: 8058139Abstract: A polysilazane perhydride solution, prepared by dispensing polysilazane perhydride in a solvent containing carbon, is applied on a semiconductor substrate (1), thereby forming a coated film (6), which is heated, volatilizing solvent therein, thereby forming a polysilazane film (7), which is chemical-treated, so the polysilazane film (7) is changed to a silicon dioxide film (8).Type: GrantFiled: February 25, 2009Date of Patent: November 15, 2011Assignee: Kabushiki Kaisha ToshibaInventors: Katsuhiro Sato, Takahito Nakajima
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Publication number: 20110014793Abstract: A post-dry etching cleaning liquid composition for cleaning a substrate after dry etching is provided, the cleaning liquid composition containing at least one type of fluorine compound, glyoxylic acid, at least one type of organic acid salt, and water. With regard to the fluorine compound, ammonium fluoride may be used. With regard to the organic acid salt, at least one of ammonium oxalate, ammonium tartarate, ammonium citrate, and ammonium acetate may be used.Type: ApplicationFiled: September 23, 2010Publication date: January 20, 2011Inventors: Masafumi Muramatsu, Kazumi Asada, Yukino Hagino, Atsushi Okuyama, Takahito Nakajima, Kazuhiko Takase, Yoshihiro Uozumi, Tsuyoshi Matsumura, Takuo Ohwada, Norio Ishikawa
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Publication number: 20090286391Abstract: According to one aspect of the invention, there is provided a qsemiconductor device fabrication method having: forming a film on a semiconductor substrate; forming a mask comprising a predetermined pattern on the film; etching one of the film and the semiconductor substrate by using the mask; and performing at least one of the steps of performing a treatment using one of an aqueous solution of at least one of ammonia and amine, the amine being selected from primary amine, secondary amine, tertiary amine, and quaternary amine, a treatment using a liquid chemical containing fluorine and at least one of amine, the amine being selected from primary amine, secondary amine, tertiary amine, and quaternary amine and fluorine, and a treatment using a liquid chemical containing at least ammonia and fluorine and including a pH of not less than 6, particularly, not less than 9.Type: ApplicationFiled: July 27, 2009Publication date: November 19, 2009Inventors: Takahito Nakajima, Yoshihiro Uozumi, Mikie Miyasato, Tsuyoshi Matsumura, Yasuhito Yoshimizu, Hiroshi Tomita, Hiroki Sakurai
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Publication number: 20090215241Abstract: A polysilazane perhydride solution, prepared by dispesing polysilazane perhydride in a solvent containing carbon, is applied on a semiconductor substrate (1), thereby forming a coated film (6), which is heated, volatilizing solvent therein, thereby forming a polysilazane film (7), which is chemical-treated, so the polysilazane film (7) is changed to a silicon dioxide film (8).Type: ApplicationFiled: February 25, 2009Publication date: August 27, 2009Applicant: Kabushiki Kaisha ToshibaInventors: Katsuhiro SATO, Takahito Nakajima
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Publication number: 20080188085Abstract: A post-dry etching cleaning liquid composition for cleaning a substrate after dry etching is provided, the cleaning liquid composition containing at least one type of fluorine compound, glyoxylic acid, at least one type of organic acid salt, and water. With regard to the fluorine compound, ammonium fluoride may be used. With regard to the organic acid salt, at least one of ammonium oxalate, ammonium tartarate, ammonium citrate, and ammonium acetate may be used.Type: ApplicationFiled: March 11, 2008Publication date: August 7, 2008Inventors: Masafumi Muramatsu, Kazumi Asada, Yukino Hagino, Atsushi Okuyama, Takahito Nakajima, Kazuhiko Takase, Yoshihiro Uozumi, Tsuyoshi Matsumura, Takuo Ohwada, Norio Ishikawa
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Patent number: 7345352Abstract: An insulating tube includes a underlying insulating film, a first sidewall insulating film disposed on the underlying insulating film, a second sidewall insulating film disposed on the underlying insulating film, opposite to the first sidewall insulating film so as to provide a cavity between the first and second sidewall insulating films having the same height as the first sidewall insulating film, and an upper insulating film provided over the first and second sidewall insulating films.Type: GrantFiled: March 9, 2007Date of Patent: March 18, 2008Assignee: Kabushiki Kaisha ToshibaInventors: Tsuyoshi Matsumura, Takahito Nakajima, Hiroshi Kawamoto, Mikie Miyasato, Yoshihiro Uozumi
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Publication number: 20080014697Abstract: A semiconductor device including a semiconductor substrate a trench forming in the substrate, an insulating film forming on an inner surface of the trench so as to be rendered thicker from a substrate surface side thereof toward a trench deep side thereof, and an electrode layer forming inside the insulating film forming inside the trench so as to extend from a trench deep part side toward the surface side of the substrate. The substrate surface side of the insulating film functions as a collar insulating film retaining an insulation performance between the electrode layer and the semiconductor substrate, and the trench deep side of the insulating film functions as a capacitor insulating film composing a capacitor of a DRAM cell.Type: ApplicationFiled: July 16, 2007Publication date: January 17, 2008Applicant: KABUSHIKI KAISHA TOSHIBAInventors: Takeo FURUHATA, Takahito Nakajima
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Patent number: 7282437Abstract: An insulating tube includes a underlying insulating film, a first sidewall insulating film disposed on the underlying insulating film, a second sidewall insulating film disposed on the underlying insulating film, opposite to the first sidewall insulating film so as to provide a cavity between the first and second sidewall insulating films having the same height as the first sidewall insulating film, and an upper insulating film provided over the first and second sidewall insulating films.Type: GrantFiled: October 6, 2005Date of Patent: October 16, 2007Assignee: Kabushiki Kaisha ToshibaInventors: Tsuyoshi Matsumura, Takahito Nakajima, Hiroshi Kawamoto, Mikie Miyasato, Yoshihiro Uozumi
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Patent number: 7265020Abstract: A method of manufacturing a semiconductor device includes forming a trench in a semiconductor substrate, isotropically forming a trench surface insulating film on an inner surface of the trench, the trench surface insulating film including a deep part functioning as a capacitor insulating film, forming a surface layer side insulating film on the inner surface of the trench so that the surface layer side insulating film is continuously rendered thinner from the surface side of the substrate toward the deep side of the trench, and forming an electrode layer inside the surface layer side insulating film and the trench surface insulating film both formed on the inner surface of the trench.Type: GrantFiled: September 27, 2005Date of Patent: September 4, 2007Assignee: Kabushiki Kaisha ToshibaInventors: Takeo Furuhata, Takahito Nakajima
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Publication number: 20070170594Abstract: An insulating tube includes a underlying insulating film, a first sidewall insulating film disposed on the underlying insulating film, a second sidewall insulating film disposed on the underlying insulating film, opposite to the first sidewall insulating film so as to provide a cavity between the first and second sidewall insulating films having the same height as the first sidewall insulating film, and an upper insulating film provided over the first and second sidewall insulating films.Type: ApplicationFiled: March 9, 2007Publication date: July 26, 2007Applicant: Kabushiki Kaisha ToshibaInventors: Tsuyoshi Matsumura, Takahito Nakajima, Hiroshi Kawamoto, Mikie Miyasato, Yoshihiro Uozumi
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Publication number: 20070054482Abstract: According to one aspect of the invention, there is provided a semiconductor device fabrication method having: forming a film on a semiconductor substrate; forming a mask comprising a predetermined pattern on the film; etching one of the film and the semiconductor substrate by using the mask; and performing at least one of the steps of performing a treatment using one of an aqueous solution of at least one of ammonia and amine, the amine being selected from primary amine, secondary amine, tertiary amine, and quaternary amine, a treatment using a liquid chemical containing fluorine and at least one of amine, the amine being selected from primary amine, secondary amine, tertiary amine, and quaternary amine and fluorine, and a treatment using a liquid chemical containing at least ammonia and fluorine and including a pH of not less than 6, particularly, not less than 9.Type: ApplicationFiled: August 9, 2006Publication date: March 8, 2007Inventors: Takahito Nakajima, Yoshihiro Uozumi, Mikie Miyasato, Tsuyoshi Matsumura, Yasuhito Yoshimizu, Hiroshi Tomita, Hiroki Sakurai