Patents by Inventor Takakazu Fukano

Takakazu Fukano has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20020112878
    Abstract: Circuit board 10 is of substantially rectangular shape, provided in the upper half of the juxtaposed face 13 with a substantially circular test terminal 20. In the lower half are provided a plurality of substantially rectangular terminals 21-27, arrayed in two rows, i.e., an upper and lower row, the upper row containing an I/O terminal 21 for data input/output, a power supply terminal 22 for supplying power, and a chip select terminal 23 for input of a chip select signal CS. The lower row of juxtaposed face 13 contains a ground terminal 24, a read/write terminal 25 for inputting read/write control signals W/R, a clock terminal 26 for inputting a clock signal CLK, and a ground terminal 27.
    Type: Application
    Filed: December 19, 2001
    Publication date: August 22, 2002
    Inventors: Taku Ishizawa, Takakazu Fukano, Toshihisa Saruta
  • Publication number: 20020070992
    Abstract: A print head includes rows of plural nozzles, from which ink drops are ejected. A plurality of driving elements are respectively associated with each nozzle. A plurality of switching circuits are respectively associated with each row of nozzles. Each switching circuit is provided with a plurality of switching elements, respectively associated with each driving elements. Each switching element supplies a signal to drive an associated driving element. Each of a plurality of detectors detects a condition of associated nozzles and outputting a detecting signal in accordance with the detected condition. A controller drives the print head based on the detecting signals. At least one signal line transmits the detecting signals to the controller in a time sequence manner. The number of the signal line is less than the number of the detectors.
    Type: Application
    Filed: November 28, 2001
    Publication date: June 13, 2002
    Applicant: SEIKO EPSON CORPORATION
    Inventor: Takakazu Fukano
  • Patent number: 5099383
    Abstract: A print head activation circuit for a wire dot printer includes a first switch and a second switch. A CPU produces a printing timing control signal. A first driving signal-generating circuit produces a first driving signal pulse having a pulse width T.sub.1 in response to the printing timing control signal. A delay circuit delays the first driving signal. A second driving signal-generating means produces a second driving signal pulse having a pulse width T.sub.2 in response to the leading edge of the delayed first driving signal. The first switching means is connected with a DC power supply. The first switching means is also connected with one terminal of each actuator coil of the print head. The second switching means is connected between a second terminal of the actuator coil and ground. The second driving signal-generating means is operated in response to the delayed first driving signal. The delay time .DELTA.
    Type: Grant
    Filed: January 26, 1990
    Date of Patent: March 24, 1992
    Assignee: Seiko Epson Corporation
    Inventors: Takakazu Fukano, Katsuhiko Nishizawa