Patents by Inventor Takako Motai
Takako Motai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20160079382Abstract: A semiconductor device includes a semiconductor layer, a gate insulation film on the semiconductor layer, and a gate electrode on the gate insulation film. The gate electrode includes a first metal compound layer with a first element also contained in the gate insulation film. A first metal layer is on the first metal compound layer, wherein the diffusion coefficient thereof in gold is smaller than the diffusion coefficient thereof in nickel. The first metal layer includes a second element also contained in the first metal compound layer. A gold layer is on the first metal layer. A second metal layer is on the gold layer. Third metal layers are on side surfaces of the gold layer. A source and drain electrode are provided. An interlayer insulation film is on the gate electrode.Type: ApplicationFiled: March 2, 2015Publication date: March 17, 2016Inventors: Masaaki OGAWA, Takako MOTAI
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Publication number: 20150262819Abstract: According to one embodiment, a semiconductor device includes a first semiconductor layer, a first electrode provided on the first semiconductor layer, and a second electrode provided on the first semiconductor layer. The second electrode is apart from the first electrode in a second direction crossing a first direction from the first semiconductor layer toward the first electrode. The first electrode includes a first electrode layer and a second electrode layer. The first electrode layer includes a first metal. The second electrode layer is provided between the first electrode layer and the first semiconductor layer, and includes a second metal. The second metal has a melting point lower than a melting point of the first metal. A distance along the second direction between the first electrode layer and the second electrode is shorter than a distance along the second direction between the second electrode layer and the second electrode.Type: ApplicationFiled: September 3, 2014Publication date: September 17, 2015Inventor: Takako Motai
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Publication number: 20150263152Abstract: A semiconductor device includes a GaN-based semiconductor layer, a source electrode on the GaN-based semiconductor layer, a drain electrode on the GaN-based semiconductor layer, and a gate electrode formed on the GaN-based semiconductor layer between the source electrode and the drain electrode. A first layer is in contact with the GaN-based semiconductor layer between the gate electrode and the drain electrode.Type: ApplicationFiled: August 29, 2014Publication date: September 17, 2015Inventors: Takaaki YASUMOTO, Naoko YANASE, Kazuhide ABE, Takeshi UCHIHARA, Yasunobu SAITO, Toshiyuki NAKA, Akira YOSHIOKA, Tasuku ONO, Tetsuya OHNO, Hidetoshi FUJIMOTO, Shingo MASUKO, Masaru FURUKAWA, Yasunari YAGI, Miki YUMOTO, Atsuko IIDA, Yukako MURAKAMI, Takako MOTAI
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Publication number: 20150255559Abstract: According to one embodiment, a semiconductor device includes a first semiconductor layer and a first electrode. The first semiconductor layer includes a nitride semiconductor including a first metal. The first electrode is provided in contact with the first semiconductor layer. The first electrode includes a first region, a second region and a third region. The first region includes a compound of the first metal and a second metal or an alloy of the first metal and the second metal. The second metal has reducing properties for the first semiconductor layer. The second region is provided between the first semiconductor layer and the first region and includes the first metal and the second metal. The third region is provided between the first semiconductor layer and the second region and includes a compound of the first metal and nitrogen.Type: ApplicationFiled: September 3, 2014Publication date: September 10, 2015Inventors: Takako Motai, Mahadevaiah Gopal
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Publication number: 20150091062Abstract: According to one embodiment, a semiconductor element includes a first semiconductor layer, a second semiconductor layer, a first electrode, a second electrode, a control electrode, a pad unit, an insulating layer, and a conductor. The second semiconductor layer is provided on the first semiconductor layer. The first electrode is provided on the second semiconductor layer. The second electrode is provided on the second semiconductor layer. The control electrode is provided on the second semiconductor layer. The pad unit is provided on the second semiconductor layer. The pad unit is electrically connected to the control electrode. The insulating layer is provided on the second semiconductor layer. The insulating layer has an opening. The conductor is provided on the insulating layer. The conductor covers at least a part of the opening.Type: ApplicationFiled: September 3, 2014Publication date: April 2, 2015Inventor: Takako Motai
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Patent number: 7443270Abstract: A film bulk acoustic resonator includes a substrate having a cavity at a surface of the substrate; a bottom electrode provided on the surface of the substrate so as to extend over the cavity; a piezoelectric film disposed on the bottom electrode; a top electrode disposed on the piezoelectric film so as to face the bottom electrode and extending over the surface of the substrate; and a seal member configured to seal a capacitor defined by the bottom electrode, the piezoelectric film and the top electrode, and to provide an opening portion of the cavity outside the seal member at the surface of the substrate.Type: GrantFiled: July 17, 2006Date of Patent: October 28, 2008Assignee: Kabushiki Kaisha ToshibaInventor: Takako Motai
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Patent number: 7321183Abstract: A film bulk acoustic resonator, includes first to fourth insulator patterns disposed apart from each other. The third and fourth insulator patterns are disposed opposite the second and first insulator patterns in relation to the first and second insulating patterns, respectively. A bottom conductive layer is disposed above the first and third insulator patterns spreading from a region between the first and second insulator patterns to the third insulator pattern. A piezoelectric film is provided on the bottom conductive layer, disposed above the region between the first and second insulating patterns. A top conductive layer is facing the bottom conductive layer so as to sandwich the piezoelectric film, spreading from the region between the first and second insulator patterns to the fourth insulator pattern.Type: GrantFiled: July 15, 2004Date of Patent: January 22, 2008Assignee: Kabushiki Kaisha ToshibaInventors: Yasuo Ebuchi, Takako Motai, Kenya Sano
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Patent number: 7268647Abstract: A film bulk acoustic-wave resonator having, a substrate having a cavity, the substrate being formed of one of semi-insulating material and high-resistivity material, a bottom electrode partially fixed to the substrate, part of the bottom electrode is mechanically suspended above the cavity, a piezoelectric layer disposed on the bottom electrode, the shape of the piezoelectric layer is defined by a contour, a top electrode on the piezoelectric layer, a semiconductor intermediate electrode buried at and in a surface of the substrate, being located at the contour of the piezoelectric layer, the semiconductor region having a lower resistivity than the substrate, the intermediate electrode is connected to the bottom electrode in the inside of the contour, and a bottom electrode wiring connected to the semiconductor intermediate electrode extending from the contour to an outside of the contour in the plan view.Type: GrantFiled: January 23, 2007Date of Patent: September 11, 2007Assignee: Kabushiki Kaisha ToshibaInventors: Kenya Sano, Naoko Yanase, Kazuhiko Itaya, Takaaki Yasumoto, Ryoichi Ohara, Takashi Kawakubo, Takako Motai
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Publication number: 20070115078Abstract: A film bulk acoustic-wave resonator having, a substrate having a cavity, the substrate being formed of one of semi-insulating material and high-resistivity material, a bottom electrode partially fixed to the substrate, part of the bottom electrode is mechanically suspended above the cavity, a piezoelectric layer disposed on the bottom electrode, the shape of the piezoelectric layer is defined by a contour, a top electrode on the piezoelectric layer, a semiconductor intermediate electrode buried at and in a surface of the substrate, being located at the contour of the piezoelectric layer, the semiconductor region having a lower resistivity than the substrate, the intermediate electrode is connected to the bottom electrode in the inside of the contour, and a bottom electrode wiring connected to the semiconductor intermediate electrode extending from the contour to an outside of the contour in the plan view.Type: ApplicationFiled: January 23, 2007Publication date: May 24, 2007Applicant: Kabushiki Kaisha ToshibaInventors: Kenya Sano, Naoko Yanase, Kazuhiko Itaya, Takaaki Yasumoto, Ryoichi Ohara, Takashi Kawakubo, Takako Motai
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Publication number: 20070057599Abstract: A film bulk acoustic resonator includes a substrate having a through hole which is defined by an opening on a bottom surface of the substrate opposed to a top surface thereof. A width of the opening is larger than that at the top surface. A bottom electrode is provided above the through hole and extended over the top surface. A piezoelectric film is disposed on the bottom electrode. A top electrode is disposed on the piezoelectric film so as to face the bottom electrode. A sealing plate is inserted from the bottom surface into the through hole so as to seal the opening.Type: ApplicationFiled: May 9, 2006Publication date: March 15, 2007Applicant: KABUSHIKI KAISHA TOSHIBAInventors: Takako Motai, Hironobu Shibata
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Patent number: 7187253Abstract: A film bulk acoustic-wave resonator encompasses (a) a substrate having a cavity, (b) a bottom electrode partially fixed to the substrate, part of the bottom electrode is mechanically suspended above the cavity, (c) a piezoelectric layer disposed on the bottom electrode, a planar shape of the piezoelectric layer is defined by a contour, which covers an entire surface of the bottom electrode in a plan view, (d) a top electrode on the piezoelectric layer, (e) an intermediate electrode located between the substrate and the piezoelectric layer, and at the contour of the piezoelectric layer, the intermediate electrode is connected to the bottom electrode in the inside of the contour, and (f) a bottom electrode wiring connected to the intermediate electrode extending from the contour to an outside of the contour in the plan view, wherein a longitudinal vibration mode along a thickness direction of the piezoelectric layer is utilized.Type: GrantFiled: April 19, 2005Date of Patent: March 6, 2007Assignee: Kabushiki Kaisha ToshibaInventors: Kenya Sano, Naoko Yanase, Kazuhiko Itaya, Takaaki Yasumoto, Ryoichi Ohara, Takashi Kawakubo, Takako Motai
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Publication number: 20070024395Abstract: A film bulk acoustic resonator includes a substrate having a cavity at a surface of the substrate; a bottom electrode provided on the surface of the substrate so as to extend over the cavity; a piezoelectric film disposed on the bottom electrode; a top electrode disposed on the piezoelectric film so as to face the bottom electrode and extending over the surface of the substrate; and a seal member configured to seal a capacitor defined by the bottom electrode, the piezoelectric film and the top electrode, and to provide an opening portion of the cavity outside the seal member at the surface of the substrate.Type: ApplicationFiled: July 17, 2006Publication date: February 1, 2007Applicant: KABUSHIKI KAISHA TOSHIBAInventor: Takako Motai
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Publication number: 20060006458Abstract: A semiconductor device comprises a semiconductor substrate. A plurality of first semiconductor regions are formed in a single crystal semiconductor layer of a first conduction type disposed on a surface of the semiconductor substrate as defined by a plurality of trenches provided in the single crystal semiconductor layer. A plurality of insulating regions are respectively formed on bottoms in the trenches. A plurality of second semiconductor regions are formed of a single crystal semiconductor layer of a second conduction type buried in the trenches in the presence of the insulating regions formed therein. The first semiconductor regions and second semiconductor regions are arranged alternately in a direction parallel to the surface of the semiconductor substrate.Type: ApplicationFiled: June 7, 2005Publication date: January 12, 2006Applicant: KABUSHIKI KAISHA TOSHIBAInventors: Takako Motai, Tetsuo Matsuda
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Publication number: 20050237132Abstract: A film bulk acoustic-wave resonator encompasses (a) a substrate having a cavity, (b) a bottom electrode partially fixed to the substrate, part of the bottom electrode is mechanically suspended above the cavity, (c) a piezoelectric layer disposed on the bottom electrode, a planar shape of the piezoelectric layer is defined by a contour, which covers an entire surface of the bottom electrode in a plan view, (d) a top electrode on the piezoelectric layer, (e) an intermediate electrode located between the substrate and the piezoelectric layer, and at the contour of the piezoelectric layer, the intermediate electrode is connected to the bottom electrode in the inside of the contour, and (f) a bottom electrode wiring connected to the intermediate electrode extending from the contour to an outside of the contour in the plan view, wherein a longitudinal vibration mode along a thickness direction of the piezoelectric layer is utilized.Type: ApplicationFiled: April 19, 2005Publication date: October 27, 2005Applicant: Kabushiki Kaisha ToshibaInventors: Kenya Sano, Naoko Yanase, Kazuhiko Itaya, Takaaki Yasumoto, Ryoichi Ohara, Takashi Kawakubo, Takako Motai
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Publication number: 20050142888Abstract: A film bulk acoustic resonator, includes first to fourth insulator patterns disposed apart from each other. The third and fourth insulator patterns are disposed opposite the second and first insulator patterns in relation to the first and second insulating patterns, respectively. A bottom conductive layer is disposed above the first and third insulator patterns spreading from a region between the first and second insulator patterns to the third insulator pattern. A piezoelectric film is provided on the bottom conductive layer, disposed above the region between the first and second insulating patterns. A top conductive layer is facing the bottom conductive layer so as to sandwich the piezoelectric film, spreading from the region between the first and second insulator patterns to the fourth insulator pattern.Type: ApplicationFiled: July 15, 2004Publication date: June 30, 2005Applicant: KABUSHIKI KAISHA TOSHIBAInventors: Yasuo Ebuchi, Takako Motai, Kenya Sanoi