Patents by Inventor Takako Takehara

Takako Takehara has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8114484
    Abstract: Methods for forming a film stack suitable for transistor fabrication using a low temperature plasma enhanced chemical vapor deposition (PECVD) process are provided. In one embodiment, the method includes providing a substrate in a PECVD chamber, depositing a dual layer SiNx film on the substrate, depositing a dual layer amorphous silicon film on the SiNx film, and depositing a n-doped silicon film on the dual layer amorphous silicon film. The aforementioned films are deposited at a temperature less than about 300 degrees Celsius in the same PECVD chamber.
    Type: Grant
    Filed: August 4, 2007
    Date of Patent: February 14, 2012
    Assignee: Applied Materials, Inc.
    Inventors: Ya-Tang Yang, Tae Kyung Won, Soo Young Choi, Takako Takehara, John M. White
  • Patent number: 7923354
    Abstract: Methods for depositing a microcrystalline silicon film layer with improved deposition rate and film quality are provided in the present invention. Also, a photovoltaic (PV) cell having a microcrystalline silicon film is provided. In one embodiment, the method produces a microcrystalline silicon film on a substrate at a deposition rate greater than about 20 nm per minute, wherein the microcrystalline silicon film has a crystallized volume between about 20 percent to about 80 percent.
    Type: Grant
    Filed: September 21, 2009
    Date of Patent: April 12, 2011
    Assignee: Applied Materials, Inc.
    Inventors: Soo Young Choi, Takako Takehara, John M. White, Yong Kee Chae
  • Patent number: 7915114
    Abstract: Method of fabricating a thin-film transistor (TFT) in which a gate metal is deposited onto a substrate in order to form the gate of the thin-film transistor. The substrate may be an insulative substrate or a color filter. In a first method, the gate metal is subjected to an H2 plasma. After subjecting the gate metal to an H2 plasma, the gate insulating film is deposited onto the gate. In a second method, first and second layers of gate insulating film are respectively deposited on the gate at a first and second deposition rates. One layer is deposited under H2 or argon dilution conditions and has improved insulating conditions while the other layer serves to lower the overall compressive stress of the dual layer gate insulator. In a third method, an n+ silicon film is formed on a substrate by maintaining a flow of silane, phosphine and hydrogen gas into a processing chamber at substrate temperatures of about 300° C. or less.
    Type: Grant
    Filed: November 27, 2007
    Date of Patent: March 29, 2011
    Assignee: Applied Materials, Inc.
    Inventors: Mark Hsiao, Dong-Kil Yim, Takako Takehara, Quanyuan Shang, William R. Harshbarger, Woong-Kwon Kim, Duk-Chul Yun, Youn-Gyung Chang
  • Publication number: 20100075453
    Abstract: A method and apparatus for forming solar panels from n-doped silicon, p-doped silicon, intrinsic amorphous silicon, and intrinsic microcrystalline silicon using a cluster tool is disclosed. The cluster tool comprises at least one load lock chamber and at least one transfer chamber. When multiple clusters are used, at least one buffer chamber may be present between the clusters. A plurality of processing chambers are attached to the transfer chamber. As few as five and as many as thirteen processing chambers can be present.
    Type: Application
    Filed: November 25, 2009
    Publication date: March 25, 2010
    Inventors: Shinichi Kurita, Takako Takehara, Suhail Anwar
  • Patent number: 7655542
    Abstract: Methods for depositing a microcrystalline silicon film layer with improved deposition rate and film quality are provided in the present invention. Also, photovoltaic (PV) cell having a microcrystalline silicon film is provided. In one embodiment, the method produces a microcrystalline silicon film on a substrate at a deposition rate greater than about 20 nm per minute, wherein the microcrystalline silicon film has a crystallized volume between about 20 percent to about 80 percent.
    Type: Grant
    Filed: June 23, 2006
    Date of Patent: February 2, 2010
    Assignee: Applied Materials, Inc.
    Inventors: Soo Young Choi, Takako Takehara, John M. White, Yong Kee Chae
  • Patent number: 7648892
    Abstract: Methods for depositing a microcrystalline silicon film layer with improved deposition rate and film quality are provided in the present invention. Also, a photovoltaic (PV) cell having a microcrystalline silicon film is provided. In one embodiment, the method produces a microcrystalline silicon film on a substrate at a deposition rate greater than about 20 nm per minute, wherein the microcrystalline silicon film has a crystallized volume between about 20 percent to about 80 percent.
    Type: Grant
    Filed: October 24, 2008
    Date of Patent: January 19, 2010
    Assignee: Applied Materials, Inc.
    Inventors: Soo Young Choi, Takako Takehara, John M. White, Yong Kee Chae
  • Publication number: 20100003780
    Abstract: Methods for depositing a microcrystalline silicon film layer with improved deposition rate and film quality are provided in the present invention. Also, a photovoltaic (PV) cell having a microcrystalline silicon film is provided. In one embodiment, the method produces a microcrystalline silicon film on a substrate at a deposition rate greater than about 20 nm per minute, wherein the microcrystalline silicon film has a crystallized volume between about 20 percent to about 80 percent.
    Type: Application
    Filed: September 21, 2009
    Publication date: January 7, 2010
    Inventors: Soo Young Choi, Takako Takehara, John M. White, Yong Kee Chae
  • Publication number: 20090053847
    Abstract: Methods for depositing a microcrystalline silicon film layer with improved deposition rate and film quality are provided in the present invention. Also, a photovoltaic (PV) cell having a microcrystalline silicon film is provided. In one embodiment, the method produces a microcrystalline silicon film on a substrate at a deposition rate greater than about 20 nm per minute, wherein the microcrystalline silicon film has a crystallized volume between about 20 percent to about 80 percent.
    Type: Application
    Filed: October 24, 2008
    Publication date: February 26, 2009
    Inventors: SOO YOUNG CHOI, Takako Takehara, John M. White, Yong Kee Chae
  • Publication number: 20090022908
    Abstract: Methods for forming a film stack suitable for transistor fabrication using a low temperature plasma enhanced chemical vapor deposition (PECVD) process are provided. In one embodiment, the method includes providing a substrate in a PECVD chamber, depositing a dual layer SiNx film on the substrate, depositing a dual layer amorphous silicon film on the SiNx film, and depositing a n-doped silicon film on the dual layer amorphous silicon film.
    Type: Application
    Filed: August 4, 2007
    Publication date: January 22, 2009
    Inventors: Ya-Tang YANG, Tae Kyung WON, Soo Young CHOI, Takako TAKEHARA, John M. WHITE
  • Patent number: 7432201
    Abstract: A method for making a film stack containing one or more silicon-containing layers and one or more metal-containing layers and a substrate processing system for forming the film stack on a substrate are provided. The substrate processing system includes one or more transfer chambers coupled to one or more load lock chambers and two or more different types of process chambers. The two or more types of process chambers are used to deposit the one or more silicon-containing layers and the one or more metal-containing layers in the same substrate processing system without breaking the vacuum, taking the substrate out of the substrate processing system to prevent surface contamination, oxidation, etc., such that additional cleaning or surface treatment steps can be eliminated. The substrate processing system is configured to provide high throughput and compact footprint for in-situ substrate processing and carry out different types of processes.
    Type: Grant
    Filed: July 19, 2005
    Date of Patent: October 7, 2008
    Assignee: Applied Materials, Inc.
    Inventors: Takako Takehara, Sheng Sun, John M. White
  • Publication number: 20080087960
    Abstract: Method of fabricating a thin-film transistor (TFT) in which a gate metal is deposited onto a substrate in order to form the gate of the thin-film transistor. The substrate may be an insulative substrate or a color filter. In a first method, the gate metal is subjected to an H2 plasma. After subjecting the gate metal to an H2 plasma, the gate insulating film is deposited onto the gate. In a second method, first and second layers of gate insulating film are respectively deposited on the gate at a first and second deposition rates. One layer is deposited under H2 or argon dilution conditions and has improved insulating conditions while the other layer serves to lower the overall compressive stress of the dual layer gate insulator. In a third method, an n+ silicon film is formed on a substrate by maintaining a flow of silane, phosphine and hydrogen gas into a processing chamber at substrate temperatures of about 300° C. or less.
    Type: Application
    Filed: November 27, 2007
    Publication date: April 17, 2008
    Inventors: Mark Hsiao, Dong-Kil Yim, Takako Takehara, Quanyuan Shang, William Harshbarger, Woong-Kwon Kim, Duk-Chul Yun, Youn-Gyung Chang
  • Publication number: 20080025821
    Abstract: A method and apparatus for processing substrates in a cluster tool is disclosed. The transfer chambers of the cluster tool have eight locations to which additional chambers (i.e., load lock, buffer, and processing chambers) may attach. The transfer chamber may be formed of three separate portions. The central portion may be a rectangular shaped portion. The two other portions may be trapezoidal shaped portions. The trapezoidal shaped portions each have three slots through which the substrate can move for processing. The central portion of the transfer chamber may have a removable lid that allows a technician to easily access the transfer chamber.
    Type: Application
    Filed: July 25, 2006
    Publication date: January 31, 2008
    Inventors: John M. White, Takako Takehara
  • Publication number: 20070298590
    Abstract: Methods for depositing a microcrystalline silicon film layer with improved deposition rate and film quality are provided in the present invention. Also, photovoltaic (PV) cell having a microcrystalline silicon film is provided. In one embodiment, the method produces a microcrystalline silicon film on a substrate at a deposition rate greater than about 20 nm per minute, wherein the microcrystalline silicon film has a crystallized volume between about 20 percent to about 80 percent.
    Type: Application
    Filed: June 23, 2006
    Publication date: December 27, 2007
    Inventors: Soo Young Choi, Takako Takehara, John M. White, Yong Kee Chae
  • Publication number: 20070281090
    Abstract: A method and apparatus for forming solar panels from n-doped silicon, p-doped silicon, intrinsic amorphous silicon, and intrinsic microcrystalline silicon using a cluster tool is disclosed. The cluster tool comprises at least one load lock chamber and at least one transfer chamber. When multiple clusters are used, at least one buffer chamber may be present between the clusters. A plurality of processing chambers are attached to the transfer chamber. As few as five and as many as thirteen processing chambers can be present.
    Type: Application
    Filed: April 11, 2007
    Publication date: December 6, 2007
    Inventors: Shinichi Kurita, Takako Takehara, Suhail Anwar
  • Patent number: 7300829
    Abstract: Method of fabricating a thin-film transistor (TFT) in which a gate metal is deposited onto a substrate in order to form the gate of the thin-film transistor. The substrate may be an insulative substrate or a color filter. In a first method, the gate metal is subjected to an H2 plasma. After subjecting the gate metal to an H2 plasma, the gate insulating film is deposited onto the gate. In a second method, first and second layers of gate insulating film are respectively deposited on the gate at a first and second deposition rates. One layer is deposited under H2 or argon dilution conditions and has improved insulating conditions while the other layer serves to lower the overall compressive stress of the dual layer gate insulator. In a third method, an n+ silicon film is formed on a substrate by maintaining a flow of silane, phosphine and hydrogen gas into a processing chamber at substrate temperatures of about 300° C. or less.
    Type: Grant
    Filed: June 2, 2003
    Date of Patent: November 27, 2007
    Assignee: Applied Materials, Inc.
    Inventors: Mark Hsiao, Dong-Kil Yim, Takako Takehara, Quanyuan Shang, William R. Harshbarger, Woong-Kwon Kim, Duk-Chul Yun, Youn-Gyung Chang
  • Publication number: 20070254112
    Abstract: A method for processing a plurality of substrates in a processing system having four or more process chambers is provided. Each substrate is processed in at least four of the four or more process chambers. Each of the four or more process chambers is cleaned after processing fifteen or less substrates, wherein cleaning of each chamber is scheduled at distinct, non-overlapping time periods to enhance throughput of the substrates through the processing system.
    Type: Application
    Filed: April 26, 2006
    Publication date: November 1, 2007
    Inventors: Takako Takehara, Inchen Huang, John White
  • Publication number: 20070048451
    Abstract: A method for depositing tree or more layers on two or more substrates using various chambers in a substrate processing system is provided. In addition, the invention provides substrate transfer methods and suitable substrate processing systems to maximize the throughput of the substrate processing systems and minimizing system footprint. The movements of a transfer robot in the substrate processing system are specifically configured for scheduling two or more process chambers in order to transfer multiple substrates and exchange the substrates between two chambers of the substrate processing system.
    Type: Application
    Filed: August 26, 2005
    Publication date: March 1, 2007
    Inventors: John White, Takako Takehara, Inchen Huang
  • Publication number: 20070020903
    Abstract: A method for making a film stack containing one or more silicon-containing layers and one or more metal-containing layers and a substrate processing system for forming the film stack on a substrate are provided. The substrate processing system includes one or more transfer chambers coupled to one or more load lock chambers and two or more different types of process chambers. The two or more types of process chambers are used to deposit the one or more silicon-containing layers and the one or more metal-containing layers in the same substrate processing system without breaking the vacuum, taking the substrate out of the substrate processing system to prevent surface contamination, oxidation, etc., such that additional cleaning or surface treatment steps can be eliminated. The substrate processing system is configured to provide high throughput and compact footprint for in-situ substrate processing and carry out different types of processes.
    Type: Application
    Filed: July 19, 2005
    Publication date: January 25, 2007
    Inventors: Takako Takehara, Sheng Sun, John White
  • Publication number: 20070017445
    Abstract: A method for making a film stack containing one or more silicon-containing layers and one or more metal-containing layers and a substrate processing system for forming the film stack on a substrate are provided. The substrate processing system includes one or more transfer chambers coupled to one or more load lock chambers and two or more different types of process chambers. The two or more types of process chambers are used to deposit the one or more silicon-containing layers and the one or more metal-containing layers in the same substrate processing system without breaking the vacuum, taking the substrate out of the substrate processing system to prevent surface contamination, oxidation, etc., such that additional cleaning or surface treatment steps can be eliminated. The substrate processing system is configured to provide high throughput and compact footprint for in-situ substrate processing and carry out different types of processes.
    Type: Application
    Filed: July 19, 2005
    Publication date: January 25, 2007
    Inventors: Takako Takehara, Sheng Sun, John White
  • Patent number: 7122962
    Abstract: A plasma display panel including a low k dielectric layer. In one embodiment, the dielectric layer is comprises a fluorine-doped silicon oxide layer such as an SiOF layer. In another embodiment, the dielectric layer comprises a Black Diamond™ layer. In certain embodiments, a capping layer such as SiN or SiON is deposited over the dielectric layer.
    Type: Grant
    Filed: June 11, 2003
    Date of Patent: October 17, 2006
    Assignee: Applied Materials, Inc.
    Inventors: Kam S. Law, Quanyuan Shang, Takako Takehara, Taekyung Won, William R. Harshbarger, Dan Maydan