Patents by Inventor Takamasa Usui
Takamasa Usui has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20050082577Abstract: At least one electrode pad is formed above the surface of a semiconductor substrate. A multilevel interconnection configuration is formed between the electrode pad and the semiconductor substrate. The multiple levels of interconnections in the multilevel interconnection configuration are insulated from one another by an insulating film of low dielectric constant. A dummy interconnection configuration is formed at least within the insulating film around the periphery of the electrode pad.Type: ApplicationFiled: December 15, 2003Publication date: April 21, 2005Inventor: Takamasa Usui
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Patent number: 6864583Abstract: A wiring layer is covered with a first organic SOG layer, a reinforcement insulating layer consisting of a silicon oxide film or a silicon nitride film formed by means of a plasma CVD method, and a second organic SOG layer, in this order. A via hole is formed in the first organic SOG layer and the reinforcement insulating layer, and a trench is formed in the second organic SOG layer to correspond to the via hole. A conductive via plug and an electrode pad are embedded in the via hole and the trench, respectively. The second SOG layer is covered with a passivation layer in which a through hole is formed to expose the electrode pad. A wire is connected to the exposed electrode pad in the through hole.Type: GrantFiled: March 31, 2003Date of Patent: March 8, 2005Assignee: Kabushiki Kaisha ToshibaInventors: Noriaki Matsunaga, Takamasa Usui, Sachiyo Ito
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Publication number: 20050023692Abstract: A semiconductor apparatus is provided that includes a radiator for efficiently radiating heat generated in a wiring layer used in a surge current path of an electrostatic discharge protection circuit, and also for protecting the wiring layer itself used as the surge current path. The semiconductor apparatus includes an input protection circuit coupled to a wiring provided between an external terminal and an internal circuit, the input protection circuit includes a protection element for protecting the internal circuit from an excessive electrostatic surge input supplied to the external terminal. The semiconductor apparatus further includes a first metal wiring layer coupled to the input protection circuit and included in a current path for the surge electrostatic surge input, and a radiator including a sufficient thermal conductivity material coupled to the first metal wiring layer.Type: ApplicationFiled: June 23, 2004Publication date: February 3, 2005Inventors: Takashi Matsunaga, Takamasa Usui
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Patent number: 6805438Abstract: An ink jet printer uses an ink tank storing ink to be supplied to a print head, an ink tube, an ink chamber mounted on a carriage to store ink to be supplied from the ink tank to the print head, and a connecting member that includes an ink outflow port connected to the ink chamber and an ink inflow port where ink flows from the ink tube. At an intersection of the ink inflow port and the ink outflow port, a direction of a flow of ink from the ink inflow port is changed. Further at the intersection, a cushion is provided to absorb pressure waves generated in the ink tube on an extended line in an initial direction where ink flows in the ink passage over the intersection.Type: GrantFiled: October 30, 2001Date of Patent: October 19, 2004Inventors: Hikaru Kaga, Seiji Shimizu, Tsuyoshi Suzuki, Katsunori Nishida, Takamasa Usui
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Publication number: 20040183561Abstract: A reliability evaluation test apparatus of this invention includes a wafer storage section which stores a wafer in a state wherein the electrode pads of a number of devices formed on the wafer and the bumps of a contactor are totally in electrical contact with each other. The wafer storage section transmits/receives a test signal to/from a measurement section and has a hermetic and heat insulating structure. The wafer storage section has a pressure mechanism which presses the contactor and a heating mechanism which directly heats the wafer totally in contact with the contactor to a predetermined high temperature. The reliability of an interconnection film and insulating film formed on the semiconductor wafer are evaluated under an accelerated condition.Type: ApplicationFiled: March 31, 2004Publication date: September 23, 2004Inventors: Kiyoshi Takekoshi, Hisatomi Hosaka, Junichi Hagihara, Kunihiko Hatsushika, Takamasa Usui, Hisashi Kaneko, Nobuo Hayasaka, Yoshiyuki Ido
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Patent number: 6742877Abstract: An ink-jet recording apparatus includes an ink tube and an air discharge tube which has a cylindrical shape and an inside diameter that is larger than an outside diameter of the ink tube. The air discharge tube is provided so as to surround the ink tube. Therefore, a circular enclosed space is provided around the ink tube, between the air discharge tube and the ink tube. A pressure reducing device is connected with the enclosed space to reduce pressure therein. By actuating the pressure reducing device, the pressure in the enclosed space is reduced. Thus, air contained in ink is sucked into the enclosed space, in which the pressure is reduced, through a wall of the ink tube, and thus, generation of air bubbles are restricted in the ink tube.Type: GrantFiled: November 22, 2002Date of Patent: June 1, 2004Assignee: Brother Kogyo Kabushiki KaishaInventors: Takamasa Usui, Hikaru Kaga, Tsuyoshi Suzuki
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Publication number: 20040043602Abstract: A method of manufacturing semiconductor device which comprises the steps of forming an insulating film on an Si substrate provided with a wiring layer, forming a contact hole connected to the wiring layer and a wiring groove in the insulating film, filling the contact hole with an Si film, successively forming an Al film and a Ti film all over the substrate, performing a heat treatment thereby to substitute the Al film for the Ti film, and to allow the Si film to be absorbed by the Ti film, whereby filling the contact hole and wiring groove with the Al film, and removing a Ti/Ti silicide which is consisting of Ti silicide formed through the absorption of the Si film by the Ti film and a superfluous Ti, whereby filling the contact hole with an Al plug and filling the wiring groove with an Al wiring.Type: ApplicationFiled: August 29, 2003Publication date: March 4, 2004Applicant: KABUSHIKI KAISHA TOSHIBAInventors: Junichi Wada, Atsuko Sakata, Tomio Katata, Takamasa Usui, Masahiko Hasunuma, Hideki Shibata, Hisashi Kaneko, Nobuo Hayasaka, Katsuya Okumura
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Patent number: 6685310Abstract: Ink supplied from an ink tank via a tube and air bubbles contained in the ink are stored in a first chamber of an air trap unit. At recording operation, the ink is allowed to flow from the first chamber to a third chamber via a filter disposed therebetween, and is supplied to a recording head via the third chamber. At purging operation, the ink flows at high speed, so that the filter regulates the high-speed ink-flow to flow from the first chamber to the third chamber. Therefore, the ink flows from the first chamber to a second chamber via a first connecting portion and then flows from the second chamber to the third chamber that connects a lower end of the second chamber with the recording head. Thus, the air trapped in the first chamber is discharged from the recording head along the high-speed ink-flow. In addition, a second rib is provided to an upper wall of the air trap unit so as to protrude in a direction perpendicular to an ink-flow direction.Type: GrantFiled: August 27, 2002Date of Patent: February 3, 2004Assignee: Brother Kogyo Kabushiki KaishaInventors: Hikaru Kaga, Takamasa Usui
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Patent number: 6673704Abstract: A method of manufacturing semiconductor device which comprises the steps of forming an insulating film on an Si substrate provided with a wiring layer, forming a contact hole connected to the wiring layer and a wiring groove in the insulating film, filling the contact hole with an Si film, successively forming an Al film and a Ti film all over the substrate, performing a heat treatment thereby to substitute the Al film for the Ti film, and to allow the Si film to be absorbed by the Ti film, whereby filling the contact hole and wiring groove with the Al film, and removing a Ti/Ti silicide which is consisting of Ti silicide formed through the absorption of the Si film by the Ti film and a superfluous Ti, whereby filling the contact hole with an Al plug and filling the wiring groove with an Al wiring.Type: GrantFiled: July 8, 2002Date of Patent: January 6, 2004Assignee: Kabushiki Kaisha ToshibaInventors: Junichi Wada, Atsuko Sakata, Tomio Katata, Takamasa Usui, Masahiko Hasunuma, Hideki Shibata, Hisashi Kaneko, Nobuo Hayasaka, Katsuya Okumura
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Publication number: 20030205814Abstract: A wiring layer is covered with a first organic SOG layer, a reinforcement insulating layer consisting of a silicon oxide film or a silicon nitride film formed by means of a plasma CVD method, and a second organic SOG layer, in this order. A via hole is formed in the first organic SOG layer and the reinforcement insulating layer, and a trench is formed in the second organic SOG layer to correspond to the via hole. A conductive via plug and an electrode pad are embedded in the via hole and the trench, respectively. The second SOG layer is covered with a passivation layer in which a through hole is formed to expose the electrode pad. A wire is connected to the exposed electrode pad in the through hole.Type: ApplicationFiled: March 31, 2003Publication date: November 6, 2003Applicant: Kabushiki Kaisha ToshibaInventors: Noriaki Matsunaga, Takamasa Usui, Sachiyo Ito
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Patent number: 6642622Abstract: A semiconductor device includes a substrate and a first insulating film provided above the semiconductor substrate. A first interconnecting layer is provided on the first insulating film. A second insulating film is provided above the first interconnecting layer and the first insulating layer. A first protective film is provided above the second insulating film and composed substantially of metal material. A second protective film is composed substantially of a passivity of the metal material and provided on a surface of the first protective film.Type: GrantFiled: February 21, 2003Date of Patent: November 4, 2003Assignee: Kabushiki Kaisha ToshibaInventors: Takamasa Usui, Sachiyo Ito
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Publication number: 20030160327Abstract: A semiconductor device includes a substrate and a first insulating film provided above the semiconductor substrate. A first interconnecting layer is provided on the first insulating film. A second insulating film is provided above the first interconnecting layer and the first insulating layer. A first protective film is provided above the second insulating film and composed substantially of metal material. A second protective film is composed substantially of a passivity of the metal material and provided on a surface of the first protective film.Type: ApplicationFiled: February 21, 2003Publication date: August 28, 2003Applicant: Kabushiki Kaisha ToshibaInventors: Takamasa Usui, Sachiyo Ito
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Patent number: 6609792Abstract: An ink-jet printer in which drive data for a print head is converted into a light signal by a first light-emitting diode provided in a control circuit. The light signal is transmitted, through an optical fiber, to a first photo-diode provided in a receiver circuit. The light signal received by the first photo-diode is converted into an electric signal. Data concerning the status of a print head unit is converted into a light signal by a second light-emitting diode provided in the receiver circuit. The light signal is transmitted from the second light-emitting diode, through the optical fiber, to a second photo-diode provided in the control circuit. The light signal received by the second photo-diode is converted into an electric signal.Type: GrantFiled: December 27, 2001Date of Patent: August 26, 2003Assignee: Brother Kogyo Kabushiki KaishaInventors: Hikaru Kaga, Seiji Shimizu, Tsuyoshi Suzuki, Katsunori Nishida, Takamasa Usui
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Publication number: 20030155590Abstract: A semiconductor device comprising a substrate, a plurality of dielectric films formed on the substrate, laid one upon another, and a fuse interconnect-wire formed above the substrate and covered with a predetermined one of the dielectric films, and including a fuse main body which is to be blown to electrically disconnect the fuse interconnect-wire, which is smaller than a bottom of a fuse-blowing recess made in the predetermined dielectric film, which has a length not less than the diameter of a fuse-blowing laser beam and which opposes the bottom of the fuse-blowing recess.Type: ApplicationFiled: February 13, 2003Publication date: August 21, 2003Applicant: KABUSHIKI KAISHA TOSHIBAInventors: Masaaki Hatano, Hiroshi Ikegami, Takamasa Usui, Mie Matsuo
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Publication number: 20030117466Abstract: An ink-jet recording apparatus includes an ink tube and an air discharge tube which has a cylindrical shape and an inside diameter that is larger than an outside diameter of the ink tube. The air discharge tube is provided so as to surround the ink tube. Therefore, a circular enclosed space is provided around the ink tube, between the air discharge tube and the ink tube. A pressure reducing device is connected with the enclosed space to reduce pressure therein. By actuating the pressure reducing device, the pressure in the enclosed space is reduced. Thus, air contained in ink is sucked into the enclosed space, in which the pressure is reduced, through a wall of the ink tube, and thus, generation of air bubbles are restricted in the ink tube.Type: ApplicationFiled: November 22, 2002Publication date: June 26, 2003Inventors: Takamasa Usui, Hikaru Kaga, Tsuyoshi Suzuki
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Patent number: 6559548Abstract: A wiring layer is covered with a first organic SOG layer, a reinforcement insulating layer consisting of a silicon oxide film or a silicon nitride film formed by means of a plasma CVD method, and a second organic SOG layer, in this order. A via hole is formed in the first organic SOG layer and the reinforcement insulating layer, and a trench is formed in the second organic SOG layer to correspond to the via hole. A conductive via plug and an electrode pad are embedded in the via hole and the trench, respectively. The second SOG layer is covered with a passivation layer in which a through hole is formed to expose the electrode pad. A wire is connected to the exposed electrode pad in the through hole.Type: GrantFiled: March 16, 2000Date of Patent: May 6, 2003Assignee: Kabushiki Kaisha ToshibaInventors: Noriaki Matsunaga, Takamasa Usui, Sachiyo Ito
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Publication number: 20030048336Abstract: An ink path through which ink is delivered from an ink source to a printhead unit includes an ink tube and a joint. The ink tube has a first layer formed of a material with low vapor and gas permeability and a second layer radially thicker than the first layer and formed of a flexible material. The joint has a maximum-diameter portion whose outer diameter is larger than an inner diameter of the ink tube. The joint is inserted into the ink tube. Further, a locking member is fitted over the ink tube. The locking member has an inner-diameter portion whose inner diameter is smaller than an outer diameter of a connection between the maximum-diameter portion of the joint and the ink tube.Type: ApplicationFiled: August 28, 2002Publication date: March 13, 2003Applicant: BROTHER KOGYO KABUSHIKI KAISHAInventors: Hikaru Kaga, Takamasa Usui
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Publication number: 20030043244Abstract: Ink supplied from an ink tank via a tube and air bubbles contained in the ink are stored in a first chamber of an air trap unit. At recording operation, the ink is allowed to flow from the first chamber to a third chamber via a filter disposed therebetween, and is supplied to a recording head via the third chamber. At purging operation, the ink flows at high speed, so that the filter regulates the high-speed ink-flow to flow from the first chamber to the third chamber. Therefore, the ink flows from the first chamber to a second chamber via a first connecting portion and then flows from the second chamber to the third chamber that connects a lower end of the second chamber with the recording head. Thus, the air trapped in the first chamber is discharged from the recording head along the high-speed ink-flow. In addition, a second rib is provided to an upper wall of the air trap unit so as to protrude in a direction perpendicular to an ink-flow direction.Type: ApplicationFiled: August 27, 2002Publication date: March 6, 2003Inventors: Hikaru Kaga, Takamasa Usui
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Publication number: 20020192938Abstract: A method of manufacturing semiconductor device which comprises the steps of forming an insulating film on an Si substrate provided with a wiring layer, forming a contact hole connected to the wiring layer and a wiring groove in the insulating film, filling the contact hole with an Si film, successively forming an Al film and a Ti film all over the substrate, performing a heat treatment thereby to substitute the Al film for the Ti film, and to allow the Si film to be absorbed by the Ti film, whereby filling the contact hole and wiring groove with the Al film, and removing a Ti/Ti silicide which is consisting of Ti silicide formed through the absorption of the Si film by the Ti film and a superfluous Ti, whereby filling the contact hole with an Al plug and filling the wiring groove with an Al wiring.Type: ApplicationFiled: July 8, 2002Publication date: December 19, 2002Applicant: KABUSHIKI KAISHA TOSHIBAInventors: Junichi Wada, Atsuko Sakata, Tomio Katata, Takamasa Usui, Masahiko Hasunuma, Hideki Shibata, Hisashi Kaneko, Nobuo Hayasaka, Katsuya Okumura
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Patent number: 6440843Abstract: A method of manufacturing semiconductor device which comprises the steps of forming an insulating film on an Si substrate provided with a wiring layer, forming a contact hole connected to the wiring layer and a wiring groove in the insulating film, filling the contact hole with an Si film, successively forming an Al film and a Ti film all over the substrate, performing a heat treatment thereby to substitute the Al film for the Ti film, and to allow the Si film to be absorbed by the Ti film, whereby filling the contact hole and wiring groove with the Al film, and removing a Ti/Ti silicide which is consisting of Ti silicide formed through the absorption of the Si film by the Ti film and a superfluous Ti, whereby filling the contact hole with an Al plug and filling the wiring groove with an Al wiring.Type: GrantFiled: April 21, 2000Date of Patent: August 27, 2002Assignee: Kabushiki Kaisha ToshibaInventors: Junichi Wada, Atsuko Sakata, Tomio Katata, Takamasa Usui, Masahiko Hasunuma, Hideki Shibata, Hisashi Kaneko, Nobuo Hayasaka, Katsuya Okumura