Patents by Inventor Takamasa Usui

Takamasa Usui has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20020080218
    Abstract: An ink-jet printer in which drive data for a print head is converted into a light signal by a first light-emitting diode provided in a control circuit. The light signal is transmitted, through an optical fiber, to a first photo-diode provided in a receiver circuit. The light signal received by the first photo-diode is converted into an electric signal. Data concerning the status of a print head unit is converted into a light signal by a second light-emitting diode provided in the receiver circuit. The light signal is transmitted from the second light-emitting diode, through the optical fiber, to a second photo-diode provided in the control circuit. The light signal received by the second photo-diode is converted into an electric signal.
    Type: Application
    Filed: December 27, 2001
    Publication date: June 27, 2002
    Applicant: Brother Kogyo Kabushiki Kaisha
    Inventors: Hikaru Kaga, Seiji Shimizu, Tsuyoshi Suzuki, Katsunori Nishida, Takamasa Usui
  • Patent number: 6407453
    Abstract: Disclosed is a semiconductor device, comprising a semiconductor substrate, an insulating layer and a metallic wiring layer formed on the semiconductor substrate; and an intermediate layer formed between the insulating layer and the metallic wiring layer in contact with both the insulating layer and the metallic wiring layer, wherein the intermediate layer contains the metallic material forming the metallic wiring layer, Si and O.
    Type: Grant
    Filed: March 9, 2000
    Date of Patent: June 18, 2002
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Tadayoshi Watanabe, Sachiyo Ito, Takamasa Usui, Hisashi Kaneko, Masako Morita, Hirokazu Ezawa
  • Publication number: 20020071015
    Abstract: An ink jet printer uses an ink tank storing ink to be supplied to a print head, an ink tube, an ink chamber mounted on a carriage to store ink to be supplied from the ink tank to the print head, and a connecting member that includes an ink outflow port connected to the ink chamber and an ink inflow port where ink flows from the ink tube. At an intersection of the ink inflow port and the ink outflow port, a direction of a flow of ink from the ink inflow port is changed. Further at the intersection, a cushion is provided to absorb pressure waves generated in the ink tube on an extended line in an initial direction where ink flows in the ink passage over the intersection.
    Type: Application
    Filed: October 30, 2001
    Publication date: June 13, 2002
    Applicant: BROTHER KOGYO KABUSHIKI KAISHA
    Inventors: Hikaru Kaga, Seiji Shimizu, Tsuyoshi Suzuki, Katsunori Nishida, Takamasa Usui
  • Publication number: 20020057320
    Abstract: An ink jet printer uses a print head that has at least one ink nozzle and performs printing on a recording medium by ejecting ink from the ink nozzle. An air chamber is connected to the print head to trap air generated in an ink passage. A purge device discharges the air trapped in the air chamber from the ink nozzle. A filter member divides the lower portion of the air chamber into a first chamber and a second chamber. The air chamber traps and stores air in the top portion of the air chamber and the filter member passes ink there through when the print head performs printing. The air trapped in the air chamber is discharged when the purge device generates an ink flow that goes over the filter member.
    Type: Application
    Filed: November 14, 2001
    Publication date: May 16, 2002
    Applicant: Brother Kogyo Kabushiki Kaisha
    Inventors: Hikaru Kaga, Seiji Shimizu, Tsuyoshi Suzuki, Katsunori Nishida, Takamasa Usui
  • Publication number: 20010023988
    Abstract: There is provided a semiconductor device comprising a Cu film provided above a main surface of a semiconductor substrate and used as a wiring, an intermediate layer formed at least on the Cu film, and an Al film formed on the intermediate layer and used as a pad, wherein the intermediate layer comprises a refractory metal nitride film and a refractory metal film formed on the refractory metal nitride film.
    Type: Application
    Filed: March 26, 2001
    Publication date: September 27, 2001
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Masaaki Hatano, Takamasa Usui
  • Patent number: 6110647
    Abstract: A method of manufacturing a semiconductor device, comprises the steps of forming a first transfer pattern corresponding to a mask pattern on a major surface side of a semiconductor substrate through a first mask plate on which the first mask pattern having a straight portion and a bent portion is formed, and forming a second transfer pattern corresponding to a second mask pattern on a major surface side of the semiconductor substrate through a second mask plate on which the second mask pattern having a pattern arranged at a position corresponding to the straight portion is formed.
    Type: Grant
    Filed: February 17, 1998
    Date of Patent: August 29, 2000
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Soichi Inoue, Hisashi Kaneko, Masahiko Hasunuma, Takamasa Usui, Masami Aoki, Kazuko Yamamoto, Sachiko Kobayashi
  • Patent number: 6091080
    Abstract: Electromigration (EM) of a multilayer wiring is evaluated accurately and efficiently. A capacitance measuring wiring is disposed through the third insulator film in parallel to the second testing wiring. A stress current is sent to the second testing wiring toward the first testing wiring for a period and subsequently the capacitance of the capacitor composed of the second testing wiring and the capacitance measuring wiring is measured. The volume of voids in the second testing wiring is obtained from the ratio of this capacitance and the capacitance before letting the stress current flow. EM is evaluated by defining the wiring life span by using this volume.
    Type: Grant
    Filed: June 25, 1998
    Date of Patent: July 18, 2000
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Takamasa Usui
  • Patent number: 6071810
    Abstract: A method of manufacturing semiconductor device which comprises the steps of forming an insulating film on an Si substrate provided with a wiring layer, forming a contact hole connected to the wiring layer and a wiring groove in the insulating film, filling the contact hole with an Si film, successively forming an Al film and a Ti film all over the substrate, performing a heat treatment thereby to substitute the Al film for the Ti film, and to allow the Si film to be absorbed by the Ti film, whereby filling the contact hole and wiring groove with the Al film, and removing a Ti/Ti silicide which is consisting of Ti silicide formed through the absorption of the Si film by the Ti film and a superfluous Ti, whereby filling the contact hole with an Al plug and filling the wiring groove with an Al wiring.
    Type: Grant
    Filed: December 23, 1997
    Date of Patent: June 6, 2000
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Junichi Wada, Atsuko Sakata, Tomio Katata, Takamasa Usui, Masahiko Hasunuma, Hideki Shibata, Hisashi Kaneko, Nobuo Hayasaka, Katsuya Okumura
  • Patent number: 5943601
    Abstract: A metallization structure is fabricated by depositing an underlayer of a group IVA metal having a thickness of about 90 to about 110 angstroms, and depositing a layer of aluminum and/or an aluminum alloy. The metallization structure obtained exhibits enhanced electromigration and is highly textured and is especially suitable for forming electrical connections or wiring.
    Type: Grant
    Filed: April 30, 1997
    Date of Patent: August 24, 1999
    Assignee: International Business Machines Corporation
    Inventors: Takamasa Usui, Patrick W. DeHaven, Kenneth P. Rodbell, Ronald G. Filippi, Chi-Hua Yang, Tomio Katata, Hideaki Aochi
  • Patent number: 5759915
    Abstract: The present invention provides a semiconductor device including an improved buried electrode formed by selective CVD. In this semiconductor device, a first insulation layer is formed on a semiconductor substrate. A first conductive layer is formed along an inner surface of a recess of an opening formed on the first insulation layer. A second conductive layer is formed on the first conductive layer in the recess of the opening. The second conductive layer is flush with the first insulation layer. The surfaces of the first and second conductive layers are coated with a third conductive layer. A second insulation layer is formed on the first insulation layer and the third conductive layer. A via hole is formed through the second insulation layer and the third conductive layer and reaches to the second conductive layer. A buried electrode layer is grown in the via hole and formed in contact with the second conductive layer.
    Type: Grant
    Filed: November 6, 1996
    Date of Patent: June 2, 1998
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Noriaki Matsunaga, Hideki Shibata, Tadashi Matsuno, Takamasa Usui