Patents by Inventor Takamoto Watanabe

Takamoto Watanabe has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5526393
    Abstract: A synchronous counter comprises one D flip-flop circuit for performing divide-by-2 frequency division of a clock signal CK, JK flip-flop circuits for, when input signals have HIGH levels (logical value 1), inverting the levels of the output signals in synchronization with the clock signal CK, logic circuits for inputting control signals to the JK flip-flop circuits, lower-stage signal assembling circuits for grouping the output signals from the JK flip-flop circuits into two-signal-unit groups to produce logical product signals of the signals in these two,signal-unit groups, and upper-stage signal assembling circuits for further handling the output signals from the lower-stage signal assembling circuits, thereby firstly simultaneously satisfying an increase in speed of the counting operation as well as simplification of the wiring pattern and reduction in the circuit area and secondly realizing further increase in the counting operation.
    Type: Grant
    Filed: March 16, 1995
    Date of Patent: June 11, 1996
    Assignee: Nippondenso Co., Ltd.
    Inventors: Mitsuaki Kondo, Takamoto Watanabe
  • Patent number: 5517155
    Abstract: A digitally-controlled phase-locked loop oscillating circuit includes a signal period detector which detects the period of an input signal. A control data generator generates control data based on this period. The control data is used to drive a variable frequency oscillator which generates an output pulse synchronized with the input pulse. This output pulse is generated by alternately driving a digitally-controlled oscillator with either the most significant bits of the control data, or an increment of the most significant bits of the control data responsive to the least significant bits of the control data. A period divider divides the period of the output pulse and applies it to a phase comparator, which compares its phase with that of the input signal. The control data generator generates the control data responsive to the phase comparison result.
    Type: Grant
    Filed: February 15, 1995
    Date of Patent: May 14, 1996
    Assignee: Nippondenso Co., Ltd.
    Inventors: Shigenori Yamauchi, Takamoto Watanabe
  • Patent number: 5477196
    Abstract: In a device for encoding a pulse phase difference or controlling an oscillation frequency based on delayed signals sequentially output by a delay circuit, the encoding of a pulse phase difference or the oscillation control can be simultaneously performed using a single delay device. There is provided a frequency converter including a ring oscillator consisting of inverting circuits interconnected in the form of a ring, a pulse phase difference encoding circuit for encoding the cycle of a reference signal into a binary digital value based on a pulse output by the ring oscillator, an arithmetic circuit for multiplying or dividing the binary digital value by a predetermined value to generate control data and a digitally controlled oscillation circuit for generating a pulse signal in a cycle in accordance with the control data based on the pulse output by the ring oscillator, the ring oscillator being shared by the encoding circuit and oscillation circuit.
    Type: Grant
    Filed: December 23, 1994
    Date of Patent: December 19, 1995
    Assignee: Nippondenso Co., Ltd.
    Inventors: Shigenori Yamauchi, Takamoto Watanabe
  • Patent number: 5465076
    Abstract: A programmable delay line comprises a plurality of delay stages connected in series, each of the delay stages including: a basic path for passing an input signal; a delay path for passing the input signal with a predetermined delay time; and a selector for selecting either the basic path or the delay path to pass the input signal in accordance with digital data externally inputted, wherein differences in times for passing the input signal through the basic path and through the delay path in the plurality delay stages are UD.2.sup.n (n=0, 1, 2 . . . ), UD being unit delay time. A programmable delay apparatus comprises: an oscillator and counter, which determine a coarse delay time in accordance with the upper bit data of control data, and a programmable delay line, which determines a fine delay time according to the lower bit data of the control data after the finish of the coarse delay time to obtain a total delay time. The counter provides a wide range of available delay times.
    Type: Grant
    Filed: August 25, 1993
    Date of Patent: November 7, 1995
    Assignee: Nippondenso Co., Ltd.
    Inventors: Shigenori Yamauchi, Takamoto Watanabe
  • Patent number: 5420546
    Abstract: A digitally controllable oscillator is provided with a variable-frequency ring oscillator including an odd number of inverting circuits connected together in a ring formation. The oscillator has a pulse circulation device to circulate a pulse signal through the inverters to introduce some delay in the signal. Digital data is produced by a data controller device. A counter is connected to the pulse circulation device and counts the number of times the pulse signal circulates through the inverters. A pulse is generated at a desired frequency based upon the counter's output and the introduced delay. A control device determines which of a plurality of delay signals is applied to the circuit that generates the pulse at the desired frequency.
    Type: Grant
    Filed: May 27, 1994
    Date of Patent: May 30, 1995
    Assignee: Nippondenso Co., Ltd.
    Inventors: Takamoto Watanabe, Yoshinori Ohtsuka, Tadashi Hattori
  • Patent number: 5416444
    Abstract: A ring oscillator for circulating pulse edges of two types therein includes an even number of inverting circuits connected in a ring. Each of the inverting circuits is operative to invert an input signal and output an inversion of the input signal. One of the inverting circuits is a first start inverting circuit which starts an operation of inverting an input signal in response to a first control signal applied from an external input. One of the inverting circuits except the first start inverting circuit and an inverting circuit immediately following the first start inverting circuit is a second start inverting circuit which starts an operation of inverting an input signal in response to a second control signal.
    Type: Grant
    Filed: January 5, 1994
    Date of Patent: May 16, 1995
    Assignee: Nippondenso Co., Ltd.
    Inventors: Shigenori Yamauchi, Takamoto Watanabe, Yoshinori Ohtsuka
  • Patent number: 5396247
    Abstract: A pulse circulating circuit includes inverting circuits each for inverting an input signal and outputting an inversion of the input signal. A time of signal inversion by each of the inverting circuits varies in accordance with a power supply voltage applied thereto. One of the inverting circuits constitutes an inverting circuit for starting which is controllable in inversion operation. The pulse circulating circuit circulates a pulse signal therethrough after the inverting circuit for starting starts to operate. An input terminal subjected to an analog voltage signal is connected to power supply lines of the respective inverting circuits for applying the analog voltage signal to the inverting circuits as a power supply voltage fed thereto. A counter serves to count a number of times of complete circulation of the pulse signal through the pulse circulating circuit.
    Type: Grant
    Filed: March 15, 1993
    Date of Patent: March 7, 1995
    Assignee: Nippondenso Co., Ltd.
    Inventors: Takamoto Watanabe, Yoshinori Ohtsuka, Tadashi Hattori
  • Patent number: 5359287
    Abstract: A magnetic detecting circuit has a magneto resistance element which converts a change of magnetism detected into a signal. A plurality of these magneto resistive elements are provided on a plane, and are oriented on the plane in two opposite directions having angles, relative to a bias direction, having substantially equal absolute values. The placement in opposite directions allows the resistance values from the elements to change in approximately the same direction as the object moves, to allow a monotonic change in the bias magnetic field. The change of the bias magnetic field can be detected from the change of resistance values of the magneto resistive elements.
    Type: Grant
    Filed: July 12, 1993
    Date of Patent: October 25, 1994
    Assignees: Nippondenso Co., Ltd., Nippon Soken, Inc.
    Inventors: Takamoto Watanabe, Yoshinori Ohtsuka, Kouichi Hoshino, Katsumi Nakamura
  • Patent number: 5331294
    Abstract: A digitally controllable oscillator is provided with a variable-frequency ring oscillator comprising an odd number of inverting circuits connected to each other in a ring. The frequency of the output signal of the ring oscillator is determined by a digital input signal specifying the frequency of the output signal of the ring oscillator. The number of times of circulation of a pulse signal through the ring oscillator is counted. A pulse generator generates a pulse signal upon the coincidence of the counted number of times of circulation of the pulse signal through the ring oscillator with a number corresponding to the digital input signal. A series of these operations is repeated to make the pulse generator generate pulse signals successively at a period corresponding to the digital input signal.
    Type: Grant
    Filed: October 2, 1992
    Date of Patent: July 19, 1994
    Assignee: Nippondenso Co., Ltd.
    Inventors: Takamoto Watanabe, Yoshinori Ohtsuka, Tadashi Hattori
  • Patent number: 5289135
    Abstract: A pulse phase difference encoding circuit provides a digital signal indicating a phase difference between a first input pulse and a second input pulse. The first input pulse is provided to and circulated in a ring signal delay circuit having a plurality of signal delay elements that are connected in series. Intermediate points between the delay elements provide delayed pulses having different delay times. Upon receiving the second input pulse, a selector selects one delay pulse provided by the delay element at which the first input pulse has arrived, and generates a digital positional signal indicating a position of the selected delay element. The number of rounds of circulation of the first input pulse in the ring signal delay circuit is separately counted. According to the number of rounds of circulation of the first pulse and the positional signal, the digital signal indicating the phase difference between the first and second input pulses is formed.
    Type: Grant
    Filed: July 6, 1992
    Date of Patent: February 22, 1994
    Assignees: Nippon Soken, Inc., Nippondenso Co., Ltd.
    Inventors: Kouichi Hoshino, Takamoto Watanabe, Yoshinori Ohtsuka
  • Patent number: 5134371
    Abstract: A magnetic detection device including at least one oscillator circuit having a magnetoresistance element which converts a change of magnetism detected into a digital signal and a comparator for comparing the digitalized oscillating frequency of the oscillator circuit with another digitalized oscillating frequency generated from another oscillating circuit by taking a ratio thereof or by detecting a phase difference between the pulse signals. Utilizing the magnetic detection device, the amount of change of magnetism can be stably detected with a high accuracy within a wide range of ambient usage temperatures.Also, a physical quantity detection device including the magnetic detection device which can detect any physical quantity with a high accuracy.
    Type: Grant
    Filed: January 18, 1990
    Date of Patent: July 28, 1992
    Assignees: Nippondenso Co., Ltd., Nippon Soken, Inc.
    Inventors: Takamoto Watanabe, Yoshinori Ohtsuka, Muneaki Matsumoto, Tadashi Hattori, Kouichi Hoshino, Masanori Ohsawa, Katsumi Nakamura
  • Patent number: 5128624
    Abstract: A pulse phase difference encoding circuit provides a digital signal indicating a phase difference between a first input pulse and a second input pulse. The first input pulse is provided to and circulated in a ring signal delay circuit having a plurality of signal delay elements that are connected in series. Intermediate points between the delay elements provide delayed pulses having different delay times. Upon receiving the second input pulse, a selector selects one delay pulse provided by the delay element at which the first input pulse has arrived, and generates a digital positional signal indicating a position of the selected delay element. The number of rounds of circulation of the first input pulse in the ring signal delay circuit is separately counted. According to the number of rounds of circulation of the first pulse and the positional signal, the digital signal indicating the phase difference between the first and second input phases is formed.
    Type: Grant
    Filed: January 25, 1991
    Date of Patent: July 7, 1992
    Assignees: Nippon Soken, Inc., Nippondenso Co., Ltd.
    Inventors: Kouichi Hoshino, Takamoto Watanabe, Yoshinori Ohtsuka