Abstract: A digital modulator and digital demodulator with quadrature amplitude modulation (QAM) schemes, which are designed to modulate or demodulate RZ-coded baseband signals. The digital modulator comprises first to fourth roll-off filters and a first and second inverters connected to the second and fourth roll-off filters. It also comprises a parallel-to-serial converter to successively selects the outputs of the first roll-off filter, third roll-off filter, first inverter, and second inverter. A D/A converter converts the selected digital signal stream into an analog signal. The roll-off filters and inverters operate at a predetermined clock frequency, while the parallel-to-serial converter and the D/A converter work at a frequency four times the predetermined clock frequency. The digital demodulator reverses the above modulation process to reproduce the baseband signals.

Abstract: A reference carrier generator device includes a phase error detection unit which detects a phase error between a reference carrier and a carrier of a quadrature modulated wave and outputs a phase error signal indicating the phase error. A loop filter passes the phase error signal from the phase error detection unit through the loop filter and converts the phase error signal into a control voltage. A voltage-controlled oscillator outputs a reference carrier synchronous with the carrier of the quadrature modulated wave based on the control voltage. A sweep unit changes the control voltage output to the oscillator when pulling the reference carrier into synchronism in response to an out-of-sync alarm signal. The sweep unit outputs a staircase sweep signal having a selected level, the sweep signal being added to the phase error signal such that the control voltage output to the oscillator is changed by the staircase sweep signal.

Abstract: A distortion compensating device provided in a receiver for compensating distortion which is added to a signal in a transmission path. The signal is generated in a multi-level modulator of a transmitter in which a digital signal is mapped to one of a plurality of specified signal points in a signal space diagram. The device includes a signal-point-position averaging circuit for producing an average signal point for each of a plurality of distributions of received signal points in the signal space diagram. A discrimination circuit in the device discriminates the average signal point closest to a received signal point from other average signal points in the signal space diagram.

Abstract: A demodulator with a cross polarization interference canceling function for canceling interference of cross polarization in the main polarization includes a demodulating unit for demodulating a baseband signal of the main polarization, a phase control unit which controls the phase of an interference signal, which is a baseband signal of cross polarization, based upon an error in the demodulated signal, and an interference cancellation unit which cancels an interference signal component from the demodulated signal of the main polarization.

Abstract: A distortion compensating device provided in a receiver for compensating distortion which is added to a signal in a transmission path. The signal is generated in a multi-level modulator of a transmitter of which a digital signal is mapped to one of a plurality of specified signal points in a signal space diagram. The device includes discrimination circuits for discriminating a received signal according to threshold lines partitioning the signal space diagram into discrimination areas, the threshold lines being defined so that the discrimination areas on an outer side of the signal space diagram having each an area greater than an area of each of the discrimination areas on an inner side of the signal space diagram and a selection circuit for selecting one of a plurality of threshold line patterns based on a level of the received signal which is discriminated according to a selected threshold line pattern.

Abstract: A radio receiving apparatus regenerates a clock synchronized to a symbol clock contained in a quadrature demodulated signal obtained by demodulating a multilevel quadrature modulated signal, converts the analog quadrature demodulated signal, at the timing at which the regenerated clock occurs, to digital data and outputs the digital data via a transversal equalizer. The apparatus includes a slope discriminator for outputting the slope of an in-phase signal constituting the quadrature demodulated signal. A FIR filter constructing the equalizer outputs, as an error signal between input and output signals of the equalizer, an output signal of the FIR filter which prevails when a center tap coefficient of the filter is regarded as being zero.

Abstract: A demodulator using quasi-synchronous detection to demodulate modulated quadrature input signals. The demodulator has a quasi-synchronous detector detecting a modulated quadrature input signal using an output signal of a fixed frequency from a local oscillator, an equalizer equalizing a quadrature channel signal which is a digital signal converted from the detected quadrature signal from the quasi-synchronous detector, and a phase rotator rotating the phase of the equalized quadrature channel signal output from the equalizer. Furthermore, the demodulator has an equalization control unit to generate a tap factor for the equalizer from the quadrature channel signal equalized by the equalizer, using a signal having substantially the same phase as the input-output signals of the equalizer.

Abstract: A space diversity receiver apparatus receives signals by two spatially separated antennas, controls the phase of the signal received by one of the antennas by a phase control circuit, combines the phase-controlled signal and the signal received by the other antenna by a combiner and outputs the combined signal. A digital detector digitally detects the center frequency level and the levels on high- and low-frequency sides of the center frequency of the combined signal. Phase is controlled in such a manner that the center frequency level will coincide with a set level and a deviation between the levels on the high- and low-frequency sides of the center frequency will become zero.

Abstract: A clock phase detecting circuit is provided which is arranged in a receiving section of a multiplex radio apparatus. Difference detecting unit detects the difference between input and output signals to and from an equalizing circuit, and squaring unit squares the detected difference. The squared value thus obtained shows a minimum value when the phase of a clock signal output from a clock regenerating circuit coincides with a normal position of signal point. Therefore, phase adjusting unit outputs a control signal to the clock regenerating circuit while monitoring the squared value, to adjust the phase of the clock signal output from the clock regenerating circuit so that the squared value output from the squaring unit may be minimized.

Abstract: A digital modulator and digital demodulator with quadrature amplitude modulation (QAM) schemes, which are designed to modulate or demodulate RZ-coded baseband signals. The digital modulator comprises first to fourth roll-off filters and a first and second inverters connected to the second and fourth roll-off filters. It also comprises a parallel-to-serial converter to successively selects the outputs of the first roll-off filter, third roll-off filter, first inverter, and second inverter. A D/A converter converts the selected digital signal stream into an analog signal. The roll-off filters and inverters operate at a predetermined clock frequency, while the parallel-to-serial converter and the D/A converter work at a frequency four times the predetermined clock frequency. The digital demodulator reverses the above modulation process to reproduce the baseband signals.

Abstract: The invention provides an automatic amplitude equalizer for compensating an amplitude characteristic of an input signal, wherein a control signal for equalizing an inclination amplitude distortion of an input signal is detected making use of a pair of digital demodulated signals to compensate for the amplitude characteristic of the input signal with a high degree of accuracy and which can be constructed with a reduced circuit scale and at a reduce cost.

Abstract: A jitter suppressing circuit is provided for suppressing jitter generated in a multistate quadrature amplitude modulation type modulator or demodulator. Based on I- and Q-phase signals containing jitter, a signal point specified by the I- and Q-phase signals is obtained, and a phase difference between the signal point and an ideal signal point closest thereto is detected. Whether the ideal signal point belongs to a predetermined signal point group is then determined. When the result of determination is affirmative, the phase of the signal point specified by the I- and Q-phase signals containing jitter is corrected, on the basis of the detected phase difference.

Abstract: A method and apparatus for inter-cross wave compensation. There are provided a frequency conversion unit for performing frequency conversion for one of two received polarized wave signals, an analog/digital converter for converting the one of the polarized wave signals into a digital signal, a digital orthogonal detection unit for obtaining two orthogonal detection signals, and a digital equalizing unit for performing an equalizing process for outputs of the orthogonal detection unit. Further provided are a digital inter-cross wave compensating unit for receiving the other of the two received polarized wave signals as a digital signal and for outputting a signal used for compensating the output of the equalizing unit, and an adding unit for adding the output of the equalizing unit and the output of the digital inter-cross wave compensating unit.

Abstract: A carrier reproducing circuit for detecting a phase error when an inputted baseband signal is out of phase and bringing the baseband signal into phase even in QAM systems in which normal signal points are located in a non-square pattern in a phase-amplitude signal space. When the baseband signal is out of phase, a first region decision circuit detects a presence of the baseband signal in a first region and outputs a first signal, and a second region decision circuit detects a presence of the baseband signal in a second region and outputs a second signal. If the second signal is not outputted over a predetermined period of time around the time at which the first signal is outputted, then a selective outputting circuit outputs a phase error detected by a phase error decision circuit with respect to the baseband signal at the time the first signal is outputted, to a control signal generator.

Abstract: The present invention relates to a clock phase detecting circuit and a clock regenerating circuit each arranged in a receiving unit of multiplex radio equipment. The receiving unit of the multiplex radio equipment includes an identifying circuit for identifying a signal obtained by demodulating a multilevel orthogonal modulation signal; a clock regenerating circuit for regenerating a signal identification clock for the identifying circuit to supply the clock to the identifying circuit; an equalizing circuit for subjecting the signal obtained by demodulating a multilevel orthogonal modulation signal to an equalizing process. A clock phase detecting unit detects the phase component of the signal identification clock based on signals input to or output from the equalizing circuit and then supplies the phase component to the clock regenerating circuit.

Abstract: A repeater wherein quadrature detection is performed using signal form a local oscillator nonsynchronized to a received carrier, and a baseband signal is reproduced, with the frequency and phase difference between the received carrier and the local oscillator being compensated for by means of a feedback loop consisting of a phase rotator, a controller, a loop filer, and a digital VCO. The reproduced baseband signal is quadratue-modulated with the signal from the local oscillator. The local oscillator necessary for the operation of the repeater is shared between the demodulator and the modulator; reductions in the size and cost of the repeater can be achieved.

Abstract: A cross polarization interference canceler includes a digital conversion circuit for subjecting a demodulated signal of one channel to an analog-to-digital conversion out of two channels which are independently formed using carriers having the same frequency but having planes of polarization which are mutually orthogonal. An interference cancelling circuit cancels interference caused by the other channel out of the two channels, with respect to the demodulated signal which is digitally converted by the digital conversion circuit. An integrator circuit performs an integration process with respect to the demodulated signal which is digitally converted by the digital conversion circuit so as to provide negative feedback to the digital conversion circuit.

Abstract: A digital modulator and digital demodulator with quadrature amplitude modulation (QAM) schemes, which are designed to modulate or demodulate RZ-coded baseband signals. The digital modulator includes first to fourth roll-off filters and a first and second inverters connected to the second and fourth roll-off filters. It also includes a parallel-to-serial converter to successively select the outputs of the first roll-off filter, third roll-off filter, first inverter, and second inverter. A D/A converter converts the selected digital signal stream into an analog signal. The roll-off filters and inverters operate at a predetermined clock frequency, while the parallel-to-serial converter and the D/A converter work at a frequency four times the predetermined clock frequency. The digital demodulator reverses the above modulation process to reproduce the baseband signals.

Abstract: The present invention relates to a quasi-synchronous detection and demodulation circuit with a contingent demodulation carrier phase removing function and to a frequency discriminator used in the above circuit and for detecting with a good accuracy the difference between the carrier frequency of a modulated wave and a reference carrier frequency for demodulation. In order to detect a normal frame pattern by a frame pattern detecting means, the quasi-synchronous detection and demodulation circuit compensates an output carrier phase issued from a carrier generating means to add to a phase rotation means and removes a contingent demodulated carrier phase. The frequency discriminator limits a frequency deviation to less than an upper value according to the accuracy of a reference carrier signal.

Abstract: A transversal type digital roll-off filter receiving a signal n-time sampled from analog signal carrying a pulse train of symbol rate T, includes a transversal type delay line including a plurality of delay elements each having a delay time T/n. Nodes are positioned between adjacent two delay elements. The filter further includes a memory for providing first tap rating ratios to control signals of the nodes and a calculation circuit for monitoring pulse forms of the output signal of the filter, and calculating second ratios to additionally control a central node and every n-th node counted from the central node, where the second ratios are calculated to make the output pulse good in shape. The filter acts as a roll-off filter and as an automatic equalizer. In a method of diagnosing the circuits in the above system, a memory in a transmitter further has second tap rating ratios used to diagnose the system, where the first and second ratios are switchably output to a digital filter in the transmitter.