Abstract: A carrier regeneration circuit achieves quick frequency synchronization without using a sweeper. An area judging device judges whether a baseband signal, quadrature-demodulated with a regenerated carrier output from a voltage-controlled oscillator, lies inside a designated area in a phase plane. If it is inside the designated area, an output of a phase comparator is selected, and if it has exited the area, the previous value is held. The designated area is set so that the direction of control indicated by the phase comparator, just before the baseband signal rotating in the phase plane exits the area, coincides with a direction that suppresses the rotation.

Abstract: The present invention relates to a quasi-synchronous detection and demodulation circuit with a contingent demodulation carrier phase removing function and to a frequency discriminator used in the above circuit and for detecting with a good accuracy the difference between the carrier frequency of a modulated wave and a reference carrier frequency for demodulation. In order to detect a normal frame pattern by a frame pattern detecting means, the quasi-synchronous detection and demodulation circuit compensates an output carrier phase issued from a carrier generating means to add to a phase rotation means and removes a contingent demodulated carrier phase. The frequency discriminator limits a frequency deviation to less than an upper value according to the accuracy of a reference carrier signal.

Abstract: A transversal type digital roll-off filter receiving a signal n-time sampled from analog signal carrying a pulse train of symbol rate T, includes a transversal type delay line including a plurality of delay elements each having a delay time T/n. Nodes are positioned between adjacent two delay elements. The filter further includes a memory for providing first tap rating ratios to control signals of the nodes and a calculation circuit for monitoring pulse forms of the output signal of the filter, and calculating second ratios to additionally control a central node and every n-th node counted from the central node, where the second ratios are calculated to make the output pulse good in shape. The filter acts as a roll-off filter and as an automatic equalizer. In a method of diagnosing the circuits in the above system, a memory in a transmitter further has second tap rating ratios used to diagnose the system, where the first and second ratios are switchably output to a digital filter in the transmitter.

Abstract: A fractionally spaced cross-polarization interference canceller, wherein a compensation signal is generated through an adaptive filter operating in a frequency that is an integer multiple of a transmission data frequency. The cross-polarization interference canceller includes a mechanism for generating an error signal used to control coefficients of the adaptive filter in the integer multiple frequency. The mechanism is realized, for example, by using a waveform generator generating an estimate of a baseband signal in the integer multiple frequency using a plurality of estimates of transmission data and coefficients determined by an impulse response of a transmission path.

Abstract: The present invention relates to a quasi-synchronous detection and demodulation circuit with a contingent demodulation carrier phase removing function and to a frequency discriminator used in the above circuit and for detecting with a good accuracy the difference between the carrier frequency of a modulated wave and a reference carrier frequency for demodulation. In order to detect a normal frame pattern by a frame pattern detecting means, the quasi-synchronous detection and demodulation circuit compensates an output carrier phase issued from a carrier generating means to add to a phase rotation means and removes a contingent demodulated carrier phase. The frequency discriminator limits a frequency deviation to less than an upper value according to the accuracy of a reference carrier signal.

Abstract: A digital demodulation apparatus which has a detector (11) for receiving transmission signals (S.sub.in) modulated under a multivalue quadrature amplitude modulation method in accordance with a honeycomb signal structure point arrangement. The detector produces I channel and Q channel demodulation signals. The apparatus also includes a discriminator (13) which converts the analog demodulation signals (Sa) to digital demodulation signals (Sd), a memory (21) which successively receives said digital demodulation signals (Sd) and reproduces corresponding original data. The read only memory (21) stores data representatives of the honeycomb signal structure point arrangement, and stores polarity bits (P) and error bits (.epsilon.) of the signal points.

Abstract: A cross polarization interference canceller cancels interference polarization by providing a phase difference detecting circuit for detecting a phase difference between a main polarization and an interference polarization component of the main polarization, and a phase shifter for shifting a data discrimination clock signal of the interference polarization wave component.

Abstract: The present invention relates to a circuit which controls the decision timing for deciding multi-level signal to the optimum decision timing. The control is carried out in such a manner as reducing deviation of phase of decision clock by deciding slope of multi-level signal at the center decision timing from the decision data at least continuous three decision timings and deciding deviation of decision timing from the slope and error signal at the center decision timing. Moreover, two kinds of slope decision are realized and the desired slope decision can be selected in accordance with the line condition.

Abstract: A received multi-level signal is demodulated and when drift of the received signal is comparatively small, an error signal is selected, integrated and added to the received signal to correct the drift. The error signal is indicative of a condition of an anglog-to-digital conversion or decision level of the received signal. The condition of the decision level is monitored and when, on the basis of the monitored decision level it is detected that drift of the received signal is large, the error signal is selected corresponding to a specified range and includes bit signals of higher order than a most significant bit and of lower order than a least significant bit of the converted digital signal. The selected error signal is then integrated and added to the demodulated received multi-level signal. A pseudo pulling condition in feedback control is thereby prevented.

Abstract: A digital communication system using a QAM signal and a honeycomb constellation multilevel signal. The digital communication system includes a modulator having a unit for transforming in-phase and quadrature-phase data arranged in a quadrature lattice constellation into two data arranged in a honeycomb constellation, and a unit for amplitude-modulating the transformed data. A demodulator demodulates a transmitted signal output from the modulator.

Abstract: A circuit is provided for controlling the decision timing of an A/D converter so that error rate becomes small. Error rate information is obtained based on the converted digital signal from the A/D converter. This information is used for controlling the phase of an A/D converter clock signal to thereby control the decision timing of the A/D converter.