Abstract: A semiconductor device includes an electrode plate, a metallic member, and solder connecting the metallic member with the electrode plate. On a surface of the electrode plate, a first groove and a group of second grooves are provided. The first groove has first to fourth linear parts. The group of second grooves is arranged within a range surrounded by the first groove, and has end portions on an outer periphery side that are connected with the first groove. The group of second grooves includes first to fourth sets. Each of the sets includes a plurality of second grooves connected with the first to fourth linear parts. When the metallic member is seen in a lamination direction of the electrode plate and the metallic member, an outer peripheral edge of a region of the metallic member, the region being connected with the solder, goes across the first to fourth sets.

Abstract: A semiconductor device may include a semiconductor module, a busbar, and a connection member. The semiconductor module may include a semiconductor element and a power terminal connected to the semiconductor element. The power terminal of the semiconductor module may be connected to the busbar via the connection member. A fusing current of the connection member may be smaller than each of fusing currents of the power terminal and the busbar.

Abstract: A power converter may include a first and second housings, each of which houses switching elements connected in parallel. Each of the first and the second housings may be provided with a first surface and a second surface. The first and the second housings may be arranged face to face. In each of the first and the second housings, the switching elements may be aligned in an alignment direction which is parallel to both of the first and the second surfaces. An emitter terminal or a source terminal of parallel connection of the switching elements may extend from the second surface at a position equidistant from the switching elements positioned at both ends in the alignment direction among the plurality of switching elements. A collector terminal or a drain terminal of the parallel connection may be positioned adjacent to the emitter or the source terminal in the alignment direction.

Abstract: A semiconductor device may include at least one semiconductor chip, an encapsulant encapsulating the at least one semiconductor chip, a first power terminal connected to the at least one semiconductor chip within the encapsulant, and a second power terminal electrically connected to the first power terminal via the at least one semiconductor chip within the encapsulant.

Abstract: A semiconductor device includes a first metal plate and a second metal plate which interpose a first semiconductor element therebetween, the first metal plate and the second metal plate being bonded to the first semiconductor element with first soldered portions; and includes a third metal plate and a fourth metal plate which interpose a second semiconductor element therebetween, the third metal plate and the fourth metal plate being bonded to the second semiconductor element with second soldered portions. A first joint provided at an edge of the first metal plate and a second joint provided at an edge of the fourth metal plate are bonded with a third soldered portion. A total sum of thicknesses of the first soldered portions is different from a thickness of the third soldered portion, a solidifying point of the thinner one is higher than a solidifying point of the thicker one.

Abstract: A semiconductor device includes: a first semiconductor element including a first signal electrode; a second semiconductor element, laminated on the first semiconductor element, including a second signal electrode; a sealing body; a first signal terminal connected to the first signal electrode; and a second signal terminal connected to the second signal electrode, wherein: the first signal terminal and the second signal terminal project from the sealing body and extend in a first direction; the first signal terminal and the second signal terminal are distanced from each other in a second direction; the first signal electrode and the second signal electrode are placed at different positions in the second direction; the first signal electrode is provided closer to the first signal terminal than to the second signal terminal; and the second signal electrode is provided closer to the second signal terminal than to the first signal terminal.

Abstract: A semiconductor device includes: a first semiconductor element; a first conductor plate laminated on the first semiconductor element and connected to the first semiconductor element; a first power terminal connected to the first conductor plate, the first power terminal including a body portion extending in a first direction and a joining portion extending in a second direction different from the first direction, the joining portion being connected to the first conductor plate; and a sealing body configured to seal the first semiconductor element, the first conductor plate, the joining portion, and a part of the body portion, the sealing body having a first surface that is a surface from which the body portion projects and a second surface that is a surface placed on an opposite side of the sealing body from the first surface.

Abstract: A semiconductor device may include a first conductive plate, a plurality of semiconductor chips disposed on the first conductive plate, and a first external connection terminal connected to the first conductive plate. The plurality of semiconductor chips may include first, second, and third semiconductor chips. The second semiconductor chip may be located between the first semiconductor chip and the third semiconductor chip. A portion of the first conductive plate where the first external connection terminal is connected may be closest to the second semiconductor chip among the first, second, and third semiconductor chips. The first conductive plate may be provided with an aperture located between the portion of the first conductive plate where the first external connection terminal is connected and a portion of the first conductive plate where the second semiconductor chip is connected.

Abstract: A power converter may include a first and second housings, each of which houses switching elements connected in parallel. Each of the first and the second housings may be provided with a first surface and a second surface. The first and the second housings may be arranged face to face. In each of the first and the second housings, the switching elements may be aligned in an alignment direction which is parallel to both of the first and the second surfaces. An emitter terminal or a source terminal of parallel connection of the switching elements may extend from the second surface at a position equidistant from the switching elements positioned at both ends in the alignment direction among the plurality of switching elements. A collector terminal or a drain terminal of the parallel connection may be positioned adjacent to the emitter or the source terminal in the alignment direction.

Abstract: A semiconductor device includes a first semiconductor element, a first signal terminal group, and a second signal terminal group disposed at an interval from the first signal terminal group. The first semiconductor element includes a control signal electrode to which a control signal for the first semiconductor element is input, and a temperature signal electrode that outputs a signal corresponding to temperature of the first semiconductor element. The temperature signal electrode is connected with a temperature signal terminal included in the first signal terminal group, and the control signal electrode is connected with a first control signal terminal included in the second signal terminal group.

Abstract: A semiconductor device includes a first semiconductor element having an upper electrode and a lower electrode, a first upper heat sink connected to the upper electrode, and a first lower heat sink connected to the lower electrode. The first lower heat sink is opposed to the first upper heat sink such that the first semiconductor element is sandwiched between the upper and lower heat sinks. One of the first upper heat sink and the first lower heat sink is a laminated substrate having an insulator substrate (such as a ceramic substrate) and conductor layers disposed on opposite surfaces of the insulator substrate, and the other of the first upper heat sink and the first lower heat sink is a conductor plate that is a conductor having higher thermal conductivity than the insulator substrate.

Abstract: A semiconductor device may include: a first and a second semiconductor elements each including electrodes on both surfaces thereof; a first and a second metal plates which interpose the first semiconductor element, the metal plates respectively being bonded to the first semiconductor element via first soldered portions; and a third and a fourth metal plates which interpose the second semiconductor element, the metal plates respectively being bonded to the second semiconductor element via second soldered portions; wherein a first joint is provided at the first metal plate, a second joint is provided at the fourth metal plate, the joints are bonded via a third soldered portion, and a solidifying point of the first soldered portions is higher than a solidifying point of the third soldered portion, and a solidifying point of the second soldered portions is higher than the solidifying point of the third soldered portion.

Abstract: The semiconductor device includes a semiconductor element, and an electro-conductive first plate-like part electrically connected to a top-face-side electrode of the semiconductor element and including a first joint part projecting from a side face, and an electro-conductive second plate-like part including a second joint part projecting from a side face. A bottom face of the first joint part and a top face of the second joint part face one another, and are electrically connected via an electro-conductive bonding material. A bonding-material-thickness ensuring means is provided in a zone where the bottom face of the first joint part and the top face of the second joint part face one another to ensure a thickness of the electro-conductive bonding material between an upper portion of a front end of the second joint part and the bottom face of the first joint part.

Abstract: A method of manufacturing a semiconductor device by connecting a semiconductor chip to a lead frame using a jig, the semiconductor chip including a main electrode provided at a surface of the semiconductor chip, the lead frame including a connection projecting portion and a positioning portion, the positioning portion including at least one of a convex shape and a concave shape provided around the connection projecting portion, the method may include: engaging the jig to the positioning portion in a state where a clearance is provided between the connection projecting portion and the jig; engaging the jig to the semiconductor chip; and connecting the connection projecting portion to the main electrode of the semiconductor chip via solder in a state where the jig is engaged to the positioning portion and the semiconductor chip.

Abstract: A semiconductor device includes an electrode plate, a metallic member, and solder connecting the metallic member with the electrode plate. On a surface of the electrode plate, a first groove and a group of second grooves are provided. The first groove has first to fourth linear parts. The group of second grooves is arranged within a range surrounded by the first groove, and has end portions on an outer periphery side that are connected with the first groove. The group of second grooves includes first to fourth sets. Each of the sets includes a plurality of second grooves connected with the first to fourth linear parts. When the metallic member is seen in a lamination direction of the electrode plate and the metallic member, an outer peripheral edge of a region of the metallic member, the region being connected with the solder, goes across the first to fourth sets.

Abstract: A semiconductor device may include: a first and a second semiconductor elements each including electrodes on both surfaces thereof; a first and a second metal plates which interpose the first semiconductor element, the metal plates respectively being bonded to the first semiconductor element via first soldered portions; and a third and a fourth metal plates which interpose the second semiconductor element, the metal plates respectively being bonded to the second semiconductor element via second soldered portions; wherein a first joint is provided at the first metal plate, a second joint is provided at the fourth metal plate, the joints are bonded via a third soldered portion, and a solidifying point of the first soldered portions is higher than a solidifying point of the third soldered portion, and a solidifying point of the second soldered portions is higher than the solidifying point of the third soldered portion.

Abstract: A semiconductor device includes a first metal plate and a second metal plate which interpose a first semiconductor element therebetween, the first metal plate and the second metal plate being bonded to the first semiconductor element with first soldered portions; and includes a third metal plate and a fourth metal plate which interpose a second semiconductor element therebetween, the third metal plate and the fourth metal plate being bonded to the second semiconductor element with second soldered portions. A first joint provided at an edge of the first metal plate and a second joint provided at an edge of the fourth metal plate are bonded with a third soldered portion. A total sum of thicknesses of the first soldered portions is different from a thickness of the third soldered portion, a solidifying point of the thinner one is higher than a solidifying point of the thicker one.

Abstract: A semiconductor device includes a substrate, a semiconductor element, a terminal and a solder outflow prevention part. The semiconductor element is fixed on one side of the substrate via a first solder layer. The terminal that is fixed on the one side of the substrate via a second solder layer. The solder outflow prevention part is formed between the semiconductor element and the terminal in the one side of the substrate and is configured to prevent the first solder layer and the second solder layer from outflowing. A distance between the solder outflow prevention part and the semiconductor element is longer than a thickness of the first solder layer.

Abstract: The purpose of the present invention is to provide an anticancer agent for potentiating an antitumor effect, alleviating side effects, and further extending the survival rate by concomitant use with a component having an anticancer effect. An anticancer agent combining arctigenin and a component other than arctigenin that has an anticancer effect, in which the anticancer agent may be a combination drug or may be a kit configured from a formulation containing arctigenin and a formulation containing a component that has an anticancer effect, and the concomitant use of arctigenin and the component having an anticancer effect more strongly inhibits tumor growth and reduces the proportion of cancer stem cells in the tumor, making it possible to extend the total survival time and to alleviate side effects caused by the component having an anticancer effect.

Abstract: A semiconductor device includes: opposed first and second metal plates; a plurality of semiconductor elements each interposed between the first metal plate and the second metal plate; a metal block interposed between the first metal plate and each of the semiconductor elements; a solder member interposed between the first metal plate and the metal block and connecting the first metal plate to the metal block; and a resin molding sealing the semiconductor elements and the metal block. A face of the first metal plate, which is on an opposite side of a face of the first metal plate to which the metal block is connected via the solder member, is exposed from the resin molding. The first metal plate has a groove formed along an outer periphery of a region in which the solder member is provided, the groove collectively surrounding the solder member.