Patents by Inventor Takanori Yokoyama
Takanori Yokoyama has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10617952Abstract: When one node, from nodes included in either a finite state machine including a node to which a state of a character is assigned or a behavior tree including a node to which action content of a character is assigned, is designated in accordance with a user operation, a screen, that is for querying a user as to which of a finite state machine and a behavior tree to assign to the one node, is caused to be displayed on a display screen. One from the finite state machine and the behavior tree that is selected in accordance with a user operation is assigned to the one node.Type: GrantFiled: March 10, 2016Date of Patent: April 14, 2020Assignee: SQUARE ENIX CO., LTD.Inventors: Youichiro Miyake, Takanori Yokoyama, Kousuke Namiki, Yoji Shirakami
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Publication number: 20180043258Abstract: When one node, from nodes included in either a finite state machine including a node to which a state of a character is assigned or a behavior tree including a node to which action content of a character is assigned, is designated in accordance with a user operation, a screen, that is for querying a user as to which of a finite state machine and a behavior tree to assign to the one node, is caused to be displayed on a display screen. One from the finite state machine and the behavior tree that is selected in accordance with a user operation is assigned to the one node.Type: ApplicationFiled: March 10, 2016Publication date: February 15, 2018Applicant: SQUARE ENIX CO., LTD.Inventors: Youichiro MIYAKE, Takanori YOKOYAMA, Kousuke NAMIKI
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Patent number: 8347282Abstract: An embedded controller development tool which generates an interface means for preserving and outputting a control data calculated by the control operation means based on a specific computational procedure, and providing said control data to a plurality of control operation means including said control operation means; wherein the control operation means is described as a function in the source code of the program, the reference data used for calculation by said control operation is an argument of the function, said control data calculated by said control operation means is the argument of the function which points the return value or the address of said function.Type: GrantFiled: August 20, 2008Date of Patent: January 1, 2013Assignee: Hitachi, Ltd.Inventors: Kentaro Yoshimura, Taizo Miyazaki, Takanori Yokoyama
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Patent number: 8131388Abstract: The electronic controller fetches an external signal and performs an input process such as A-D conversion. Upon receipt of processing results for executing operations according to a predetermined program, an output process is performed for sending a signal to the outside board on operation results, a timer outputs at least two of an input process start signal for starting the input process, an output process start signal for starting the output process, and an operation start signal for starting the operation.Type: GrantFiled: June 11, 2009Date of Patent: March 6, 2012Assignee: Hitachi, Ltd.Inventors: Yuichiro Morita, Kotaro Shimamura, Kunihiko Tsunedomi, Shinya Imura, Shoji Sasaki, Takanori Yokoyama
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Patent number: 8046087Abstract: The electronic controller fetches an external signal and performs an input process such as A-D conversion. Upon receipt of processing results for executing operations according to a predetermined program, an output process is performed for sending a signal to the outside board on operation results, a timer outputs at least two of an input process start signal for starting the input process, an output process start signal for starting the output process, and an operation start signal for starting the operation.Type: GrantFiled: November 4, 2004Date of Patent: October 25, 2011Assignee: Hitachi, Ltd.Inventors: Yuichiro Morita, Kotaro Shimamura, Kunihiko Tsunedomi, Shinya Imura, Shoji Sasaki, Takanori Yokoyama
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Patent number: 7836233Abstract: A serial communication interface (SCI) cable 4 is provided between the slave processor 2 and the master processor 3. Both processors are connected with a communication interface for peripheral units (SPI: Serial Peripheral Interface) which enables fast transmission. The slave processor 2 transmits a transmission request command which requests at least one of data transmission and reception from the command communication section 220 to the master processor 3 through the SCI cable 4. The master processor 3 transfers data to and from the slave processor 2 in communication with the slave processor 2 by means of the data communication section 310 through the fast SPI cable 5 in response to a transmission request command sent from the slave processor 2 With this, the processing ability of a multi-processor system can be increased.Type: GrantFiled: August 19, 2003Date of Patent: November 16, 2010Assignee: Hitachi, Ltd.Inventors: Kunihiko Tsunedomi, Kentaro Yoshimura, Nobuyasu Kanekawa, Takanori Yokoyama, Mitsuru Watabe
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Patent number: 7680228Abstract: In addition to fast on-off timing, instructive information on an output wave such as an amplitude or a slope is transmitted through a small number of signal lines. Output wave modifier information such as the amplitude or slope is transferred through serial communication 1, and an on-off timing signal is transmitted as an individual signal 20.Type: GrantFiled: October 1, 2004Date of Patent: March 16, 2010Assignee: Hitachi, Ltd.Inventors: Nobuyasu Kanekawa, Shoji Sasaki, Takanori Yokoyama, Kunihiko Tsunedomi, Junji Miyake, Katsuya Oyama
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Publication number: 20090248181Abstract: The electronic controller fetches an external signal and performs an input process such as A-D conversion. Upon receipt of processing results for executing operations according to a predetermined program, an output process is performed for sending a signal to the outside board on operation results, a timer outputs at least two of an input process start signal for starting the input process, an output process start signal for starting the output process, and an operation start signal for starting the operation.Type: ApplicationFiled: June 11, 2009Publication date: October 1, 2009Applicant: HITACHI LTD.Inventors: Yuichiro MORITA, Kotaro Shimamura, Kunihiko Tsunedomi, Shinya Imura, Shoji Sasaki, Takanori Yokoyama
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Patent number: 7484214Abstract: A real-time control system for executing exactly a cyclic task, preventing a delay of the processing start time due to accumulation of a plurality of overhead times, thereby executing control enabling a more detailed response and control enabling a quick and reliable response to a plurality of instructions is provided. The real-time control system includes a driver unit for receiving an input signal and outputting an interruption signal corresponding to each task process, a polling unit for polling on the basis of the concerned interruption signal, and a task processor for performing a task process on the basis of the interruption signal, wherein the polling unit outputs a task processing signal on the basis of the polling when the task is finished and the task processor performs the task process on the basis of the task processing signal.Type: GrantFiled: August 4, 2003Date of Patent: January 27, 2009Assignee: Hitachi, Ltd.Inventors: Kunihiko Tsunedomi, Shinya Imura, Takanori Yokoyama
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Publication number: 20090022255Abstract: In addition to fast on-off timing, instructive information on an output wave such as an amplitude or a slope is transmitted through a small number of signal lines. Output wave modifier information such as the amplitude or slope is transferred through serial communication 1, and an on-off timing signal is transmitted as an individual signal 20.Type: ApplicationFiled: October 1, 2004Publication date: January 22, 2009Applicant: Hitachi, Ltd.Inventors: Nobuyasu Kanekawa, Shoji Sasaki, Takanori Yokoyama, Kunihiko Tsunedomi, Junji Miyake, Katsuya Oyama
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Publication number: 20080313614Abstract: An embedded controller development tool which generates an interface means for preserving and outputting a control data calculated by the control operation means based on a specific computational procedure, and providing said control data to a plurality of control operation means including said control operation means; wherein the control operation means is described as a function in the source code of the program, the reference data used for calculation by said control operation is an argument of the function, said control data calculated by said control operation means is the argument of the function which points the return value or the address of said function.Type: ApplicationFiled: August 20, 2008Publication date: December 18, 2008Applicant: HITACHI, LTD.Inventors: Kentaro YOSHIMURA, Taizo Miyazaki, Takanori Yokoyama
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Publication number: 20080282118Abstract: The highly reliable distributed system is composed of a communication protocol processing unit which comprises a mailbox for storing a communication message, and executes communication protocol processing between data of an application program and a network controller using the network controller performing network communication of the message in the mailbox; an error detection coding unit; an error detection decoding unit which reconverts data converted from communication data by the error detection coding unit to the original data, and detects that the content of the data is damaged if it is damaged; and a data comparing unit for checking whether or not two kinds of data agree with each other.Type: ApplicationFiled: March 21, 2008Publication date: November 13, 2008Applicant: HITACHI, LTD.Inventors: Wataru NAGAURA, Takanori Yokoyama, Shoji Suzuki, Satoru Kuragaki, Takaaki Imai
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Patent number: 7356739Abstract: The highly reliable distributed system is composed of a communication protocol processing unit which comprises a mailbox for storing a communication message, and executes communication protocol processing between data of an application program and a network controller using the network controller performing network communication of the message in the mailbox; an error detection coding unit; an error detection decoding unit which reconverts data converted from communication data by the error detection coding unit to the original data, and detects that the content of the data is damaged if it is damaged; and a data comparing unit for checking whether or not two kinds of data agree with each other.Type: GrantFiled: March 21, 2006Date of Patent: April 8, 2008Assignee: Hitachi, Ltd.Inventors: Wataru Nagaura, Takanori Yokoyama, Shoji Suzuki, Satoru Kuragaki, Takaaki Imai
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Publication number: 20070159126Abstract: A position (or angle, in a rotary motion) sensor and a force (or torque, in a rotary motion) sensor of a master that are required for the construction a conventional force-feedback or parallel bilateral servo are used as mutually redundant sensors. In the force-feedback or parallel bilateral servo, a target position (angle) of a slave can be determined by a sensor other than a failed sensor, allowing a control operation to continue. Because the sensors that are originally provided for bilateral servo are utilized as redundant sensors, a control device having a predetermined reliability can be provided with a lower sensor redundancy.Type: ApplicationFiled: January 20, 2004Publication date: July 12, 2007Applicant: HITACHI, LTD.Inventors: Nobuyasu Kanekawa, Shoji Sasaki, Takanori Yokoyama
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Patent number: 7228372Abstract: A data communication system includes a master device, a plurality of slave devices, at least either a data transmission bus which connects the master device to a plurality of slave devices to transfer data from the master device to the slave devices in synchronism with a synchronous clock signal or a data reception bus over which the master device receives data from the slave devices in synchronism with a synchronous clock signal, and Chip Select signal lines which one-to-one connect the master device to the slave devices. The data communication system also includes communication drivers for setting a physical protocol of each slave device and a communication manager to arbitrate serial communications between the master device and the slave devices. The communication manager arbitrates serial communications to slave devices by their proper physical protocols. Communication protocols such as baud rates, clock polarities, and clock phases are switched by asserted Chip Select signal lines.Type: GrantFiled: December 21, 2004Date of Patent: June 5, 2007Assignee: Hitachi, Ltd.Inventors: Kentaro Yoshimura, Wataru Nagaura, Takanori Yokoyama, Nobuyasu Kanekawa
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Publication number: 20060161820Abstract: The highly reliable distributed system is composed of a communication protocol processing unit which comprises a mailbox for storing a communication message, and executes communication protocol processing between data of an application program and a network controller using the network controller performing network communication of the message in the mailbox; an error detection coding unit; an error detection decoding unit which reconverts data converted from communication data by the error detection coding unit to the original data, and detects that the content of the data is damaged if it is damaged; and a data comparing unit for checking whether or not two kinds of data agree with each other.Type: ApplicationFiled: March 21, 2006Publication date: July 20, 2006Inventors: Wataru Nagaura, Takanori Yokoyama, Shoji Suzuki, Satoru Kuragaki, Takaaki Imai
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Publication number: 20060143694Abstract: A check system for checking on registration of a telephone number accessing the home server in response to a call-up to the home server via a public telephone network is provided, and an internet-connection service call function is further provided within an internet service provider. The home server accepts only a registered telephone number, and performs an internet service which has been accepted by the check system.Type: ApplicationFiled: February 21, 2006Publication date: June 29, 2006Inventors: Shoji Suzuki, Takanori Yokoyama
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Patent number: 7036050Abstract: The highly reliable distributed system is composed of a communication protocol processing unit which comprises a mailbox for storing a communication message, and executes communication protocol processing between data of an application program and a network controller using the network controller performing network communication of the message in the mailbox; an error detection coding unit; an error detection decoding unit which reconverts data converted from communication data by the error detection coding unit to the original data, and detects that the content of the data is damaged if it is damaged; and a data comparing unit for checking whether or not two kinds of data agree with each other.Type: GrantFiled: July 7, 2004Date of Patent: April 25, 2006Assignee: Hitachi, Ltd.Inventors: Wataru Nagaura, Takanori Yokoyama, Shoji Suzuki, Satoru Kuragaki, Takaaki Imai
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Publication number: 20060059491Abstract: A plurality of tasks are managed by being classified into a communication task group, a control task group, and a management task group for management. An execution order of the plurality of tasks is switched by a group unit and, in accordance with a switched task group, information obtained from a LAN or information obtained from each device is processed by a CPU.Type: ApplicationFiled: November 3, 2005Publication date: March 16, 2006Applicant: HITACHI, LTD.Inventors: Shoji Suzuki, Kunihiko Tsunedomi, Satoru Funaki, Masahiko Saito, Yasuyuki Kojima, Takanori Yokoyama, Atsushi Ito
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Patent number: 6993765Abstract: A plurality of tasks are managed by being classified into a communication task group, a control task group, and a management task group for management. An execution order of the plurality of tasks is switched by a group unit and, in accordance with a switched task group, information obtained from a LAN or information obtained from each device is processed by a CPU.Type: GrantFiled: March 20, 2002Date of Patent: January 31, 2006Assignee: Hitachi, Ltd.Inventors: Shoji Suzuki, Kunihiko Tsunedomi, Satoru Funaki, Masahiko Saito, Yasuyuki Kojima, Takanori Yokoyama, Atsushi Ito