Patents by Inventor Takanori Yokoyama
Takanori Yokoyama has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Publication number: 20050267953Abstract: The present invention provides a real-time distributed system which can improve productivity of software by suppressing a volume of software change incident to change in the system configuration, and can send or receive a message requested to be sent or received corresponding to its priority. A middleware is contained in each of control units. Services of the middleware in each of the control units are as follows, that is, 1. tasks T1, . . . , Tn for executing starting AP modules and calling RT communication processing according to starting order information and the like in AP configuration information, and 2. RT communication service for executing sending and receiving messages Msgl, . . . , Msgn between the AP modules corresponding to the calling. The AP configuration information and the messages are generated by an information processor based on user defined information and transmitted to each of the units by on-line or off-line.Type: ApplicationFiled: June 28, 2005Publication date: December 1, 2005Applicant: HITACHI, LTD.Inventors: Shoji Suzuki, Takanori Yokoyama, Wataru Nagaura, Takaaki Imai
-
Publication number: 20050235085Abstract: The digital controller includes an interrupt generator for generating an interrupt signal at predetermined intervals, a task execution controller for controlling execution of a control task in response to an interrupt signal generated by the interrupt generator, and an interrupt disabler for, when the control task is being executed, disabling an interrupt for any control task. The control task is divided into two parts: a first control task part including a calculation using a parameter associated with the predetermined interval; and a second control task part including a process using the result of the calculation performed in the first control task part. If an overrun of the control task occurs as a result of a failure to complete the control task within the predetermined interval, the execution controller performs the next execution of the control task such that at least the first control task part is completed within the predetermined interval.Type: ApplicationFiled: August 20, 2004Publication date: October 20, 2005Inventors: Masanori Ichinose, Takanori Yokoyama
-
Patent number: 6957434Abstract: A distributed computing system having a plurality of computers different from each other in performance, load, and type, uniformly manages local priority schemes adapted in the respective computers by utilizing the concept of “urgency” or “time limit”. Each of the computers includes a priority level conversion procedure for performing a conversion between an urgency level and a priority level of processing in accordance with the performance and the load of the computer, and a priority level changing procedure for changing a priority level of a program, which executes the processing, in accordance with a priority level indicated by the priority level conversion procedure.Type: GrantFiled: January 15, 2003Date of Patent: October 18, 2005Assignee: Hitachi, Ltd.Inventors: Masahiko Saito, Takanori Yokoyama, Masaru Shimada, Kunihiko Tsunedomi, Tomoaki Nakamura
-
Publication number: 20050172059Abstract: A data communication system uses an SPI bus having a plurality of devices wherein data communications are enabled using communication protocols optimum to respective devices. The system includes a master device connected to a plurality of slave devices via a data transmission bus by which the master device transfers data to the slave devices, or a data reception bus by which the master device receives data from the slave devices, in a synchronism with a synchronous clock signal. Chip select signal lines also connect the master device to the slave devices, on a one to one basis. Communication drivers set a physical protocol of each slave device, and a communication manager arbitrates serial communications between the master device and the slave devices by their proper physical protocols. Communication protocols such as baud rates, clock polarities, and clock phases are switched by asserted Chip Select signal lines.Type: ApplicationFiled: December 21, 2004Publication date: August 4, 2005Applicant: Hitachi, Ltd.Inventors: Kentaro Yoshimura, Wataru Nagaura, Takanori Yokoyama, Nobuyasu Kanekawa
-
Publication number: 20050160410Abstract: A code generation system is provided which optimizes a code generation for a control system applicable to an embedded control system without the need to increase its memory capacity. A total control unit 110 causes to read a model diagram and an operation diagram which depict a software specification stored in a memory 104, and starts specification analysis unit 106 to execute lexical and grammatical analyses thereof. Then, object-oriented function removing unit 107 is started to determine any function which is not used according to a function select item stored in the memory 104. Then, code generation unit 108 is started to generate a code on the basis of the result of the lexical and grammatical analyses of the software specification, and of an output code pattern determined by the object-oriented function removing unit 107.Type: ApplicationFiled: December 23, 2004Publication date: July 21, 2005Applicant: Hitachi, Ltd.Inventors: Fumio Narisawa, Hidemitsu Naya, Takanori Yokoyama, Keiichiro Ohkawa
-
Publication number: 20050143841Abstract: The electronic controller includes an input means (4) for fetching an external signal and performing an input process such as A-D conversion, an operation means (2), upon receipt of processing results of the input means (4), for executing operations according to a predetermined program, an output means (6) for performing the output process for a signal to the outside on the basis of the operation results of the operation means (2), and a timer means (6) for outputting at least two of an input process start signal for starting the input process by the input means (4), an output process start signal for starting the output process by the output means, and an operation start signal for starting the operation by the operation means.Type: ApplicationFiled: November 4, 2004Publication date: June 30, 2005Applicant: Hitachi, Ltd.Inventors: Yuichiro Morita, Kotaro Shimamura, Kunihiko Tsunedomi, Shinya Imura, Shoji Sasaki, Takanori Yokoyama
-
Publication number: 20050050544Abstract: A distributed computing system having a plurality of computers different from each other in performance, load, and type, uniformly manages local priority schemes adapted in the respective computers by utilizing the concept of “urgency” or “time limit”. Each of the computers includes a priority level conversion procedure for performing a conversion between an urgency level and a priority level of processing in accordance with the performance and the load of the computer, and a priority level changing procedure for changing a priority level of a program, which executes the processing, in accordance with a priority level indicated by the priority level conversion procedure.Type: ApplicationFiled: October 18, 2004Publication date: March 3, 2005Inventors: Masahiko Saito, Takanori Yokoyama, Masaru Shimada, Kunihiko Tsunedomi, Tomoaki Nakamura
-
Patent number: 6851106Abstract: A code generation system is provided which optimizes a code generation for a control system applicable to an embedded control system without the need to increase its memory capacity. A total control unit 110 causes to read a model diagram and an operation diagram which depict a software specification stored in a memory 104, and starts specification analysis unit 106 to execute lexical and grammatical analyses thereof. Then, object-oriented function removing unit 107 is started to determine any function which is not used according to a function select item stored in the memory 104. Then, code generation unit 108 is started to generate a code on the basis of the result of the lexical and grammatical analyses of the software specification, and of an output code pattern determined by the object-oriented function removing unit 107.Type: GrantFiled: February 22, 1999Date of Patent: February 1, 2005Assignee: Hitachi, Ltd.Inventors: Fumio Narisawa, Hidemitsu Naya, Takanori Yokoyama, Keiichiro Ohkawa
-
Publication number: 20040255180Abstract: The highly reliable distributed system is composed of a communication protocol processing unit which comprises a mailbox for storing a communication message, and executes communication protocol processing between data of an application program and a network controller using the network controller performing network communication of the message in the mailbox; an error detection coding unit; an error detection decoding unit which reconverts data converted from communication data by the error detection coding unit to the original data, and detects that the content of the data is damaged if it is damaged; and a data comparing unit for checking whether or not two kinds of data agree with each other.Type: ApplicationFiled: July 7, 2004Publication date: December 16, 2004Inventors: Wataru Nagaura, Takanori Yokoyama, Shoji Suzuki, Satoru Kuragaki, Takaaki Imai
-
Publication number: 20040176857Abstract: A serial communication interface (SCI) cable 4 is provided between the slave processor 2 and the master processor 3. Both processors are connected with a communication interface for peripheral units (SPI: Serial Peripheral Interface) which enables fast transmission. The slave processor 2 transmits a transmission request command which requests at least one of data transmission and reception from the command communication section 220 to the master processor 3 through the SCI cable 4.Type: ApplicationFiled: August 19, 2003Publication date: September 9, 2004Inventors: Kunihiko Tsunedomi, Kentaro Yoshimura, Nobuyasu Kanekawa, Takanori Yokoyama, Mitsuru Watabe
-
Patent number: 6779138Abstract: The highly reliable distributed system is composed of a communication protocol processing unit which comprises a mailbox for storing a communication message, and executes communication protocol processing between data of an application program and a network controller using the network controller performing network communication of the message in the mailbox; an error detection coding unit; an error detection decoding unit which reconverts data converted from communication data by the error detection coding unit to the original data, and detects that the content of the data is damaged if it is damaged; and a data comparing unit for checking whether or not two kinds of data agree with each other.Type: GrantFiled: June 20, 2003Date of Patent: August 17, 2004Assignee: Hitachi, Ltd.Inventors: Wataru Nagaura, Takanori Yokoyama, Shoji Suzuki, Satoru Kuragaki, Takaaki Imai
-
Publication number: 20040133879Abstract: An embedded controller development tool which generates an interface means for preserving and outputting a control data calculated by the control operation means based on a specific computational procedure, and providing said control data to a plurality of control operation means including said control operation means; wherein the control operation means is described as a function in the source code of the program, the reference data used for calculation by said control operation is an argument of the function, said control data calculated by said control operation means is the argument of the function which points the return value or the address of said function.Type: ApplicationFiled: December 19, 2003Publication date: July 8, 2004Applicant: Hitachi, Ltd.Inventors: Kentaro Yoshimura, Taizo Miyazaki, Takanori Yokoyama
-
Publication number: 20030212942Abstract: The highly reliable distributed system is composed of a communication protocol processing unit which comprises a mailbox for storing a communication message, and executes communication protocol processing between data of an application program and a network controller using the network controller performing network communication of the message in the mailbox; an error detection coding unit; an error detection decoding unit which reconverts data converted from communication data by the error detection coding unit to the original data, and detects that the content of the data is damaged if it is damaged; and a data comparing unit for checking whether or not two kinds of data agree with each other.Type: ApplicationFiled: June 20, 2003Publication date: November 13, 2003Applicant: Hitachi, Ltd.Inventors: Wataru Nagaura, Takanori Yokoyama, Shoji Suzuki, Satoru Kuragaki, Takaaki Imai
-
Patent number: 6591380Abstract: The highly reliable distributed system is composed of a communication protocol processing unit which comprises a mailbox for storing a communication message, and executes communication protocol processing between data of an application program and a network controller using the network controller performing network communication of the message in the mailbox; an error detection coding unit; an error detection decoding unit which reconverts data converted from communication data by the error detection coding unit to the original data, and detects that the content of the data is damaged if it is damaged; and a data comparing unit for checking whether or not two kinds of data agree with each other.Type: GrantFiled: December 6, 1999Date of Patent: July 8, 2003Assignee: Hitachi, Ltd.Inventors: Wataru Nagaura, Takanori Yokoyama, Shoji Suzuki, Satoru Kuragaki, Takaaki Imai
-
Publication number: 20030115241Abstract: A distributed computing system having a plurality of computers different from each other in performance, load, and type, uniformly manages local priority schemes adapted in the respective computers by utilizing the concept of “urgency” or “time limit”. Each of the computers includes a priority level conversion procedure for performing a conversion between an urgency level and a priority level of processing in accordance with the performance and the load of the computer, and a priority level changing procedure for changing a priority level of a program, which executes the processing, in accordance with a priority level indicated by the priority level conversion procedure.Type: ApplicationFiled: January 15, 2003Publication date: June 19, 2003Inventors: Masahiko Saito, Takanori Yokoyama, Masaru Shimada, Kunihiko Tsunedomi, Tomoaki Nakamura
-
Patent number: 6578064Abstract: A distributed computing system --,--; having a plurality of computers that differ from each other in terms of performance, load, and type, uniformly manages local priority schemes adapted in the respective computers by utilizing the concept of “urgency” or “time limit”. Each of the computers includes a priority level conversion procedure for performing a conversion between an urgency level and a priority level of processing in accordance with the performance and the load of the computer, and a priority level changing procedure for changing a priority level of a program, which executes the processing, in accordance with a priority level indicated by the priority level conversion procedure.Type: GrantFiled: October 7, 1998Date of Patent: June 10, 2003Assignee: Hitachi, Ltd.Inventors: Masahiko Saito, Takanori Yokoyama, Masaru Shimada, Kunihiko Tsunedomi, Tomoaki Nakamura
-
Publication number: 20030046324Abstract: A plurality of tasks are managed by being classified into a communication task group, a control task group, and a management task group for management. An execution order of the plurality of tasks is switched by a group unit and, in accordance with a switched task group, information obtained from a LAN or information obtained from each device is processed by a CPU.Type: ApplicationFiled: March 20, 2002Publication date: March 6, 2003Inventors: Shoji Suzuki, Kunihiko Tsunedomi, Satoru Funaki, Masahiko Saito, Yasuyuki Kojima, Takanori Yokoyama, Atsushi Ito
-
Publication number: 20020120884Abstract: The present invention provides a multi-computer fault detection system comprising a plurality of computers in communication with each other, the computers comprising, a processor, a plurality of operating systems executed by the processor and a main memory for storing a task executed on one of the operating systems wherein the monitoring is whether a fault has occurred in another one of the operating systems wherein at least one of the computers with the fault alerts another one of the computers.Type: ApplicationFiled: August 14, 2001Publication date: August 29, 2002Inventors: Tetsuaki Nakamikawa, Masahiko Saito, Takanori Yokoyama, Hiroshi Ohno
-
Publication number: 20020078385Abstract: A check means 101 for checking on registration of a telephone number accessing the home server in response to a call-up to the home server via a public telephone network, is provided, and an internet-connection service call function is further provided an internet service provider 7101. By using these means and function, the home server accepts only a registered telephone number, and performs an internet service which has been required the call-up accepted by the check means 101.Type: ApplicationFiled: July 30, 2001Publication date: June 20, 2002Inventors: Shoji Suzuki, Takanori Yokoyama
-
Publication number: 20020073411Abstract: A controller to which a plurality of apparatus can be connected has an apparatus discriminating unit for discriminating a type and/or the number of the apparatus connected to the controller. The controller further has an application discriminating unit for discriminating, based on the type and/or the number of the apparatuses discriminated by the apparatus discriminating unit, an application corresponding to the type and/or the number of the apparatuses.Type: ApplicationFiled: February 26, 2001Publication date: June 13, 2002Inventors: Kunihiko Tsunedomi, Shoji Suzuki, Tsutomu Yamada, Takanori Yokoyama, Masahiko Saito, Hidemitsu Naya, Satoru Funaki, Hiroshi Arita, Yoshinori Ohkura, Tetsuaki Nakamikawa