Patents by Inventor Takao Arase
Takao Arase has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20180040459Abstract: Disclosed herein is a plasma processing apparatus including: a processing chamber in which a sample is to be processed using plasma; a radio-frequency power source that supplies radio-frequency power for producing the plasma; and a sample stage on which the sample is to be mounted, the plasma processing apparatus further including a control unit that performs control so that plasma is produced after applying a DC voltage for electrostatically attracting the sample to the sample stage to each of two electrodes placed on the sample stage, and a heat-transfer gas for adjusting a temperature of the sample is supplied to a back surface of the sample after production of the plasma.Type: ApplicationFiled: February 6, 2017Publication date: February 8, 2018Inventors: Taku IWASE, Masahito MORI, Takao ARASE, Kenetsu YOKOGAWA
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Patent number: 9887070Abstract: To control temperature of a sample in plasma processing with high accuracy while securing an electrostatic chucking force 5 without breakdown of an electrostatic chucking film. When radio-frequency power is time modulated, a high-voltage side Vpp detector detects a first voltage value which is a peak-to-peak voltage value of a radio-frequency voltage applied to a sample stage in a first period of the time modulation having a 10 first amplitude. A low-voltage side Vpp detector detects a second voltage value which is a peak-to-peak voltage value of a radio-frequency voltage applied to the sample stage in a second period having a second amplitude smaller than the first amplitude. Then, an ESC power supply control unit controls output voltages from 15 ESC power supplies based on the first voltage value, the second voltage value and a duty ratio of the time modulation.Type: GrantFiled: August 8, 2017Date of Patent: February 6, 2018Assignee: HITACHI HIGH-TECHNOLOGIES CORPORATIONInventors: Takao Arase, Masahito Mori, Kenetsu Yokogawa, Yuusuke Takegawa, Takamasa Ichino
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Publication number: 20170338086Abstract: To control temperature of a sample in plasma processing with high accuracy while securing an electrostatic chucking force without breakdown of an electrostatic chucking film. When radio-frequency power is time modulated, a high-voltage side Vpp detector detects a first voltage value which is a peak-to-peak voltage value of a radio-frequency voltage applied to a sample stage in a first period of the time modulation having a first amplitude. A low-voltage side Vpp detector detects a second voltage value which is a peak-to-peak voltage value of a radio-frequency voltage applied to the sample stage in a second period having a second amplitude smaller than the first amplitude. Then, an ESC power supply control unit controls output voltages from ESC power supplies based on the first voltage value, the second voltage value and a duty ratio of the time modulation.Type: ApplicationFiled: August 8, 2017Publication date: November 23, 2017Applicant: HITACHI HIGH-TECHNOLOGIES CORPORATIONInventors: Takao Arase, Masahito Mori, Kenetsu Yokogawa, Yuusuke Takegawa, Takamasa Ichino
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Patent number: 9779919Abstract: To control temperature of a sample in plasma processing with high accuracy while securing an electrostatic chucking force without breakdown of an electrostatic chucking film. When radio-frequency power is time modulated, a high-voltage side Vpp detector detects a first voltage value which is a peak-to-peak voltage value of a radio-frequency voltage applied to a sample stage in a first period of the time modulation having a first amplitude. A low-voltage side Vpp detector detects a second voltage value which is a peak-to-peak voltage value of a radio-frequency voltage applied to the sample stage in a second period having a second amplitude smaller than the first amplitude. Then, an ESC power supply control unit controls output voltages from ESC power supplies based on the first voltage value, the second voltage value and a duty ratio of the time modulation.Type: GrantFiled: December 17, 2015Date of Patent: October 3, 2017Assignee: HITACHI HIGH-TECHNOLOGIES CORPORATIONInventors: Takao Arase, Masahito Mori, Kenetsu Yokogawa, Yuusuke Takegawa, Takamasa Ichino
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Publication number: 20160203958Abstract: To control temperature of a sample in plasma processing with high accuracy while securing an electrostatic chucking force without breakdown of an electrostatic chucking film. When radio-frequency power is time modulated, a high-voltage side Vpp detector detects a first voltage value which is a peak-to-peak voltage value of a radio-frequency voltage applied to a sample stage in a first period of the time modulation having a first amplitude. A low-voltage side Vpp detector detects a second voltage value which is a peak-to-peak voltage value of a radio-frequency voltage applied to the sample stage in a second period having a second amplitude smaller than the first amplitude. Then, an ESC power supply control unit controls output voltages from ESC power supplies based on the first voltage value, the second voltage value and a duty ratio of the time modulation.Type: ApplicationFiled: December 17, 2015Publication date: July 14, 2016Applicant: HITACHI HIGH-TECHNOLOGIES CORPORATIONInventors: Takao Arase, Masahito Mori, Kenetsu Yokogawa, Yuusuke Takegawa, Takamasa Ichino
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Patent number: 9230782Abstract: Plasma processing of plural substrates is performed in a plasma processing apparatus, which is provided with a plasma processing chamber having an antenna electrode and a lower electrode for placing and retaining the plural substrates in turn within the plasma processing chamber, a gas feeder for feeding processing gas into the processing chamber, a vacuum pump for discharging gas from the processing chamber via a vacuum valve, and a solenoid coil for forming a magnetic field within the processing chamber. At least one of the plural substrates is placed on the lower electrode, and the processing gas is fed into the processing chamber. RF power is fed to the antenna electrode via a matching network to produce a plasma within the processing chamber in which a magnetic field has been formed by the solenoid coil. This placing of at least one substrate and this feeding of the processing gas are then repeated until the plasma processing of all of the plural substrates is completed.Type: GrantFiled: October 7, 2014Date of Patent: January 5, 2016Assignee: HITACHI HIGH-TECHNOLOGIES CORPORATIONInventors: Eiji Ikegami, Shoji Ikuhara, Takeshi Shimada, Kenichi Kuwabara, Takao Arase, Tsuyoshi Matsumoto
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Publication number: 20150357210Abstract: There is provided a method for controlling a plasma processing apparatus that eliminates a preliminary study on a resonance point while maintaining a low contamination and a high uniformity even in multi-step etching. In a method for controlling a plasma processing apparatus including the step of adjusting a radio frequency bias current carried to a counter antenna electrode, the method includes the steps of: setting a reactance of a variable element to an initial value; detecting a bias current carried to the counter antenna electrode; searching for a maximum value of the detected electric current; and adjusting a value of the reactance of the variable element from the maximum value to the set value and then fixing the value.Type: ApplicationFiled: August 21, 2015Publication date: December 10, 2015Inventors: Masahito MORI, Akira HIRATA, Koichi YAMAMOTO, Takao ARASE
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Patent number: 9136095Abstract: There is provided a method for controlling a plasma processing apparatus that eliminates a preliminary study on a resonance point while maintaining a low contamination and a high uniformity even in multi-step etching. In a method for controlling a plasma processing apparatus including the step of adjusting a radio frequency bias current carried to a counter antenna electrode, the method includes the steps of: setting a reactance of a variable element to an initial value; detecting a bias current carried to the counter antenna electrode; searching for a maximum value of the detected electric current; and adjusting a value of the reactance of the variable element from the maximum value to the set value and then fixing the value.Type: GrantFiled: February 11, 2014Date of Patent: September 15, 2015Assignee: Hitachi High-Technologies CoporationInventors: Masahito Mori, Akira Hirata, Koichi Yamamoto, Takao Arase
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Publication number: 20150221518Abstract: In the present invention, a dry etching method for plasma etching a second laminated film in which a first laminated film in which a silicon-containing film and a silicon dioxide film are laminated is laminated in plurality and an inorganic film arranged over the second laminated film, includes etching the inorganic film and the second laminated film by a mixed gas of an NF3 gas and a CH3F gas.Type: ApplicationFiled: July 31, 2014Publication date: August 6, 2015Inventors: Satoshi Terakura, Masahito Mori, Takao Arase, Ryuta Machida
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Publication number: 20150020970Abstract: Plasma processing of plural substrates is performed in a plasma processing apparatus, which is provided with a plasma processing chamber having an antenna electrode and a lower electrode for placing and retaining the plural substrates in turn within the plasma processing chamber, a gas feeder for feeding processing gas into the processing chamber, a vacuum pump for discharging gas from the processing chamber via a vacuum valve, and a solenoid coil for forming a magnetic field within the processing chamber. At least one of the plural substrates is placed on the lower electrode, and the processing gas is fed into the processing chamber. RF power is fed to the antenna electrode via a matching network to produce a plasma within the processing chamber in which a magnetic field has been formed by the solenoid coil. This placing of at least one substrate and this feeding of the processing gas are then repeated until the plasma processing of all of the plural substrates is completed.Type: ApplicationFiled: October 7, 2014Publication date: January 22, 2015Inventors: Eiji IKEGAMI, Shoji IKUHARA, Takeshi SHIMADA, Kenichi KUWABARA, Takao ARASE, Tsuyoshi MATSUMOTO
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Patent number: 8900401Abstract: Plasma processing of plural substrates is performed in a plasma processing apparatus, which is provided with a plasma processing chamber having an antenna electrode and a lower electrode for placing and retaining the plural substrates in turn within the plasma processing chamber, a gas feeder for feeding processing gas into the processing chamber, a vacuum pump for discharging gas from the processing chamber via a vacuum valve, and a solenoid coil for forming a magnetic field within the processing chamber. At least one of the plural substrates is placed on the lower electrode, and the processing gas is fed into the processing chamber. RF power is fed to the antenna electrode via a matching network to produce a plasma within the processing chamber in which a magnetic field has been formed by the solenoid coil. This placing of at least one substrate and this feeding of the processing gas are then repeated until the plasma processing of all of the plural substrates is completed.Type: GrantFiled: July 29, 2010Date of Patent: December 2, 2014Assignee: Hitachi High-Technologies CorporationInventors: Eiji Ikegami, Shoji Ikuhara, Takeshi Shimada, Kenichi Kuwabara, Takao Arase, Tsuyoshi Matsumoto
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Publication number: 20140225503Abstract: There is provided a method for controlling a plasma processing apparatus that eliminates a preliminary study on a resonance point while maintaining a low contamination and a high uniformity even in multi-step etching. In a method for controlling a plasma processing apparatus including the step of adjusting a radio frequency bias current carried to a counter antenna electrode, the method includes the steps of: setting a reactance of a variable element to an initial value; detecting a bias current carried to the counter antenna electrode; searching for a maximum value of the detected electric current; and adjusting a value of the reactance of the variable element from the maximum value to the set value and then fixing the value.Type: ApplicationFiled: February 11, 2014Publication date: August 14, 2014Applicant: Hitachi High-Technologies CorporationInventors: Masahito Mori, Akira Hirata, Koichi Yamamoto, Takao Arase
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Publication number: 20140102640Abstract: A plasma processing apparatus having a stable plasma generation under wide-ranging process conditions, and superior in uniformity and reproducibility, comprises an upper electrode 3 having gas supply through holes 6, a gas supply means and a lower electrode 1, wherein the gas supply means includes a plane-like member 4 having gas through holes 8 and a plane-like member 5 having gas through holes 10, and the gas supply through holes 6 and the gas through holes 8 are connected through a groove 7, and the gas through holes 8 and the gas through holes 10 are connected through a groove 9, and wherein the gas supply through holes 6, the gas through holes 8 and the gas through holes 10 are disposed at positions, different from each other on a plane.Type: ApplicationFiled: July 30, 2013Publication date: April 17, 2014Applicant: HITACHI HIGH-TECHNOLOGIES CORPORATIONInventors: Ken'etsu YOKOGAWA, Masahito MORI, Takao ARASE
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Patent number: 8038896Abstract: Plasma processing of plural substrates is performed in a plasma processing apparatus, which is provided with a plasma processing chamber having an antenna electrode and a lower electrode for placing and retaining the plural substrates in turn within the plasma processing chamber, a gas feeder for feeding processing gas into the processing chamber, a vacuum pump for discharging gas from the processing chamber via a vacuum valve, and a solenoid coil for forming a magnetic field within the processing chamber. At least one of the plural substrates is placed on the lower electrode, and the processing gas is fed into the processing chamber. RF power is fed to the antenna electrode via a matching network to produce a plasma within the processing chamber in which a magnetic field has been formed by the solenoid coil. This placing of at least one substrate and this feeding of the processing gas are then repeated until the plasma processing of all of the plural substrates is completed.Type: GrantFiled: August 11, 2006Date of Patent: October 18, 2011Assignee: Hitachi High-Technologies CorporationInventors: Eiji Ikegami, Shoji Ikuhara, Takeshi Shimada, Kenichi Kuwabara, Takao Arase, Tsuyoshi Matsumoto
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Publication number: 20100288195Abstract: Plasma processing of plural substrates is performed in a plasma processing apparatus, which is provided with a plasma processing chamber having an antenna electrode and a lower electrode for placing and retaining the plural substrates in turn within the plasma processing chamber, a gas feeder for feeding processing gas into the processing chamber, a vacuum pump for discharging gas from the processing chamber via a vacuum valve, and a solenoid coil for forming a magnetic field within the processing chamber. At least one of the plural substrates is placed on the lower electrode, and the processing gas is fed into the processing chamber. RF power is fed to the antenna electrode via a matching network to produce a plasma within the processing chamber in which a magnetic field has been formed by the solenoid coil. This placing of at least one substrate and this feeding of the processing gas are then repeated until the plasma processing of all of the plural substrates is completed.Type: ApplicationFiled: July 29, 2010Publication date: November 18, 2010Inventors: Eiji IKEGAMI, Shoji Ikuhara, Takeshi Shimada, Kenichi Kuwabara, Takao Arase, Tsuyoshi Matsumoto
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Patent number: 7364956Abstract: A method for manufacturing semiconductor devices includes a step of etching a sample including an interlayer insulating layer containing Al2O3 and a polysilicon or SiO2 layer in contact with the interlayer insulating layer using a plasma etching system. The interlayer insulating layer is etched with a gas mixture containing BCl3, Ar, and CH4 or He. The gas mixture further contains Cl2. The interlayer insulating layer is etched in such a manner that a time-modulated high-frequency bias voltage is applied to the sample. The interlayer insulating layer is etched in such a manner that the sample is maintained at a temperature of 100° C. to 200° C. The interlayer insulating layer and the polysilicon or SiO2 layer are separately etched in different chambers.Type: GrantFiled: August 24, 2005Date of Patent: April 29, 2008Assignee: Hitachi High-Technologies CorporationInventors: Go Saito, Toshiaki Nishida, Takahiro Shimomura, Takao Arase
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Publication number: 20070281478Abstract: Plasma processing of plural substrates is performed in a plasma processing apparatus, which is provided with a plasma processing chamber having an antenna electrode and a lower electrode for placing and retaining the plural substrates in turn within the plasma processing chamber, a gas feeder for feeding processing gas into the processing chamber, a vacuum pump for discharging gas from the processing chamber via a vacuum valve, and a solenoid coil for forming a magnetic field within the processing chamber. At least one of the plural substrates is placed on the lower electrode, and the processing gas is fed into the processing chamber. RF power is fed to the antenna electrode via a matching network to produce a plasma within the processing chamber in which a magnetic field has been formed by the solenoid coil. This placing of at least one substrate and this feeding of the processing gas are then repeated until the plasma processing of all of the plural substrates is completed.Type: ApplicationFiled: August 11, 2006Publication date: December 6, 2007Inventors: Eiji Ikegami, Shoji Ikuhara, Takeshi Shimada, Kenichi Kuwabara, Takao Arase, Tsuyoshi Matsumoto
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Publication number: 20070026611Abstract: A method for manufacturing semiconductor devices includes a step of etching a sample including an interlayer insulating layer containing Al2O3 and a polysilicon or SiO2 layer in contact with the interlayer insulating layer using a plasma etching system. The interlayer insulating layer is etched with a gas mixture containing BCl3, Ar, and CH4 or He. The gas mixture further contains Cl2. The interlayer insulating layer is etched in such a manner that a time-modulated high-frequency bias voltage is applied to the sample. The interlayer insulating layer is etched in such a manner that the sample is maintained at a temperature of 100° C. to 200° C. The interlayer insulating layer and the polysilicon or SiO2 layer are separately etched in different chambers.Type: ApplicationFiled: August 24, 2005Publication date: February 1, 2007Inventors: Go Saito, Toshiaki Nishida, Takahiro Shimomura, Takao Arase
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Patent number: 7098138Abstract: A plasma processing method is provided of processing a sample having a silicon nitride layer with high accuracy of size in anisotropy and excellent selectivity to a silicon oxide layer as underlayer. A mixed atmosphere of chlorine gas containing no fluorine with aluminum is converted into plasma in a plasma etching processing chamber and the sample having the silicon nitride layer is etched by using the plasma.Type: GrantFiled: April 2, 2003Date of Patent: August 29, 2006Assignee: Hitachi, Ltd.Inventors: Takao Arase, Motohiko Yoshigai, Go Saito, Masamichi Sakaguchi, Hiroaki Ishimura, Takahiro Shimomura
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Publication number: 20060048892Abstract: A plasma processing method is provided of processing a sample having a silicon nitride layer with high accuracy of size in anisotropy and excellent selectivity to a silicon oxide layer as underlayer. A mixed atmosphere of chlorine gas containing no fluorine with aluminum is converted into plasma in a plasma etching processing chamber and the sample having the silicon nitride layer is etched by using the plasma.Type: ApplicationFiled: October 20, 2005Publication date: March 9, 2006Inventors: Takao Arase, Motohiko Yoshigai, Go Saito, Masamichi Sakaguchi, Hiroaki Ishimura, Takahiro Shimomura