Patents by Inventor Takashi Akazawa

Takashi Akazawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20200394783
    Abstract: An evaluation device evaluates an image clarity of a print image. The evaluation device includes: an object that is projected onto a measurement surface of a recording medium; an illuminator that makes the object projected onto the measurement surface; an imager that images the measurement surface on which the object has been projected to obtain image data; and a hardware processor that, based on a distribution of parameters related to a brightness of the image data, quantifies a degree of the image clarity into a numerical value and defines the numerical value as an evaluation value of the image clarity.
    Type: Application
    Filed: June 11, 2020
    Publication date: December 17, 2020
    Applicant: Konica Minolta, Inc.
    Inventors: Natsuko Minegishi, Yoshiki Nakane, Takenobu Kimura, Hiroshi Morimoto, Kei Okamura, Takashi Akazawa
  • Patent number: 10198663
    Abstract: A system for predicting occurrence of a defective image includes: an input device configured to input image data into an image forming apparatus; and a hardware processor configured to analyze a spatial frequency of gradient distribution of an image in accordance with a size of a density irregularity specific to the image forming apparatus with respect to the input image data and to calculate a probability of a conspicuous density irregularity of the size in regard to the image formed by the image forming apparatus based on the image data with reference to an index of correlation between an analysis result and an evaluation value of the density irregularity.
    Type: Grant
    Filed: December 13, 2016
    Date of Patent: February 5, 2019
    Assignee: KONICA MINOLTA, INC.
    Inventors: Natsuko Kawai, Takashi Akazawa, Tetsuya Ishikawa, Ryoei Ikari, Kei Okamura, Keiji Uchikawa
  • Publication number: 20170236036
    Abstract: A system for predicting occurrence of a defective image includes: an input device configured to input image data into an image forming apparatus; and a hardware processor configured to analyze a spatial frequency of gradient distribution of an image in accordance with a size of a density irregularity specific to the image forming apparatus with respect to the input image data and to calculate a probability of a conspicuous density irregularity of the size in regard to the image formed by the image forming apparatus based on the image data with reference to an index of correlation between an analysis result and an evaluation value of the density irregularity.
    Type: Application
    Filed: December 13, 2016
    Publication date: August 17, 2017
    Inventors: Natsuko KAWAI, Takashi AKAZAWA, Tetsuya ISHIKAWA, Ryoei IKARI, Kei OKAMURA, Keiji UCHIKAWA
  • Patent number: 9691739
    Abstract: In a semiconductor device in which a plurality of semiconductor chips are stacked, performance is enhanced without deteriorating productivity. The semiconductor device has a first semiconductor substrate having a first surface and a second surface opposite the first surface, a first insulating film formed on the first surface, a first hole formed in the first insulating film and partially extending into the first semiconductor substrate, a second hole formed in the second surface, a first electrode entirely filling the first hole, and a conductive film conformally formed in the second hole. The conductive film is electrically connected to a bottom surface of the first electrode and leaves a third hole in the first semiconductor substrate open. The third hole is configured to receive a second electrode of a second semiconductor substrate.
    Type: Grant
    Filed: March 4, 2016
    Date of Patent: June 27, 2017
    Assignee: Tessera Advanced Technologies, Inc.
    Inventors: Michihiro Kawashita, Yasuhiro Yoshimura, Naotaka Tanaka, Takahiro Naito, Takashi Akazawa
  • Publication number: 20160190102
    Abstract: In a semiconductor device in which a plurality of semiconductor chips are stacked, performance is enhanced without deteriorating productivity. The semiconductor device has a first semiconductor substrate having a first surface and a second surface opposite the first surface, a first insulating film formed on the first surface, a first hole formed in the first insulating film and partially extending into the first semiconductor substrate, a second hole formed in the second surface, a first electrode entirely filling the first hole, and a conductive film conformally formed in the second hole. The conductive film is electrically connected to a bottom surface of the first electrode and leaves a third hole in the first semiconductor substrate open. The third hole is configured to receive a second electrode of a second semiconductor substrate.
    Type: Application
    Filed: March 4, 2016
    Publication date: June 30, 2016
    Inventors: Michihiro Kawashita, Yasuhiro Yoshimura, Naotaka Tanaka, Takahiro Naito, Takashi Akazawa
  • Patent number: 9318418
    Abstract: In a semiconductor device in which a plurality of semiconductor chips are stacked, performance is enhanced without deteriorating productivity. The semiconductor device has a first semiconductor substrate having a first surface and a second surface opposite the first surface, a first insulating film formed on the first surface, a first hole formed in the first insulating film and partially extending into the first semiconductor substrate, a second hole formed in the second surface, a first electrode entirely filling the first hole, and a conductive film conformally formed in the second hole. The conductive film is electrically connected to a bottom surface of the first electrode and leaves a third hole in the first semiconductor substrate open. The third hole is configured to receive a second electrode of a second semiconductor substrate.
    Type: Grant
    Filed: May 19, 2015
    Date of Patent: April 19, 2016
    Assignee: TESSERA ADVANCED TECHNOLOGIES, INC.
    Inventors: Michihiro Kawashita, Yasuhiro Yoshimura, Naotaka Tanaka, Takahiro Naito, Takashi Akazawa
  • Publication number: 20150255374
    Abstract: In a semiconductor device in which a plurality of semiconductor chips are stacked, performance is enhanced without deteriorating productivity. The semiconductor device has a first semiconductor substrate having a first surface and a second surface opposite the first surface, a first insulating film formed on the first surface, a first hole formed in the first insulating film and partially extending into the first semiconductor substrate, a second hole formed in the second surface, a first electrode entirely filling the first hole, and a conductive film conformally formed in the second hole. The conductive film is electrically connected to a bottom surface of the first electrode and leaves a third hole in the first semiconductor substrate open. The third hole is configured to receive a second electrode of a second semiconductor substrate.
    Type: Application
    Filed: May 19, 2015
    Publication date: September 10, 2015
    Inventors: Michihiro Kawashita, Yasuhiro Yoshimura, Naotaka Tanaka, Takahiro Naito, Takashi Akazawa
  • Patent number: 9076700
    Abstract: In a semiconductor device in which a plurality of semiconductor chips are stacked, performance is enhanced without deteriorating productivity. The semiconductor device has a plurality of elements, an interlayer insulating film, a pad, and a bump electrode electrically connected with the pad sequentially formed on a main surface of a silicon substrate and has a back-surface electrode formed on a back surface of the silicon substrate and electrically connected with the bump electrode. The bump electrode has a protruding portion penetrating through the pad and protruding toward the silicon substrate side. The back-surface electrode is formed so as to reach the protruding portion of the bump electrode from the back surface side of the silicon substrate toward the main surface side and to cover the inside of a back-surface electrode hole portion which does not reach the pad, so that the back-surface electrode is electrically connected with the bump electrode.
    Type: Grant
    Filed: August 20, 2014
    Date of Patent: July 7, 2015
    Assignee: Tessera Advanced Technologies, Inc.
    Inventors: Michihiro Kawashita, Yasuhiro Yoshimura, Naotaka Tanaka, Takahiro Naito, Takashi Akazawa
  • Publication number: 20150001711
    Abstract: In a semiconductor device in which a plurality of semiconductor chips are stacked, performance is enhanced without deteriorating productivity. The semiconductor device has a plurality of elements, an interlayer insulating film, a pad, and a bump electrode electrically connected with the pad sequentially formed on a main surface of a silicon substrate and has a back-surface electrode formed on a back surface of the silicon substrate and electrically connected with the bump electrode. The bump electrode has a protruding portion penetrating through the pad and protruding toward the silicon substrate side. The back-surface electrode is formed so as to reach the protruding portion of the bump electrode from the back surface side of the silicon substrate toward the main surface side and to cover the inside of a back-surface electrode hole portion which does not reach the pad, so that the back-surface electrode is electrically connected with the bump electrode.
    Type: Application
    Filed: August 20, 2014
    Publication date: January 1, 2015
    Inventors: Michihiro KAWASHITA, Yasuhiro YOSHIMURA, Naotaka TANAKA, Takahiro NAITO, Takashi AKAZAWA
  • Patent number: 8816506
    Abstract: In a semiconductor device in which a plurality of semiconductor chips are stacked, performance is enhanced without deteriorating productivity. The semiconductor device has a plurality of elements, an interlayer insulating film, a pad, and a bump electrode electrically connected with the pad sequentially formed on a main surface of a silicon substrate and has a back-surface electrode formed on a back surface of the silicon substrate and electrically connected with the bump electrode. The bump electrode has a protruding portion penetrating through the pad and protruding toward the silicon substrate side. The back-surface electrode is formed so as to reach the protruding portion of the bump electrode from the back surface side of the silicon substrate toward the main surface side and to cover the inside of a back-surface electrode hole portion which does not reach the pad, so that the back-surface electrode is electrically connected with the bump electrode.
    Type: Grant
    Filed: December 29, 2011
    Date of Patent: August 26, 2014
    Assignee: Tessera Advanced Technologies, Inc.
    Inventors: Michihiro Kawashita, Yasuhiro Yoshimura, Naotaka Tanaka, Takahiro Naito, Takashi Akazawa
  • Patent number: 8774695
    Abstract: A cleaning device comprises: a rotational brush disposed to touch an image holder and a lubricant, the brush which scrapes the lubricant and applies the scraped lubricant to the image holder, the brush including: a rotational axis; and a plurality of looped bristles disposed around the rotational axis, wherein a contact length of the bristles to the lubricant is longer than a contact length of the bristles to the image holder.
    Type: Grant
    Filed: May 10, 2011
    Date of Patent: July 8, 2014
    Assignee: Konica Minolta Business Technologies, Inc.
    Inventors: Kazuteru Ishizuka, Takashi Akazawa, Daiki Yamanaka
  • Publication number: 20140169851
    Abstract: A lubricant coating device includes a photoconductor and a leveling blade that levels a lubricant applied on a surface of the photoconductor, the leveling blade configured to abut the photoconductor in a trail direction with respect to a rotational direction of the photoconductor, wherein a hardness of a tip of the leveling blade, the tip being positioned on a side that abuts the surface of the photoconductor, is higher than hardness of a non-abutting portion that does not abut the surface of the photoconductor.
    Type: Application
    Filed: December 19, 2013
    Publication date: June 19, 2014
    Applicant: Konica Minolta, Inc.
    Inventors: Hiroyuki SAITO, Takashi AKAZAWA, Kei OKAMURA, Eri YAGI
  • Patent number: 8324736
    Abstract: A through silicon via reaching a pad from a second surface of a semiconductor substrate is formed. A penetration space in the through silicon via is formed of a first hole and a second hole with a diameter smaller than that of the first hole. The first hole is formed from the second surface of the semiconductor substrate to the middle of the interlayer insulating film. Further, the second hole reaching the pad from the bottom of the first hole is formed. Then, the interlayer insulating film formed on the first surface of the semiconductor substrate has a step shape reflecting a step difference between the bottom surface of the first hole and the first surface of the semiconductor substrate. More specifically, the thickness of the interlayer insulating film between the bottom surface of the first hole and the pad is smaller than that in other portions.
    Type: Grant
    Filed: June 6, 2011
    Date of Patent: December 4, 2012
    Assignee: Renesas Electronics Corporation
    Inventors: Michihiro Kawashita, Yasuhiro Yoshimura, Naotaka Tanaka, Takahiro Naito, Takashi Akazawa
  • Publication number: 20120141178
    Abstract: A lubricant supplying device that supplies a lubricant to the surface of an image carrier has a cloud generating section that generates a cloud in which particles of the lubricant are mixed with air and a conveying section that classifies the particles of the lubricant present in the cloud generated by the cloud generating section into small particles with sizes smaller than a prescribed size and large particles with sizes larger than or equal to the prescribed size, and conveys the classified small particles toward the image carrier, and has a lubricant supplying member that holds a lubricant, a contacting member that contacts the lubricant supplying member and causes the lubricant carried by the lubricant supplying member to fly off in the direction of the image carrier, and a leveling member that contacts the image carrier and levels the adhered lubricant.
    Type: Application
    Filed: November 23, 2011
    Publication date: June 7, 2012
    Applicant: KONICA MINOLTA BUSINESS TECHNOLOGIES, INC.
    Inventors: Natsuko MINEGISHI, Hisayoshi NAGASE, Takashi AKAZAWA
  • Patent number: 8178977
    Abstract: When a through-hole electrode and a rear-surface wire are formed on a rear surface of a chip, a convex portion is formed on the rear surface of the chip due to a rear-surface wiring pad which is a part of the through-hole electrode and the rear-surface wire. This causes the air leakage when the chip is sucked, and therefore, the reduction of the sucking force of the chip occurs. A concave portion is formed in advance in a region where a rear-surface wiring pad and a rear-surface wire are formed. The rear-surface wiring pad and the rear-surface wire are provided inside the concave portion. Thus, a flatness of the rear surface of the chip is ensured by a convex portion caused by thicknesses of the rear-surface wiring pad and the rear-surface wire, so that the reduction of the sucking force does not occur when the chip is handled.
    Type: Grant
    Filed: June 12, 2009
    Date of Patent: May 15, 2012
    Assignee: Renesas Electronics Corporation
    Inventors: Michihiro Kawashita, Yasuhiro Yoshimura, Naotaka Tanaka, Takahiro Naito, Takashi Akazawa
  • Publication number: 20120108055
    Abstract: After forming a ring-shaped trench penetrating through a semiconductor substrate from a rear surface side thereof and forming an insulating film inside the trench and on the rear surface of the semiconductor substrate, a through hole is formed in the insulating film and semiconductor substrate on an inner side of the ring-shaped trench from the rear surface side, thereby exposing a surface protection insulating film formed on a front surface of the semiconductor substrate at a bottom of the through hole. After removing the surface protection insulating film at the bottom of the through hole to form an opening to expose an element surface electrode, a contact electrode connected to the element surface electrode is formed on inner walls of the through hole and opening, and a pad electrode made of the same layer as the contact electrode is formed on the rear surface of the semiconductor substrate.
    Type: Application
    Filed: January 6, 2012
    Publication date: May 3, 2012
    Applicant: RENESAS ELECTRONICS CORPORATION
    Inventors: Yasuhiro YOSHIMURA, Naotaka TANAKA, Michihiro KAWASHITA, Takahiro NAITO, Takashi AKAZAWA
  • Publication number: 20120091583
    Abstract: In a semiconductor device in which a plurality of semiconductor chips are stacked, performance is enhanced without deteriorating productivity. The semiconductor device has a plurality of elements, an interlayer insulating film, a pad, and a bump electrode electrically connected with the pad sequentially formed on a main surface of a silicon substrate and has a back-surface electrode formed on a back surface of the silicon substrate and electrically connected with the bump electrode. The bump electrode has a protruding portion penetrating through the pad and protruding toward the silicon substrate side. The back-surface electrode is formed so as to reach the protruding portion of the bump electrode from the back surface side of the silicon substrate toward the main surface side and to cover the inside of a back-surface electrode hole portion which does not reach the pad, so that the back-surface electrode is electrically connected with the bump electrode.
    Type: Application
    Filed: December 29, 2011
    Publication date: April 19, 2012
    Inventors: Michihiro KAWASHITA, Yasuhiro Yoshimura, Naotaka Tanaka, Takahiro Naito, Takashi Akazawa
  • Patent number: 8110900
    Abstract: After forming a ring-shaped trench penetrating through a semiconductor substrate from a rear surface side thereof and forming an insulating film inside the trench and on the rear surface of the semiconductor substrate, a through hole is formed in the insulating film and semiconductor substrate on an inner side of the ring-shaped trench from the rear surface side, thereby exposing a surface protection insulating film formed on a front surface of the semiconductor substrate at a bottom of the through hole. After removing the surface protection insulating film at the bottom of the through hole to form an opening to expose an element surface electrode, a contact electrode connected to the element surface electrode is formed on inner walls of the through hole and opening, and a pad electrode made of the same layer as the contact electrode is formed on the rear surface of the semiconductor substrate.
    Type: Grant
    Filed: January 27, 2009
    Date of Patent: February 7, 2012
    Assignee: Renesas Electronics Corporation
    Inventors: Yasuhiro Yoshimura, Naotaka Tanaka, Michihiro Kawashita, Takahiro Naito, Takashi Akazawa
  • Patent number: 8106518
    Abstract: In a semiconductor device in which a plurality of semiconductor chips are stacked, performance is enhanced without deteriorating productivity. The semiconductor device has a plurality of elements, an interlayer insulating film, a pad, and a bump electrode electrically connected with the pad sequentially formed on a main surface of a silicon substrate and has a back-surface electrode formed on a back surface of the silicon substrate and electrically connected with the bump electrode. The bump electrode has a protruding portion penetrating through the pad and protruding toward the silicon substrate side. The back-surface electrode is formed so as to reach the protruding portion of the bump electrode from the back surface side of the silicon substrate toward the main surface side and to cover the inside of a back-surface-electrode hole portion which does not reach the pad, so that the back-surface electrode is electrically connected with the bump electrode.
    Type: Grant
    Filed: December 17, 2009
    Date of Patent: January 31, 2012
    Assignee: Renesas Electronics Corporation
    Inventors: Michihiro Kawashita, Yasuhiro Yoshimura, Naotaka Tanaka, Takahiro Naito, Takashi Akazawa
  • Publication number: 20110280637
    Abstract: A cleaning device comprises: a rotational brush disposed to touch an image holder and a lubricant, the brush which scrapes the lubricant and applies the scraped lubricant to the image holder, the brush including: a rotational axis; and a plurality of looped bristles disposed around the rotational axis, wherein a contact length of the bristles to the lubricant is longer than a contact length of the bristles to the image holder.
    Type: Application
    Filed: May 10, 2011
    Publication date: November 17, 2011
    Applicant: KONICA MINOLTA BUSINESS TECHNOLOGIES, INC.
    Inventors: Kazuteru ISHIZUKA, Takashi AKAZAWA, Daiki YAMANAKA