Patents by Inventor Takashi Hashimoto

Takashi Hashimoto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11572568
    Abstract: MPO1 and MPO2 can be regulated for either decreasing or increasing alkaloid levels in plants, in particular in Nicotiana plants. In particular, suppressing or overexpressing one or more of MPO1 and MPO2 may be used to decrease or increase nicotine and nicotinic alkaloid levels in tobacco plants. Suppression or overexpression of one or more of MPO1 and MPO2 may be used in combination with modification of expression of other genes encoding enzymes on the nicotinic alkaloid biosynthetic pathway such as A622, NBB1, PMT, and QPT.
    Type: Grant
    Filed: July 9, 2020
    Date of Patent: February 7, 2023
    Assignee: 22nd Century Limited, LLC
    Inventors: Takashi Hashimoto, Akira Kato
  • Patent number: 11575931
    Abstract: Provided is an encoder that achieves further improvement. The encoder includes processing circuitry and memory. Using the memory, the processing circuitry: obtains two prediction images from two reference pictures; derives a luminance gradient value of each pixel position in each of the two prediction images; derives a luminance local motion estimation value of each pixel position in a current block; generates a luminance final prediction image using a luminance value and the luminance gradient value in each of the two prediction images, and the luminance local motion estimation value of the current block; and generates a chrominance final prediction image using at least one of the luminance gradient value of each of the two prediction images or the luminance local motion estimation value of the current block, and chrominance of each of the two prediction images.
    Type: Grant
    Filed: September 16, 2021
    Date of Patent: February 7, 2023
    Assignee: PANASONIC INTELLECTUAL PROPERTY CORPORATION OF AMERICA
    Inventors: Ryuichi Kanoh, Tadamasa Toma, Takahiro Nishi, Kiyofumi Abe, Takashi Hashimoto
  • Publication number: 20230018238
    Abstract: A blur correction device includes a processor and a memory that is built into or coupled to the processor. The processor is configured to acquire an amount of blur correction used to correct blurring of an image obtained by imaging of an imaging element during exposure for one frame in the imaging element, and correct the blurring by performing image processing based on a most recently acquired amount of blur correction, on an unfinished image that is the image less than one frame that is being read from the imaging element. In a case in which a first reading period does not overlap with a second reading period, the processor corrects the blurring by performing the image processing based on the amount of blur correction acquired during exposure between the first reading period and the second reading period, on the unfinished image of the subsequent frame.
    Type: Application
    Filed: September 15, 2022
    Publication date: January 19, 2023
    Applicant: FUJIFILM Corporation
    Inventors: Tomonori MASUDA, Masahiko SUGIMOTO, Yi PAN, Takashi HASHIMOTO, Tetsuya FUJIKAWA, Yasunobu KISHINE
  • Publication number: 20220417549
    Abstract: An encoder includes circuitry and memory. Using the memory, the circuitry, in inter prediction processing: derives a first motion vector of a current block to be processed, using a motion vector of a previous block which has been previously processed; derives a second motion vector of the current block by performing motion estimation in the vicinity of the first motion vector; and generates a prediction image of the current block by performing motion compensation using the second motion vector.
    Type: Application
    Filed: August 25, 2022
    Publication date: December 29, 2022
    Inventors: Kiyofumi ABE, Takahiro NISHI, Tadamasa TOMA, Ryuichi KANOH, Takashi HASHIMOTO
  • Patent number: 11528418
    Abstract: A shake correction control device includes a processor that acquires imaging information for selecting mechanical correction of mechanically performing shake correction of a subject image or electronic correction of electronically performing the shake correction of the subject image. The processor performs a switching control from either of the mechanical correction or the electronic correction to the other of the mechanical correction or the electronic correction, and synchronizes shake correction operations of the mechanical correction and the electronic correction during the switching control, and changes an operation ratio of the mechanical correction and the electrical correction in accordance with passage of time during the switching control.
    Type: Grant
    Filed: December 1, 2021
    Date of Patent: December 13, 2022
    Assignee: FUJIFILM Corporation
    Inventors: Tomonori Masuda, Masahiko Sugimoto, Yi Pan, Takashi Hashimoto, Tetsuya Fujikawa, Yasunobu Kishine
  • Publication number: 20220368935
    Abstract: A decoder that decodes a current block using a motion vector includes: a processor; and memory. Using the memory, the processor: derives a first candidate vector from one or more candidate vectors of one or more neighboring blocks that neighbor the current block; determines, in a first reference picture for the current block, a first adjacent region that includes a position indicated by the first candidate vector; calculates evaluation values of a plurality of candidate regions included in the first adjacent region; and determines a first motion vector of the current block, based on a first candidate region having a smallest evaluation value among the evaluation values. The first adjacent region is included in a first motion estimation region determined based on the position indicated by the first candidate vector.
    Type: Application
    Filed: July 15, 2022
    Publication date: November 17, 2022
    Inventors: Takashi HASHIMOTO, Takahiro NISHI, Tadamasa TOMA, Kiyofumi ABE, Ryuichi KANOH
  • Patent number: 11490011
    Abstract: A blur correction device includes: an acquisition unit that acquires an amount of blur correction used to correct blurring of an image obtained through imaging of an imaging element during exposure for one frame in the imaging element; and a correction unit that corrects the blurring by performing image processing on a correction target image, which is an image for one frame included in a moving image obtained through imaging of the imaging element, based on the amount of blur correction acquired by the acquisition unit during exposure necessary to obtain the correction target image.
    Type: Grant
    Filed: August 15, 2021
    Date of Patent: November 1, 2022
    Assignee: FUJIFILM Corporation
    Inventors: Tomonori Masuda, Masahiko Sugimoto, Yi Pan, Takashi Hashimoto, Tetsuya Fujikawa, Yasunobu Kishine
  • Publication number: 20220327096
    Abstract: A non-transitory computer-readable recording medium stores an incompatibility detection program causing a computer to execute a process including: identifying a type of a setting file of an application that operates in a first application execution environment; and detecting an incompatibility that occurs in the setting file of which the type is identified, by applying merely an incompatibility detection rule corresponding to the identified type of the setting file among one or more incompatibility detection rules in each of which information on an incompatibility detection pattern for determining that the setting file includes an incompatibility that occurs along with migration from the first application execution environment to a second application execution environment different from the first application execution environment and information on the type of the setting file in which the incompatibility occurs are associated with each other.
    Type: Application
    Filed: February 4, 2022
    Publication date: October 13, 2022
    Applicant: FUJITSU LIMITED
    Inventors: Tsuyoshi SATO, Tsubasa Yamamoto, Toshihide Nakatsu, TAKAHIRO NAGAO, Takashi HASHIMOTO
  • Patent number: 11463724
    Abstract: An encoder includes circuitry and memory. Using the memory, the circuitry, in inter prediction processing: derives a first motion vector of a current block to be processed, using a motion vector of a previous block which has been previously processed; derives a second motion vector of the current block by performing motion estimation in the vicinity of the first motion vector; and generates a prediction image of the current block by performing motion compensation using the second motion vector.
    Type: Grant
    Filed: June 8, 2021
    Date of Patent: October 4, 2022
    Assignee: PANASONIC INTELLECTUAL PROPERTY CORPORATION OF AMERICA
    Inventors: Kiyofumi Abe, Takahiro Nishi, Tadamasa Toma, Ryuichi Kanoh, Takashi Hashimoto
  • Publication number: 20220303572
    Abstract: An encoder that; obtains two prediction images by performing motion compensation using two motion vectors; obtains a gradient value of each of pixels included in the two prediction images; derives a local motion estimation value for each of sub-blocks based on the pixel value and the gradient value of each of the pixels, the sub-blocks being obtained by partitioning the current block; and generates a final prediction image for the current block using the pixel value and the gradient value of each of the pixels, and the local motion estimation value derived for each of the sub-blocks. Each of the pixels in the two prediction images is interpolated with sub-pixel accuracy, and a reference range for the interpolation is included in a normal reference range that is referred to for motion compensation for the current block in normal inter prediction performed without using the local motion estimation value.
    Type: Application
    Filed: June 8, 2022
    Publication date: September 22, 2022
    Inventors: Kiyofumi ABE, Takahiro NISHI, Tadamasa TOMA, Ryuichi KANOH, Takashi HASHIMOTO
  • Patent number: 11425413
    Abstract: An encoder that; obtains two prediction images by performing motion compensation using two motion vectors; obtains a gradient value of each of pixels included in the two prediction images; derives a local motion estimation value for each of sub-blocks based on the pixel value and the gradient value of each of the pixels, the sub-blocks being obtained by partitioning the current block; and generates a final prediction image for the current block using the pixel value and the gradient value of each of the pixels, and the local motion estimation value derived for each of the sub-blocks. Each of the pixels in the two prediction images is interpolated with sub-pixel accuracy, and a reference range for the interpolation is included in a normal reference range that is referred to for motion compensation for the current block in normal inter prediction performed without using the local motion estimation value.
    Type: Grant
    Filed: October 22, 2019
    Date of Patent: August 23, 2022
    Assignee: PANASONIC INTELLECTUAL PROPERTY CORPORATION OF AMERICA
    Inventors: Kiyofumi Abe, Takahiro Nishi, Tadamasa Toma, Ryuichi Kanoh, Takashi Hashimoto
  • Patent number: 11425409
    Abstract: A decoder that decodes a current block using a motion vector includes: a processor; and memory. Using the memory, the processor: derives a first candidate vector from one or more candidate vectors of one or more neighboring blocks that neighbor the current block; determines, in a first reference picture for the current block, a first adjacent region that includes a position indicated by the first candidate vector; calculates evaluation values of a plurality of candidate regions included in the first adjacent region; and determines a first motion vector of the current block, based on a first candidate region having a smallest evaluation value among the evaluation values. The first adjacent region is included in a first motion estimation region determined based on the position indicated by the first candidate vector.
    Type: Grant
    Filed: December 22, 2020
    Date of Patent: August 23, 2022
    Assignee: PANASONIC INTELLECTUAL PROPERTY CORPORATION OF AMERICA
    Inventors: Takashi Hashimoto, Takahiro Nishi, Tadamasa Toma, Kiyofumi Abe, Ryuichi Kanoh
  • Publication number: 20220243372
    Abstract: A melt-blown nonwoven fabric includes polybutylene terephthalate, in which an intrinsic viscosity of the melt-blown nonwoven fabric is 0.45 dl/g or more and 0.60 dl/g or less.
    Type: Application
    Filed: June 2, 2020
    Publication date: August 4, 2022
    Applicant: MITSUI CHEMICALS, INC.
    Inventors: Takashi HASHIMOTO, Kozo IIBA
  • Publication number: 20220201323
    Abstract: Provided is an encoder that achieves further improvement. The encoder includes processing circuitry and memory. Using the memory, the processing circuitry: obtains two prediction images from two reference pictures; derives a luminance gradient value of each pixel position in each of the two prediction images; derives a luminance local motion estimation value of each pixel position in a current block; generates a luminance final prediction image using a luminance value and the luminance gradient value in each of the two prediction images, and the luminance local motion estimation value of the current block; and generates a chrominance final prediction image using at least one of the luminance gradient value of each of the two prediction images or the luminance local motion estimation value of the current block, and chrominance of each of the two prediction images.
    Type: Application
    Filed: September 16, 2021
    Publication date: June 23, 2022
    Inventors: Ryuichi KANOH, Tadamasa TOMA, Takahiro NISHI, Kiyofumi ABE, Takashi HASHIMOTO
  • Patent number: 11356663
    Abstract: An encoder which encodes a picture includes processing circuitry and memory. Using the memory, the processing circuitry: splits the picture into a plurality of slice segments; encodes a plurality of blocks included in each of the plurality of slice segments; reconstructs the plurality of blocks encoded; adds, for each of the plurality of slice segments, control information to a header area of the slice segment, the control information being for controlling application of a filter to the slice segment; and applies, for each of the plurality of slice segments, the filter to a block which has been reconstructed in the slice segment, according to the control information of the slice segment.
    Type: Grant
    Filed: September 11, 2020
    Date of Patent: June 7, 2022
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Toshihiko Kusakabe, Shinji Kitamura, Takashi Hashimoto, Kiyofumi Abe, Hideyuki Ohgose
  • Patent number: 11342430
    Abstract: A semiconductor device has a split-gate type MONOS structure using a FinFET, and it includes a source and a drain each formed of an n-type impurity diffusion layer, a first channel forming layer which is formed under a control gate and is formed of a semiconductor layer doped with a p-type impurity, and a second channel forming layer which is formed under a memory gate and is formed of a semiconductor layer doped with an n-type impurity. Further, the semiconductor device includes a p-type semiconductor layer which is formed under the second channel forming layer and has an impurity concentration higher than an impurity concentration of a semiconductor substrate.
    Type: Grant
    Filed: October 29, 2020
    Date of Patent: May 24, 2022
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventors: Digh Hisamoto, Yoshiyuki Kawashima, Takashi Hashimoto
  • Patent number: 11331755
    Abstract: An additive manufacturing apparatus includes a laser oscillator that is a beam source that outputs a beam, and a rotary motor that is a driving unit that changes the relative positions of a material fed from a wire spool that is a supply source of a wire that is the material and an object to be machined. The driving unit is capable of performing first driving for feeding the material from the supply source toward the object to be machined and second driving for pulling back the fed material to the supply source, and switches from the first driving to the second driving on the basis of a machining program.
    Type: Grant
    Filed: October 24, 2018
    Date of Patent: May 17, 2022
    Assignee: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Satoshi Hattori, Takashi Hashimoto, Nobuyuki Sumi
  • Patent number: 11302828
    Abstract: A semiconductor device includes a memory cell which is configured of a FinFET having a split-gate type MONOS structure, the FinFET has a plurality of source regions formed in a plurality of fins, and the plurality of source regions are commonly connected by a source line contact. Further, the FinFET has a plurality of drain regions formed in the plurality of fins, the plurality of drain regions are commonly connected by a bit line contact, and the FinFET constitutes a memory cell of 1 bit.
    Type: Grant
    Filed: October 29, 2020
    Date of Patent: April 12, 2022
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventors: Digh Hisamoto, Yoshiyuki Kawashima, Takashi Hashimoto
  • Patent number: 11297329
    Abstract: Provided is an image encoding method which inhibits deterioration in processing performance for encoding while improving transmission efficiency. The image encoding method is for generating a bitstream by encoding a picture, and includes: sequentially encoding blocks included in the picture; deriving an encoding amount of a slice segment each time one of the blocks is encoded as a current block, the slice segment including the current block; determining whether the encoding amount derived is at least a threshold; and setting end information indicating an end of the slice segment in a position in the bitstream when the encoding amount is determined to be at least the threshold, the position corresponding to the current block encoded.
    Type: Grant
    Filed: April 12, 2019
    Date of Patent: April 5, 2022
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Toshihiko Kusakabe, Shinji Kitamura, Kiyofumi Abe, Hideyuki Ohgose, Takashi Hashimoto
  • Patent number: 11297322
    Abstract: An encoder includes memory and circuitry accessible to the memory. The circuitry accessible to the memory: switches whether or not to apply arithmetic encoding to a binary data string in which image information has been binarized; binarizes frequency transform coefficient information according to different binarization formats between when arithmetic encoding is applied to the binary data string and when arithmetic encoding is not applied to the binary data string; and binarizes a part or the entirety of prediction parameter information according to a binarization format which is common between when arithmetic encoding is applied to the binary data string and when arithmetic encoding is not applied to the binary data string.
    Type: Grant
    Filed: January 5, 2021
    Date of Patent: April 5, 2022
    Assignee: PANASONIC INTELLECTUAL PROPERTY CORPORATION OF AMERICA
    Inventors: Kiyofumi Abe, Takahiro Nishi, Takashi Hashimoto, Tadamasa Toma