Patents by Inventor Takashi Ishigaki

Takashi Ishigaki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20200303393
    Abstract: A semiconductor memory device according to an embodiment includes a semiconductor substrate; a laminated body formed by laminating a plurality of electrode layers on the semiconductor substrate; a memory film provided in the laminated body and including a first block insulation film disposed in a direction perpendicular to the electrode layer, a charge storage film facing the first block insulation film, a tunnel insulation film facing the charge storage film, and a channel film facing the tunnel insulation film; and a barrier layer provided at at least one of interface between the plurality of electrode layers and the memory film and an interface in the memory film and mainly composed of carbon.
    Type: Application
    Filed: September 12, 2019
    Publication date: September 24, 2020
    Applicant: Toshiba Memory Corporation
    Inventors: Ryota Fujitsuka, Kenta Yamada, Takanori Yamanaka, Takayuki Okada, Hirokazu Ishigaki, Hiroki Kishi, Nobushi Matsuura, Takashi Yamane, Ryota Suzuki
  • Patent number: 10529813
    Abstract: A semiconductor device including an n-type semiconductor layer formed on a substrate, having a cell region and a gate pad region, and including silicon carbide, and a unit cell formed in the cell region is configured as follows. A p-type body region formed in the semiconductor layer of the gate pad region, a first insulating film formed on the p-type body region, a conductive film formed on the first insulating film, and a second insulating film formed on the conductive film, and a gate pad formed on the second insulating film. Then, the film thickness of the first insulating film is 0.7 ?m or more, and more favorably 1.5 ?m or more. In addition, the electric field strength of the first insulating film is 3 MV/cm or less. Then, an opening portion is formed on the first insulating film in the gate pad region, and a resistance portion and a connection portion corresponding to the conductive film are formed in the opening portion.
    Type: Grant
    Filed: November 13, 2018
    Date of Patent: January 7, 2020
    Assignee: HITACHI POWER SEMICONDUCTOR DEVICE, LTD.
    Inventors: Masakazu Sagawa, Takashi Ishigaki
  • Publication number: 20190389994
    Abstract: To provide a block copolymer that includes an aromatic vinyl compound polymer and a chloroprene polymer, has a number average molecular weight of 100,000 or more, is preferred for a rubber composition and an adhesive composition, and is suitable for industrial production. A block copolymer includes at least one aromatic vinyl compound polymer block and at least one chloroprene polymer block, has a functional group with a structure represented by Chemical Formula (1) or (2), and has a number average molecular weight of 100,000 or more. The chloroprene polymer block has a number average molecular weight of 80,000 or more in total.
    Type: Application
    Filed: March 29, 2018
    Publication date: December 26, 2019
    Inventors: Wataru NISHINO, Yuhei ISHIGAKI, Takashi AIZAWA, Shogo HAGIWARA, Uichiro YAMAGISHI
  • Publication number: 20190288082
    Abstract: A semiconductor device including an n-type semiconductor layer formed on a substrate, having a cell region and a gate pad region, and including silicon carbide, and a unit cell formed in the cell region is configured as follows. A p-type body region formed in the semiconductor layer of the gate pad region, a first insulating film formed on the p-type body region, a conductive film formed on the first insulating film, and a second insulating film formed on the conductive film, and a gate pad formed on the second insulating film. Then, the film thickness of the first insulating film is 0.7 ?m or more, and more favorably 1.5 ?m or more. In addition, the electric field strength of the first insulating film is 3 MV/cm or less. Then, an opening portion is formed on the first insulating film in the gate pad region, and a resistance portion and a connection portion corresponding to the conductive film are formed in the opening portion.
    Type: Application
    Filed: November 13, 2018
    Publication date: September 19, 2019
    Inventors: Masakazu SAGAWA, Takashi ISHIGAKI
  • Patent number: 10227984
    Abstract: A scroll compressor in which a winding angle of a first lap is larger than a winding angle of a second lap, a plurality of compression chambers are formed between the first lap and the second lap, the compression chambers include at least a first compression chamber and a second compression chamber that has a volume smaller than the first compression chamber, a first base plate is provided with a first injection port 16a for injection of refrigerant into the first compression chamber and a second injection port for injection of refrigerant into the second compression chamber, and an injection flow rate of the second injection port is higher than an injection flow rate of the first injection port.
    Type: Grant
    Filed: September 19, 2014
    Date of Patent: March 12, 2019
    Assignee: Mitsubishi Electric Corporation
    Inventors: Shuhei Koyama, Takashi Ishigaki
  • Publication number: 20180347556
    Abstract: A compressor includes a compression mechanism configured to compress refrigerant, an electromotive mechanism configured to drive the compression mechanism, a shell accommodating the compression mechanism and the electromotive mechanism, a reservoir provided inside the shell and configured to store mixed liquid including liquid refrigerant and refrigerating machine oil, and an electrode provided inside the reservoir and facing an inner surface of the shell.
    Type: Application
    Filed: February 2, 2016
    Publication date: December 6, 2018
    Inventors: Yuki TAMURA, Shuhei KOYAMA, Takashi ISHIGAKI
  • Patent number: 9799734
    Abstract: Provided is a vertical MOSFET in which a conduction deterioration phenomenon is prevented during a current return operation and an on-voltage is low during the current return operation. A semiconductor device includes a hole barrier region that is provided between a second-conductivity-type body region and a first-conductivity-type epitaxial layer below a second-conductivity-type body contact region and functions as a potential barrier to a hole which flows from a source electrode to the first-conductivity-type epitaxial layer through the second-conductivity-type body contact region and the second-conductivity-type body region.
    Type: Grant
    Filed: June 17, 2013
    Date of Patent: October 24, 2017
    Assignee: Hitachi, Ltd.
    Inventors: Takashi Ishigaki, Ryuta Tsuchiya
  • Publication number: 20170204861
    Abstract: A scroll compressor in which a winding angle of a first lap is larger than a winding angle of a second lap, a plurality of compression chambers are formed between the first lap and the second lap, the compression chambers include at least a first compression chamber and a second compression chamber that has a volume smaller than the first compression chamber, a first base plate is provided with a first injection port 16a for injection of refrigerant into the first compression chamber and a second injection port for injection of refrigerant into the second compression chamber, and an injection flow rate of the second injection port is higher than an injection flow rate of the first injection port.
    Type: Application
    Filed: September 19, 2014
    Publication date: July 20, 2017
    Inventors: Shuhei KOYAMA, Takashi ISHIGAKI
  • Publication number: 20160133706
    Abstract: Provided is a vertical MOSFET in which a conduction deterioration phenomenon is prevented during a current return operation and an on-voltage is low during the current return operation. A semiconductor device includes a hole barrier region that is provided between a second-conductivity-type body region and a first-conductivity-type epitaxial layer below a second-conductivity-type body contact region and functions as a potential barrier to a hole which flows from a source electrode to the first-conductivity-type epitaxial layer through the second-conductivity-type body contact region and the second-conductivity-type body region.
    Type: Application
    Filed: June 17, 2013
    Publication date: May 12, 2016
    Inventors: Takashi Ishigaki, Ryuta Tsuchiya
  • Patent number: 9257483
    Abstract: There is provided a magnetic memory with using a magnetoresistive effect element of a spin-injection magnetization reversal type, in which a multi-value operation is possible and whose manufacturing and operation are simple. A preferred aim of this is solved by providing two or more magnetoresistive effect elements which are electrically connected in series to each other and by selecting one of the series-connected elements depending on a direction of a current carried in the series-connected elements, a magnitude thereof, and an order of the current thereof for performing the writing operation. For example, it is solved by differentiating plane area sizes of the respective magnetoresistive effect elements which have the same film structure from each other so as to differentiate resistance change amounts caused by respective magnetization reversal and threshold current values required for respective magnetization reversal from each other.
    Type: Grant
    Filed: January 13, 2011
    Date of Patent: February 9, 2016
    Assignee: Hitachi, Ltd.
    Inventors: Takashi Ishigaki, Takayuki Kawahara, Riichiro Takemura, Kazuo Ono, Kenchi Ito
  • Patent number: 8750032
    Abstract: The disclosed semiconductor recording device achieves multi-valued reading and writing using a spin-injection magnetization-reversal tunneling magnetoresistive element (TMR element). A first current that has at least the same value as that of the element requiring the highest current to reverse the magnetization thereof among a plurality of TMR elements is, in the direction that causes reversal to either a parallel state or an anti-parallel state, applied to a memory cell having the plurality of TMR elements, and then a second current which is in the reverse direction from the first current and of which only the value needed to reverse the magnetoresistance state of at least one TMR element excluding the element requiring the maximum current among the plurality of TMR elements is applied to each, and multi-valued writing is performed.
    Type: Grant
    Filed: April 5, 2011
    Date of Patent: June 10, 2014
    Assignee: Hitachi, Ltd.
    Inventors: Takayuki Kawahara, Riichiro Takemura, Takashi Ishigaki, Kiyoo Itoh
  • Patent number: 8710550
    Abstract: A semiconductor device includes a nitride semiconductor stack having at least two hetero junction bodies where a first nitride semiconductor layer and a second nitride semiconductor layer having a band gap wider than that of the first nitride semiconductor layer are disposed, and includes a drain electrode and, a source electrode disposed to the nitride semiconductor stack, and gate electrodes at a position put between the drain electrode and the source electrode and disposed so as to oppose them respectively in which the drain electrode and the source electrode are disposed over the surface or on the lateral side of the nitride semiconductor stack, and the gate electrode has a first gate electrode disposed in the direction of the depth of the nitride semiconductor stack and a second gate electrode disposed in the direction of the depth of the nitride semiconductor at a depth different from the first gate electrode.
    Type: Grant
    Filed: October 31, 2012
    Date of Patent: April 29, 2014
    Assignee: Hitachi, Ltd.
    Inventors: Takashi Ishigaki, Ryuta Tsuchiya, Kazuhiro Mochizuki, Akihisa Terano
  • Patent number: 8643117
    Abstract: In an SOI-MISFET that operates with low power consumption at a high speed, an element area is reduced. While a diffusion layer region of an N-conductivity type MISFET region of the SOI type MISFET and a diffusion layer region of a P-conductivity type MISFET region of the SOI type MISFET are formed as a common region, well diffusion layers that apply substrate potentials to the N-conductivity type MISFET region and the P-conductivity type MISFET region are separated from each other by an STI layer. The diffusion layer regions that are located in the N- and P-conductivity type MISFET regions) and serve as an output portion of a CMISFET are formed as a common region and directly connected by silicified metal so that the element area is reduced.
    Type: Grant
    Filed: January 18, 2010
    Date of Patent: February 4, 2014
    Assignee: Hitachi, Ltd.
    Inventors: Ryuta Tsuchiya, Nobuyuki Sugii, Yusuke Morita, Hiroyuki Yoshimoto, Takashi Ishigaki, Shinichiro Kimura
  • Patent number: 8598594
    Abstract: In a semiconductor device including a stack structure having heterojunction units formed by alternately stacking GaN (gallium nitride) films and barrier films which are different in forbidden band width, a first electrode formed in a Schottky barrier contact with one sidewall of the stack structure, and a second electrode formed in contact with the other sidewall, an oxide film is interposed between the first electrode and the barrier films. Therefore, the reverse leakage current is prevented from flowing through defects remaining in the barrier films due to processing of the barrier films, so that a reverse leakage current of a Schottky barrier diode is reduced.
    Type: Grant
    Filed: February 4, 2012
    Date of Patent: December 3, 2013
    Assignee: Hitachi, Ltd.
    Inventors: Kazuhiro Mochizuki, Takashi Ishigaki, Akihisa Terano, Tomonobu Tsuchiya
  • Patent number: 8476731
    Abstract: In a Schottky electrode formation region on a nitride semiconductor, the total length of junctions of Schottky electrodes and a surface of a nitride semiconductor layer is longer than the perimeter of the Schottky electrode formation region. The total length is preferably 10 times longer than the perimeter. For example, the Schottky electrodes are formed concentrically and circularly.
    Type: Grant
    Filed: January 13, 2012
    Date of Patent: July 2, 2013
    Assignee: Hitachi, Ltd.
    Inventors: Akihisa Terano, Kazuhiro Mochizuki, Takashi Ishigaki
  • Publication number: 20130051134
    Abstract: The disclosed semiconductor recording device achieves multi-valued reading and writing using a spin-injection magnetization-reversal tunneling magnetoresistive element (TMR element). A first current that has at least the same value as that of the element requiring the highest current to reverse the magnetization thereof among a plurality of TMR elements is, in the direction that causes reversal to either a parallel state or an anti-parallel state, applied to a memory cell having the plurality of TMR elements, and then a second current which is in the reverse direction from the first current and of which only the value needed to reverse the magnetoresistance state of at least one TMR element excluding the element requiring the maximum current among the plurality of TMR elements is applied to each, and multi-valued writing is performed.
    Type: Application
    Filed: April 5, 2011
    Publication date: February 28, 2013
    Inventors: Takayuki Kawahara, Riichiro Takemura, Takashi Ishigaki, Kiyoo Itoh
  • Publication number: 20130044537
    Abstract: There is provided a magnetic memory with using a magnetoresistive effect element of a spin-injection magnetization reversal type, in which a multi-value operation is possible and whose manufacturing and operation are simple. A preferred aim of this is solved by providing two or more magnetoresistive effect elements which are electrically connected in series to each other and by selecting one of the series-connected elements depending on a direction of a current carried in the series-connected elements, a magnitude thereof, and an order of the current thereof for performing the writing operation. For example, it is solved by differentiating plane area sizes of the respective magnetoresistive effect elements which have the same film structure from each other so as to differentiate resistance change amounts caused by respective magnetization reversal and threshold current values required for respective magnetization reversal from each other.
    Type: Application
    Filed: January 13, 2011
    Publication date: February 21, 2013
    Inventors: Takashi Ishigaki, Takayuki Kawahara, Riichiro Takemura, Kazuo Ono, Kenchi Ito
  • Patent number: 8350328
    Abstract: Characteristics of a semiconductor device having a FINFET are improved. The FINFET has: a channel layer arranged in an arch shape on a semiconductor substrate and formed of monocrystalline silicon; a front gate electrode formed on a part of an outside of the channel layer through a front gate insulating film; and a back gate electrode formed so as to be buried inside the channel layer through a back gate insulating film. The back gate electrode arranged inside the arch shape is arranged so as to pass through the front gate electrode.
    Type: Grant
    Filed: April 13, 2010
    Date of Patent: January 8, 2013
    Assignee: Hitachi, Ltd.
    Inventors: Takashi Ishigaki, Ryuta Tsuchiya, Yusuke Morita, Nobuyuki Sugii
  • Publication number: 20120228626
    Abstract: In a semiconductor device including a stack structure having heterojunction units formed by alternately stacking GaN (gallium nitride) films and barrier films which are different in forbidden band width, a first electrode formed in a Schottky barrier contact with one sidewall of the stack structure, and a second electrode formed in contact with the other sidewall, an oxide film is interposed between the first electrode and the barrier films. Therefore, the reverse leakage current is prevented from flowing through defects remaining in the barrier films due to processing of the barrier films, so that a reverse leakage current of a Schottky barrier diode is reduced.
    Type: Application
    Filed: February 4, 2012
    Publication date: September 13, 2012
    Inventors: Kazuhiro Mochizuki, Takashi Ishigaki, Akihisa Terano, Tomonobu Tsuchiya
  • Publication number: 20120223337
    Abstract: In a Schottky electrode formation region on a nitride semiconductor, the total length of junctions of Schottky electrodes and a surface of a nitride semiconductor layer is longer than the perimeter of the Schottky electrode formation region. The total length is preferably 10 times longer than the perimeter. For example, the Schottky electrodes are formed concentrically and circularly.
    Type: Application
    Filed: January 13, 2012
    Publication date: September 6, 2012
    Inventors: Akihisa TERANO, Kazuhiro MOCHIZUKI, Takashi ISHIGAKI