Patents by Inventor Takashi Itoh

Takashi Itoh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6943491
    Abstract: In a picture tube device with a field-emission cold cathode, including a plurality of electron-emitting cathodes, and a lead electrode provided with a plurality of apertures surrounding the plurality of electron-emitting cathodes respectively, a surface of the lead electrode has a curved shape that is convex in an electron emission direction. This makes it possible to obtain a high-resolution and high-performance picture tube device that has an excellent focus performance over an entire beam current.
    Type: Grant
    Filed: January 9, 2003
    Date of Patent: September 13, 2005
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Masahide Yamauchi, Takashi Itoh, Koji Fujii
  • Patent number: 6943489
    Abstract: The CRT device comprises a cold cathode electron gun that includes cathodes, a peripheral focusing electrode, and an accelerating electrode. The cathode has a structure in which an emitter electrode and a gate electrode are joined together with an insulating layer interposed therebetween. The electric potential difference from the emitter electrode is 60V for the gate electrode, 0V for the peripheral focusing electrode, and 4.6 kV for the accelerating electrode.
    Type: Grant
    Filed: April 25, 2003
    Date of Patent: September 13, 2005
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Takashi Itoh, Masahide Yamauchi, Koji Fujii
  • Publication number: 20050190110
    Abstract: An antenna structure with reduced bulkiness and capable of changing antenna directivity is provided. In order to achieve such an effect, the antenna structure includes a feed element of one of an inverted F type and a loop type, and a passive element of one of the inverted F type and loop type, and having a variable reactor so as to be capable of changing an electrical length, and the feed element and passive element are disposed with a predetermined distance therebetween.
    Type: Application
    Filed: February 25, 2005
    Publication date: September 1, 2005
    Inventors: Makoto Taromaru, Takashi Ohira, Takuma Sawaya, Kyouichi Iigusa, Hiroki Tanaka, Satoru Tawara, Takashi Itoh, Emi Morita
  • Patent number: 6917648
    Abstract: A selection unit selects ‘0’ for the first through the (N?1)th frames, and selects a predicted image for the subsequent frames. Thus, an intra-frame coding process is performed on the first through the (N?1)th frames, and an adaptive coding process is performed on the subsequent frames. An information amount reduction unit reduces the amount of information about data in the first through the (N?1)th frames. An information amount adjustment unit stepwise increases the amount of information reduced by the information amount reduction unit.
    Type: Grant
    Filed: April 26, 2000
    Date of Patent: July 12, 2005
    Assignee: Fujitsu Limited
    Inventors: Eishi Morimatsu, Akira Nakagawa, Atsushi Ichiki, Takashi Itoh, Taizo Anan
  • Patent number: 6914373
    Abstract: A cathode ray tube according to the present invention include a cold cathode electron gun, the cold cathode electron gun including a cold cathode array for emitting electrons through field emission, a gate electrode for controlling the field emission, a first selective electrode provided around the cold cathode array and the gate electrode, and a second selective electrode opposing the first selective electrode, and the second selective electrode is adapted to have a lower potential than the gate electrode and the first selective electrode. In accordance with this configuration, the divergence of electron beams emitted from any positions in the cold cathode array can be converged uniformly upon removing electron beams emitted at a great emission angle. This allows the electron beams thereafter to be made narrower by an electrostatic lens. As a result, the present invention can provide a cathode ray tube capable of forming a high-resolution image.
    Type: Grant
    Filed: June 27, 2002
    Date of Patent: July 5, 2005
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Takashi Itoh, Masahide Yamauchi, Koji Fujii, Keisuke Koga, Toru Kawase
  • Patent number: 6911265
    Abstract: The present invention provides a laminate used for a printed wiring substrate and a multilayer printed wiring board which have high heat resistance, wiring patterns with narrow pitches, vias with a small diameter, insulating layer having uniform thickness and stable adhesion between the metal layer and the synthetic resin film, and which contribute to miniaturization, high capability and functional improvement of electronic equipment. The present invention relates to a metal laminate comprising a metal layer laminated on one or both faces of a synthetic resin film, wherein the metal layer is a metal foil having a thickness of at most 5 ?m.
    Type: Grant
    Filed: October 26, 2001
    Date of Patent: June 28, 2005
    Assignee: Kaneka Corporation
    Inventors: Masaru Nishinaka, Takashi Itoh, Kanji Shimo-Ohsako
  • Publication number: 20050119381
    Abstract: A thermosetting resin composition of the present invention includes (A) a polyimide resin, and as thermosetting components, at least one of (B) a multifunctional cynate ester and (C) an epoxy resin. The (A) polyimide resin is soluble polyimide obtained by reacting, with diamines, acid dianhydride including an ether bond. As (B) the multifunctional cynate esters, a compound having a specific structure, and/or an oligomer thereof is used. As (C) the epoxy resin, an epoxy resin having a dicyclopentadiene bone structure and/or an alkoxy-group-including silane denatured epoxy resin (suitable epoxy resin) is preferably used.
    Type: Application
    Filed: March 6, 2003
    Publication date: June 2, 2005
    Inventors: Shigeru Tanaka, Kanji Shimo-Ohsako, Takashi Itoh, Mutsuaki Murakami
  • Patent number: 6862492
    Abstract: By using a configuration comprising sampling means for sampling block end information about each system program, means for identifying a resumption block and a resumption position of each system based on the block end information of each system at the time of a machining halt, and means for calculating information about a synchronous relation between the systems from the block end information of each system and resuming and starting each system based on this calculated result when machining is resumed from the resumption position, it is constructed so that the synchronous relation between the systems can be restored to resume the machining even in a numerical control apparatus in correspondence with multiple systems.
    Type: Grant
    Filed: October 3, 2001
    Date of Patent: March 1, 2005
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Masakazu Sagasaki, Toshihiro Niwa, Takashi Itoh
  • Patent number: 6836491
    Abstract: A semiconductor laser device comprises a semiconductor laser chip, a first member which has one surface substantially perpendicular to a direction of an emission laser beam and has a concave having a bottom face substantially parallel to the one surface, and a second member inserted into the concave and joined to the first member. The semiconductor laser chip is disposed to the bottom face of the concave of the first member. The second member is inserted and joined into the concave of the first member so as to cover the semiconductor laser chip. Consequently, it is avoided to impair smoothness of the one surface of the first member, so that it is possible to precisely join the first and second members after being joined together to a desired apparatus at the one surface.
    Type: Grant
    Filed: October 18, 2002
    Date of Patent: December 28, 2004
    Assignee: Sharp Kabushiki Kaisha
    Inventor: Takashi Itoh
  • Publication number: 20040232857
    Abstract: A CRT device includes a cold cathode electron gun realizing high resolution in all current areas. A field emitter type cathode having a field emitter array and a gate electrode, a first grid electrode, and a second grid electrode constituting the electron gun are arranged in this order toward a phosphor screen. The potential Vgate of the gate electrode is higher as the beam current is larger. The potential Vg1 of the first grid electrode takes a fixed value smaller than the potential Vgate. As the beam current increases, electrons passing through the gate electrode are accelerated more and converged to a lesser degree, whereas the lens strength of the cathode lens formed by the gate electrode, the first grid electrode, and the second grid electrode is enhanced more. Therefore, the beam diameter at the main lens can be made uniform regardless of the amount of beam current.
    Type: Application
    Filed: March 9, 2004
    Publication date: November 25, 2004
    Inventors: Takashi Itoh, Masahide Yamauchi, Koji Fujii
  • Publication number: 20040231141
    Abstract: A laminate is prepared by forming metal layer A on one face of a polymer film by dry plating method. When circuit is formed by using the laminate according to the semi-additive method, a high-density printed wiring board having excellent circuit shape, insulating property between the circuits and adhesion with the substrate can be obtained. By forming an adhesive layer on the other side of the polymer film of the laminate, an interlayer adhesive film is prepared. By thermally fusing or curing the adhesive layer after laminating the interlayer adhesive film on the inner layer circuit board, a multi-layer printed wiring board can be prepared. When preparing the circuit board by etching the first metal coating, an etchant which selectively etches the first metal coating is preferably used.
    Type: Application
    Filed: January 5, 2004
    Publication date: November 25, 2004
    Inventors: Masaru Nishinaka, Kanji Shimo-Ohsako, Takashi Itoh, Mutsuaki Murakami
  • Patent number: 6794822
    Abstract: A field emission electron source includes: a field emission array portion composed of an insulation layer with a plurality of apertures, which is formed on a substrate, an extraction electrode formed on the insulation layer, and a plurality of cathodes formed respectively on the substrate in the plurality of apertures; a cathode base for fixing the field emission array portion; and an electron lens portion composed of a plurality of electrode members having a function of accelerating and converging an electron beam emitted from the field emission array portion. An emission axis of the electron beam emitted from the field emission array portion has a predetermined angle with respect to an optical axis of the electron lens portion. Thus, the field emission array portion can be protected from impact caused by ions generated in the electron lens portion, thereby improving the life of a field emission electron source.
    Type: Grant
    Filed: November 12, 2002
    Date of Patent: September 21, 2004
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Keisuke Koga, Toru Kawase, Masahide Yamauchi, Koji Fujii, Takashi Itoh
  • Publication number: 20040176526
    Abstract: The present invention provides a resin composition comprising a polyimide containing particular dianhydride and diamine, and an epoxy resin. The resin composition can be bonded at a relatively low temperature, has excellent heat resistance, adhesion property, soldering heat resistance and retaining ratio of peeling strength after PCT. By forming a circuit using the polyimide resin sheet or the polyimide resin sheet with metal foil, which comprises the resin composition, according to the semi-additive method, a printed wiring board having a good wiring shape, firm adhesion of circuit and high insulating resistance in the microcircuit space can be obtained.
    Type: Application
    Filed: January 5, 2004
    Publication date: September 9, 2004
    Inventors: Kanji Shimo-Ohsako, Takashi Itoh, Masaru Nishinaka, Shigeru Tanaka, Mutsuaki Murakami
  • Publication number: 20040174801
    Abstract: The object of the invention is to provide an optical pick-up apparatus and a semiconductor laser apparatus which can suppress reduction of optical utilization efficiency for the laser light emitted from the semiconductor laser element. When a laser light which is emitted from a laser element for DVD and whose polarization direction is perpendicular to a direction of a groove of the polarization grating is incident on the polarization grating, the polarization grating does not diffract the laser light and transmits the laser light as zero-order diffraction light. Consequently, all of the laser light A emitted from the laser element for DVD can be used for reading information signal of DVD and detecting FES and TES. This enables reduction of optical utilization efficiency arising by diffracting action of a grating used for detecting TES of CD in a conventional optical pick-up apparatus to be suppressed.
    Type: Application
    Filed: November 26, 2003
    Publication date: September 9, 2004
    Applicant: SHARP KABUSHIKI KAISHA
    Inventors: Shigehiro Yamada, Takashi Itoh, Nobumasa Kaneko, Kazunori Matsubara
  • Patent number: 6789137
    Abstract: A semiconductor memory device includes an address buffer, a clock buffer, a control signal buffer, a control circuit, a mode register, a memory cell array, a signal select circuit, a DLL, an I/O buffer and a QS buffer. The mode register provides a signal at H- or L-level to the signal select circuit. The signal select circuit selects a data strobe signal sent from an I/O terminal in accordance with the signal at L-level, and provides it to the QS buffer. The signal select circuit selects a clock sent from an I/O terminal in accordance with the signal at H-level, and provides it to the QS buffer.
    Type: Grant
    Filed: February 12, 2003
    Date of Patent: September 7, 2004
    Assignee: Renesas Technology Corp.
    Inventor: Takashi Itoh
  • Patent number: 6773809
    Abstract: There is provided a copper foil with an insulating adhesive which is excellent in that an insulating adhesive layer has low dieletric constant, low dieletric loss tangent and high adhering force at a normal temperature and a high temperature, and steps for manufacturing a multilayer printed circuit board can be shortened due to the presence of a copper foil on which a circuit can be formed by etching or the like. An insulating adhesive composition containing as an essential component an organic compound having at least two alkenyl groups having the reactivity with a SiH group in one molecule, and a silicon compound containing at least two SiH groups in one molecule and a copper foil are incorporated.
    Type: Grant
    Filed: November 8, 2000
    Date of Patent: August 10, 2004
    Assignee: Kaneka Corporation
    Inventors: Takashi Itoh, Shoji Hara, Hirosaku Nagano
  • Publication number: 20040153199
    Abstract: By using a configuration comprising sampling means for sampling block end information about each system program, means for identifying a resumption block and a resumption position of each system based on the block end information of each system at the time of a machining halt, and means for calculating information about a synchronous relation between the systems from the block end information of each system and resuming and starting each system based on this calculated result when machining is resumed from the resumption position, it is constructed so that the synchronous relation between the systems can be restored to resume the machining even in a numerical control apparatus in correspondence with multiple systems.
    Type: Application
    Filed: October 30, 2003
    Publication date: August 5, 2004
    Inventors: Masakazu Sagasaki, Toshihiro Niwa, Takashi Itoh
  • Publication number: 20040063898
    Abstract: The polyimide film of the present invention is produced in the following manner: polyamic acid made of a combination of a specific acid anhydride constituent and a specific diamine constituent are heated under a low-pressure circumstance for heat imidation, and the obtained imide is dissolved again in a solvent to be polyimide solution, then the polyimide solution is formed to be a film. In this manner, it is possible to provide a polyimide film essentially transparent and colorless, and has sufficient toughness to prevent occurrences of a crack or a break when the film is folded and creased by hand.
    Type: Application
    Filed: August 5, 2003
    Publication date: April 1, 2004
    Inventors: Masaru Nishinaka, Takashi Itoh
  • Publication number: 20040047220
    Abstract: A semiconductor memory device includes an address buffer, a clock buffer, a control signal buffer, a control circuit, a mode register, a memory cell array, a signal select circuit, a DLL, an I/O buffer and a QS buffer. The mode register provides a signal at H- or L-level to the signal select circuit. The signal select circuit selects a data strobe signal sent from an I/O terminal in accordance with the signal at L-level, and provides it to the QS buffer. The signal select circuit selects a clock sent from an I/O terminal in accordance with the signal at H-level, and provides it to the QS buffer.
    Type: Application
    Filed: February 12, 2003
    Publication date: March 11, 2004
    Applicant: MITSUBISHI DENKI KABUSHIKI KAISHA
    Inventor: Takashi Itoh
  • Publication number: 20040030972
    Abstract: In a read out mode, a NAND circuit to which latch data of both bit lines are input provides an L output when potentials of the bit line pair are constantly identical, and provides an H output when the potentials of the bit line pair change, even when the word line rendered active is switched. In a writing mode, the NAND circuit provides an L output. In a reading mode, H is applied to the gate of a first transistor that connects a bit line BL with the NAND circuit. In a writing mode, H is applied to the gate of the first transistor or a second transistor that connects a bit line /BL with the NAND circuit. Potential change occurs at the bit line pair according to an output of the NAND circuit.
    Type: Application
    Filed: January 15, 2003
    Publication date: February 12, 2004
    Applicant: Mitsubishi Denki Kabushiki Kaisha
    Inventor: Takashi Itoh