Patents by Inventor Takashi Kasuga
Takashi Kasuga has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240093409Abstract: A method for producing a cotton-wool like material for bone regeneration using a wet spinning method. 50-80 wt % of calcium salt particles and 50-20 wt % of PDLLGA resin are put into a mixing vessel, dissolved in acetone, and stirred to produce a spinning solution with a resin concentration of 10-20 wt % in which said calcium salt particles are dispersed. The produced spinning solution is filled in a syringe, and the spinning solution filled in the syringe is injected into a collector container filled with poor solvent by extruding the spinning solution from the discharge port of an injection needle having a predetermined diameter. The spinning solution injected into the poor solvent is solidified into fibers by interdiffusion of desorption of organic solvent and penetration of poor solvent in the poor solvent solution. The fibers solidified in the poor solvent are deposited in a floating state in the collector vessel without fiber-to-fiber adhesion and collected in a cotton-wool like shape.Type: ApplicationFiled: November 18, 2021Publication date: March 21, 2024Applicants: Nagoya Institute of Technology, ORTHOREBIRTH CO., LTD.Inventors: Toshihiro Kasuga, Takashi Matsubara
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Publication number: 20240098889Abstract: A printed circuit board includes: an insulating base film; and a plurality of wiring portions foamed on a surface of the base film. The wiring portions include a seed layer directly or indirectly layered on the surface of the base film and a metal layer layered on the seed layer. The base film has a wiring area including the plurality of wiring portions and a non-wiring area not including the wiring portions. The plurality of wiring portions include at least one outermost boundary wiring portion and a plurality of inner wiring portions. The outermost boundary wiring portion is formed on an outermost-side of the base film in the wiring area and at a boundary between the wiring area and the non-wiring area. An average thickness of the outermost boundary wiring portion is 40?m or more. An average width of the outermost boundary wiring portion is 30 ?m or more.Type: ApplicationFiled: November 16, 2023Publication date: March 21, 2024Inventors: Hiroshi UEDA, Ippei TANAKA, Takashi KASUGA, Masamichi YAMAMOTO
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Patent number: 11864312Abstract: According to one aspect of the present disclosure, a printed circuit board includes: an insulating base film; and a plurality of wiring portions formed on a surface of the base film, wherein the wiring portions include a seed layer that is directly or indirectly layered on the surface of the base film and a metal layer that is layered on the seed layer, wherein the base film has a wiring area including the plurality of wiring portions and a non-wiring area not including the wiring portions, wherein the plurality of wiring portions include at least one outermost boundary wiring portion and a plurality of inner wiring portions other than the outermost boundary wiring portion, wherein the outermost boundary wiring portion is formed on an outermost side of the base film in the wiring area and at a boundary between the wiring area and the non-wiring area, wherein an average width of the outermost boundary wiring portion is 30 ?m or more, wherein an average width of the inner wiring portions is 20 ?m or less, and wType: GrantFiled: February 27, 2020Date of Patent: January 2, 2024Assignee: SUMITOMO ELECTRIC INDUSTRIES, LTD.Inventors: Hiroshi Ueda, Ippei Tanaka, Takashi Kasuga, Masamichi Yamamoto
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Publication number: 20230120515Abstract: An interconnect substrate includes a pad for external connection and an insulating layer, wherein a portion of a lower surface of the pad is covered with the insulating layer, wherein an upper surface of the pad is situated at a lower position than an upper surface of the insulating layer, and wherein a groove whose bottom surface is formed by the insulating layer is formed around the pad in a plan view, and has an opening on an upper surface side of the insulating layer.Type: ApplicationFiled: October 14, 2022Publication date: April 20, 2023Inventors: Hikaru TANAKA, Takashi KASUGA, Tomoyuki SHIMODAIRA, Hitoshi KONDO
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Publication number: 20230123522Abstract: A wiring board includes a pad configured to make an external electrical connection, and an insulating layer. A portion of a lower surface of the pad is covered with the insulating layer. The pad includes a base portion, and an extending portion formed integrally with the base portion and extending toward an outer periphery of a side surface of the base portion in a plan view at a lower end of the side surface of the base portion. The insulating layer is provided with a groove that is located in a periphery of the pad in the plan view, exposes a side surface of the pad, and opens to an upper surface of the insulating layer.Type: ApplicationFiled: October 4, 2022Publication date: April 20, 2023Inventors: Hikaru TANAKA, Takashi KASUGA, Tomoyuki SHIMODAIRA, Hitoshi KONDO
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Publication number: 20230089948Abstract: A wiring board includes: a wiring layer; an insulating layer laminated on the wiring layer; an opening portion penetrating through the insulating layer to the wiring layer; a recess portion formed in a surface of the wiring layer exposed from the opening portion of the insulating layer; and a conductor film formed in the opening portion of the insulating layer and the recess portion of the wiring layer, wherein the recess portion of the wiring layer includes a raised portion, which is raised higher than an outer peripheral portion of a bottom surface, at a central portion of the bottom surface.Type: ApplicationFiled: September 19, 2022Publication date: March 23, 2023Inventors: Takashi Kasuga, Tomoyuki Shimodaira, Hikaru Tanaka, Naotaka Noguchi, Takashi Sato, Hitoshi Kondo
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Publication number: 20220278045Abstract: A built-in component board includes a first insulating layer; wiring layer and a metal pad layer that are formed on the first insulating layer; a second insulating layer that is formed on the wiring layer and the metal pad layer; and a cavity that is formed on the second insulating layer and that exposes the metal pad layer. Furthermore, the built-in component board includes an electronic component that is mounted on the metal pad layer; and a filling layer that is filled in the cavity and that buries the electronic component. Furthermore, a metal used for the metal pad layer includes a metal having thermal conductivity that is lower than that of a metal used for the wiring layer.Type: ApplicationFiled: February 17, 2022Publication date: September 1, 2022Inventors: Takashi Kasuga, Takashi Sato, Yasuyuki Yamaguchi
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Publication number: 20220225503Abstract: A wiring substrate includes: a wiring layer; an insulating layer that is laminated on the wiring layer; an opening portion that passes through the insulating layer to the wiring layer; and an electric conductor film that is formed at the opening portion of the insulating layer. A surface of the insulating layer includes a smoothed portion that is not covered by the electric conductor film, and a roughened portion that includes an inner wall surface of the opening portion covered by the electric conductor film and that have surface roughness that is greater than surface roughness of the smoothed portion.Type: ApplicationFiled: January 11, 2022Publication date: July 14, 2022Inventors: Hikaru Tanaka, Takashi Kasuga
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Publication number: 20220167498Abstract: According to one aspect of the present disclosure, a printed circuit board includes: an insulating base film; and a plurality of wiring portions formed on a surface of the base film, wherein the wiring portions include a seed layer that is directly or indirectly layered on the surface of the base film and a metal layer that is layered on the seed layer, wherein the base film has a wiring area including the plurality of wiring portions and a non-wiring area not including the wiring portions, wherein the plurality of wiring portions include at least one outermost boundary wiring portion and a plurality of inner wiring portions other than the outermost boundary wiring portion, wherein the outermost boundary wiring portion is formed on an outermost side of the base film in the wiring area and at a boundary between the wiring area and the non-wiring area, wherein an average width of the outermost boundary wiring portion is 30 ?m or more, wherein an average width of the inner wiring portions is 20 ?m or less, and wType: ApplicationFiled: February 27, 2020Publication date: May 26, 2022Inventors: Hiroshi UEDA, Ippei TANAKA, Takashi KASUGA, Masamichi YAMAMOTO
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Patent number: 11013113Abstract: According to the present invention, a base material for a printed circuit board includes: an insulating base film; and a metal layer that is layered on at least one surface of the base film and that includes copper as a main component, wherein in a content per unit area in a region of 100 nm or less from an interface of the metal layer with the base film, Cr<0.1 mg/m2, and Ni<0.1 mg/m2, wherein an arithmetic mean roughness (Sa) of the surface of the base film on which the metal layer is layered is less than 0.10 ?m.Type: GrantFiled: September 24, 2018Date of Patent: May 18, 2021Assignees: SUMITOMO ELECTRIC INDUSTRIES, LTD., SUMITOMO ELECTRIC PRINTED CIRCUITS, INC.Inventors: Motohiko Sugiura, Issei Okada, Takashi Kasuga, Yoshio Oka, Kenji Ohki
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Publication number: 20210127487Abstract: The base material for printed circuit board according to one aspect of the present disclosure is a base material for printed circuit board comprising a base film having an insulating property, a sintering layer inducing a plurality of copper particles and formed on at least one surface of the base film and an electroless copper plating layer formed on a surface of the sintering layer, the surface being on an opposite side to the base film, and filled in the sintering layer, and wherein a lightness L* of a surface of the electroless copper plating layer, the surface being on an opposite side to the sintering layer, is 45.0 or more and 85.0 or less, a chromaticity a* thereof is 5.0 or more and 25.0 or less, and a chromaticity b* thereof is 5.0 or more and 25.0 or less.Type: ApplicationFiled: April 24, 2019Publication date: April 29, 2021Inventors: Kenichiro AIKAWA, Motohiko SUGIURA, Takashi KASUGA, Kazuhiro MIYATA, Kayo HASHIZUME, Masamichi YAMAMOTO
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Publication number: 20210022245Abstract: According to the present invention, a base material for a printed circuit board includes: an insulating base film; and a metal layer that is layered on at least one surface of the base film and that includes copper as a main component, wherein in a content per unit area in a region of 100 nm or less from an interface of the metal layer with the base film, Cr<0.1 mg/m2, and Ni<0.1 mg/m2, wherein an arithmetic mean roughness (Sa) of the surface of the base film on which the metal layer is layered is less than 0.10 ?m.Type: ApplicationFiled: September 24, 2018Publication date: January 21, 2021Inventors: Motohiko SUGIURA, Issei OKADA, Takashi KASUGA, Yoshio OKA, Kenji OHKI
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Patent number: 10889086Abstract: A resin film according to one aspect of the present invention is a resin film having polyimide as a main component, the resin film including a modified layer formed in a depth direction from at least one side of the resin film; and a non-modified layer other than the modified layer, wherein a ring-opening rate of an imide ring of the polyimide in the modified layer is higher than a ring-opening rate of an imide ring of the polyimide in the non-modified layer, and an average thickness of the modified layer from the one side of the resin film is greater than or equal to 10 nm and less than or equal to 500 nm.Type: GrantFiled: March 20, 2018Date of Patent: January 12, 2021Assignees: SUMITOMO ELECTRIC INDUSTRIES, LTD., SUMITOMO ELECTRIC PRINTED CIRCUITS, INC.Inventors: Kayo Hashizume, Yoshio Oka, Masamichi Yamamoto, Takashi Kasuga, Yugo Kubo, Hideki Kashihara, Hiroshi Ueda
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Publication number: 20200376810Abstract: A resin film according to one aspect of the present invention is a resin film having polyimide as a main component, the resin film including a modified layer formed in a depth direction from at least one side of the resin film; and a non-modified layer other than the modified layer, wherein a ring-opening rate of an imide ring of the polyimide in the modified layer is higher than a ring-opening rate of an imide ring of the polyimide in the non-modified layer, and an average thickness of the modified layer from the one side of the resin film is greater than or equal to 10 nm and less than or equal to 500 nm.Type: ApplicationFiled: March 20, 2018Publication date: December 3, 2020Inventors: Kayo HASHIZUME, Yoshio OKA, Masamichi YAMAMOTO, Takashi KASUGA, Yugo KUBO, Hideki KASHIHARA, Hiroshi UEDA
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Patent number: 10842027Abstract: A base material for a printed circuit board includes: an insulating base film; a sintered layer that is layered on at least one side surface of the base film and that is formed of a plurality of sintered metal particles; an electroless plating layer that is layered on a surface of the sintered layer that is opposite to the base film; and an electroplating layer that is layered on a surface of the electroless plating layer that is opposite to the sintered layer, wherein an arithmetic mean height Sa of the surface of the electroless plating layer opposite to the sintered layer is greater than or equal to 0.001 ?m and less than or equal to 0.5 ?m.Type: GrantFiled: July 9, 2018Date of Patent: November 17, 2020Assignees: SUMITOMO ELECTRIC INDUSTRIES, LTD., SUMITOMO ELECTRIC PRINTED CIRCUITS, INC.Inventors: Kazuhiro Miyata, Takashi Kasuga, Yoshio Oka, Hiroshi Ueda
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Publication number: 20200288578Abstract: A base material for a printed circuit board includes: an insulating base film; a sintered layer that is layered on at least one side surface of the base film and that is formed of a plurality of sintered metal particles; an electroless plating layer that is layered on a surface of the sintered layer that is opposite to the base film; and an electroplating layer that is layered on a surface of the electroless plating layer that is opposite to the sintered layer, wherein an arithmetic mean height Sa of the surface of the electroless plating layer opposite to the sintered layer is greater than or equal to 0.001 ?m and less than or equal to 0.5 ?m.Type: ApplicationFiled: July 9, 2018Publication date: September 10, 2020Inventors: Kazuhiro MIYATA, Takashi KASUGA, Yoshio OKA, Hiroshi UEDA
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Patent number: 10596782Abstract: A substrate for a printed circuit board according to an embodiment of the present invention includes a resin film and a metal layer stacked on at least one of surfaces of the resin film. An average diffusion depth of a main metal of the metal layer in the resin film is 100 nm or less after a weather resistance test in which the substrate is held at 150° C. for seven days. The average diffusion depth is preferably 80 nm or less before the weather resistance test.Type: GrantFiled: June 1, 2016Date of Patent: March 24, 2020Assignees: SUMITOMO ELECTRIC INDUSTRIES, LTD., SUMITOMO ELECTRIC PRINTED CIRCUITS, INC.Inventors: Kayo Hashizume, Yoshio Oka, Takashi Kasuga, Jinjoo Park, Hiroshi Ueda
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Patent number: 10537017Abstract: A printed circuit board according to an embodiment of the present invention includes a base film containing, as a main component, a polyimide and a conductive pattern disposed on at least one surface of the base film. The conductive pattern includes a copper particle bond layer which is fixed to the base film. An external transmittance for a wavelength of 500 nm in a conductive pattern non-formed region of the base film is 70% or less of an internal transmittance for a wavelength of 500 nm in a middle layer portion of the base film.Type: GrantFiled: August 1, 2016Date of Patent: January 14, 2020Assignees: SUMITOMO ELECTRIC INDUSTRIES, LTD., SUMITOMO ELECTRIC PRINTED CIRCUITS, INC.Inventors: Kohei Okamoto, Kousuke Miura, Hiroshi Ueda, Takashi Kasuga, Kazuhiro Miyata
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Patent number: 10537020Abstract: A printed circuit board according to an embodiment of the present invention includes a base film having an insulating property and a conductive pattern disposed on at least one surface of the base film. The conductive pattern includes a copper particle bond layer which is fixed to the base film, and a lightness L* of a conductive pattern non-formed region of the base film is 60 or less. The base film may include a modified layer on one surface side thereof.Type: GrantFiled: August 1, 2016Date of Patent: January 14, 2020Assignees: SUMITOMO ELECTRIC INDUSTRIES, LTD., SUMITOMO ELECTRIC PRINTED CIRCUITS, INC.Inventors: Kohei Okamoto, Kousuke Miura, Hiroshi Ueda, Takashi Kasuga, Kazuhiro Miyata
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Patent number: 10307825Abstract: An object of the present invention is to provide a metal powder and an ink with which a sintered body having good flexibility can be formed, and a sintered body having good flexibility. A metal powder according to an embodiment of the present invention has a mean particle size D50BET of 1 nm or more and 200 nm or less as calculated by a BET method, a mean crystallite size DCryst of 20 nm or less as determined by an X-ray analysis, and a ratio (DCryst/D50BET) of the mean crystallite size DCryst to the mean particle size D50BET of less than 0.4.Type: GrantFiled: January 26, 2016Date of Patent: June 4, 2019Assignees: SUMITOMO ELECTRIC INDUSTRIES, LTD., SUMITOMO ELECTRIC PRINTED CIRCUITS, INC.Inventors: Issei Okada, Yoshio Oka, Takashi Kasuga, Yasuhiro Okuda, Jinjoo Park, Kousuke Miura, Hiroshi Ueda