Patents by Inventor Takashi Kasuga

Takashi Kasuga has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20170127516
    Abstract: A substrate for a printed circuit board includes a base film having an insulating property; a first conductive layer formed on at least one of surfaces of the base film by application of a conductive ink containing metal particles; and a second conductive layer formed, by plating, on a surface of the first conductive layer, the surface being on a side opposite to the base film, wherein a region near an interface between the base film and the first conductive layer contains a metal oxide species based on a metal of the metal particles and a metal hydroxide species based on the metal of the metal particles, the metal oxide species in the region near the interface between the base film and the first conductive layer has a mass per unit area of 0.1 ?g/cm2 or more and 10 ?g/cm2 or less, and a mass ratio of the metal oxide species to the metal hydroxide species is 0.1 or more.
    Type: Application
    Filed: March 19, 2015
    Publication date: May 4, 2017
    Inventors: Takashi KASUGA, Yoshio OKA, Shigeyoshi NAKAYAMA, Jinjoo PARK, Sumito UEHARA, Kousuke MIURA, Hiroshi UEDA
  • Publication number: 20170099732
    Abstract: A substrate for a printed circuit board according to the present invention includes a base film having an insulating property and including at least one opening; a first conductive layer that is formed on both surfaces of the base film by applying and heat-treating a conductive ink containing metal particles, and that fills the at least one opening; and a second conductive layer formed, by plating, on at least one of surfaces of the first conductive layer. The metal particles preferably have a mean particle size of 1 nm or more and 500 nm or less.
    Type: Application
    Filed: March 26, 2015
    Publication date: April 6, 2017
    Inventors: Takashi KASUGA, Yoshio OKA, Jinjoo PARK, Sumito UEHARA, Kousuke MIURA, Hiroshi UEDA
  • Publication number: 20160330847
    Abstract: Provided are a substrate for a printed wiring board, and a printed wiring board, which are not limited in size because vacuum equipment is not necessary for the production, in which an organic adhesive is not used, and which can include a conductive layer (copper foil layer) having a sufficiently small thickness. Also provided are a method for producing the substrate for a printed wiring board, and a method for producing the printed wiring board. A substrate for a printed wiring board includes an insulating base, a first conductive layer that is stacked on the insulating base, and a second conductive layer that is stacked on the first conductive layer, in which the first conductive layer is a coating layer composed of a conductive ink containing metal particles, and the second conductive layer is a plating layer.
    Type: Application
    Filed: July 18, 2016
    Publication date: November 10, 2016
    Inventors: Yoshio OKA, Takashi KASUGA, Issei OKADA, Katsunari MIKAGE, Naota UENISHI, Yasuhiro OKUDA
  • Publication number: 20160330850
    Abstract: Provided are a substrate for a printed wiring board, and a printed wiring board, which are not limited in size because vacuum equipment is not necessary for the production, in which an organic adhesive is not used, and which can include a conductive layer (copper foil layer) having a sufficiently small thickness. Also provided are a method for producing the substrate for a printed wiring board, and a method for producing the printed wiring board. A substrate for a printed wiring board includes an insulating base, a first conductive layer that is stacked on the insulating base, and a second conductive layer that is stacked on the first conductive layer, in which the first conductive layer is a coating layer composed of a conductive ink containing metal particles, and the second conductive layer is a plating layer.
    Type: Application
    Filed: July 19, 2016
    Publication date: November 10, 2016
    Inventors: Yoshio OKA, Takashi KASUGA, Issei OKADA, Katsunari MIKAGE, Naota UENISHI, Yasuhiro OKUDA
  • Publication number: 20140332258
    Abstract: An object of the present invention is to provide a double-sided printed wiring board in which a blind via hole can be easily and reliably formed, which can be accurately applied to lands of a surface-mounted component that are arranged at a narrow pitch, and in which an impedance mismatch can be effectively suppressed. The double-sided printed wiring board according to the present invention includes a substrate having an insulating property, a first conductive pattern stacked on a surface of the substrate and having a first land portion, a second conductive pattern stacked on another surface of the substrate and having a second land portion opposing the first land portion, and a blind via hole penetrating through the first land portion and the substrate, in which an average diameter of an outer shape of the first land portion is larger than an average diameter of an outer shape of the second land portion.
    Type: Application
    Filed: August 20, 2013
    Publication date: November 13, 2014
    Inventors: Yoshifumi Uchida, Yoshio Oka, Takashi Kasuga
  • Publication number: 20140166495
    Abstract: Provided are a substrate for a printed wiring board, and a printed wiring board, which are not limited in size because vacuum equipment is not necessary for the production, in which an organic adhesive is not used, and which can include a conductive layer (copper foil layer) having a sufficiently small thickness. Also provided are a method for producing the substrate for a printed wiring board, and a method for producing the printed wiring board. A substrate 1 for a printed wiring board includes an insulating base 11, a first conductive layer 12 that is stacked on the insulating base 11, and a second conductive layer 13 that is stacked on the first conductive layer 12, in which the first conductive layer 12 is a coating layer composed of a conductive ink containing metal particles, and the second conductive layer 13 is a plating layer.
    Type: Application
    Filed: February 20, 2014
    Publication date: June 19, 2014
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Yoshio OKA, Takashi KASUGA, Issei OKADA, Katsunari MIKAGE, Naota UENISHI, Yasuhiro OKUDA
  • Patent number: 8581118
    Abstract: A seal structure capable of achieving a waterproof structure at low cost while being flexibly adaptable to design change of a wire member, a method of forming the seal structure, a wire body and an electronic apparatus using them are provided. A seal structure 15 for sealing through holes 33, 43 of housings 31, 41 in which a wire member 20 is inserted is configured to include a covering C that includes a spacer member 11 disposed on one side of the through hole, secures the spacer member 11, the wire member 20 and the housings 31, 41 to each other and seals them.
    Type: Grant
    Filed: August 31, 2009
    Date of Patent: November 12, 2013
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Takashi Kasuga, Hidehiko Mishima, Kazuya Maruyama
  • Patent number: 8309853
    Abstract: A flexible printed wiring board includes a substrate, conductor wirings, a coverlay film, a jumper wiring, and through holes. The conductor wirings are disposed on a first surface of the substrate. The coverlay film covers at least part of the conductor wirings. The jumper wiring electrically connects the conductor wirings to each other. The through holes are formed in the substrate and respectively open to the surfaces of the conductor wirings. The jumper wiring is composed of a hardened material of a conductive paste and is formed so that a second surface of the substrate is continuous with respective surfaces of the conductor wirings to which the through holes open.
    Type: Grant
    Filed: February 15, 2008
    Date of Patent: November 13, 2012
    Assignees: Sumitomo Electric Industries, Ltd., Sumitomo Electric Printed Circuits, Inc.
    Inventors: Yoshio Oka, Takashi Kasuga, Jinjoo Park, Kouki Nakama
  • Publication number: 20120031656
    Abstract: Provided are a substrate for a printed wiring board, and a printed wiring board, which are not limited in size because vacuum equipment is not necessary for the production, in which an organic adhesive is not used, and which can include a conductive layer (copper foil layer) having a sufficiently small thickness. Also provided are a method for producing the substrate for a printed wiring board, and a method for producing the printed wiring board. A substrate 1 for a printed wiring board includes an insulating base 11, a first conductive layer 12 that is stacked on the insulating base 11, and a second conductive layer 13 that is stacked on the first conductive layer 12, in which the first conductive layer 12 is a coating layer composed of a conductive ink containing metal particles, and the second conductive layer 13 is a plating layer.
    Type: Application
    Filed: April 13, 2010
    Publication date: February 9, 2012
    Inventors: Yoshio Oka, Takashi Kasuga, Issei Okada, Katsunari Mikage, Naota Uenishi, Yasuhiro Okuda
  • Publication number: 20110000712
    Abstract: A seal structure capable of achieving a waterproof structure at low cost while being flexibly adaptable to design change of a wire member, a method of forming the seal structure, a wire body and an electronic apparatus using them are provided. A seal structure 15 for sealing through holes 33, 43 of housings 31, 41 in which a wire member 20 is inserted is configured to include a covering C that includes a spacer member 11 disposed on one side of the through hole, secures the spacer member 11, the wire member 20 and the housings 31, 41 to each other and seals them.
    Type: Application
    Filed: August 31, 2009
    Publication date: January 6, 2011
    Inventors: Takashi Kasuga, Hidehiko Mishima, Kazuya Maruyama
  • Publication number: 20100116525
    Abstract: A flexible printed wiring board includes a substrate, conductor wirings, a coverlay film, a jumper wiring, and through holes. The conductor wirings are disposed on a first surface of the substrate. The coverlay film covers at least part of the conductor wirings. The jumper wiring electrically connects the conductor wirings to each other. The through holes are formed in the substrate and respectively open to the surfaces of the conductor wirings. The jumper wiring is composed of a hardened material of a conductive paste and is formed so that a second surface of the substrate is continuous with respective surfaces of the conductor wirings which the through holes open.
    Type: Application
    Filed: February 15, 2008
    Publication date: May 13, 2010
    Inventors: Yoshio Oka, Takashi Kasuga, Jinjoo Park, Kouki Nakama
  • Patent number: 7510592
    Abstract: A method of producing metal powder by reducing ions of a metal for precipitation by performance of a reducing agent in a liquid-phase reaction system, wherein the metal is precipitated as metal powder particles by being reduced under conditions in which the exchange-current density of an oxidation-reduction reaction between the metal ions and the reducing agent is 100 ?A/cm2 or less, the exchange-current density being determined by the mixed potential theory.
    Type: Grant
    Filed: December 8, 2004
    Date of Patent: March 31, 2009
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Masatoshi Majima, Kohei Shimoda, Issei Okada, Masahiro Yamakawa, Takashi Kasuga
  • Publication number: 20080054311
    Abstract: A plurality of optical sensors (4) are arranged in a surface region of a semiconductor substrate (6) in a matrix pattern, and electric charge generated by the optical sensors (4) is transferred by first and second transfer electrodes (12 and 14) embedded under the optical sensors (4). The semiconductor substrate (6) is constructed by laminating a support substrate (16) composed of silicon, a buffer layer (18), and a thin silicon layer (20) composed of single-crystal silicon. p? regions (26) (overflow barrier) and n-type regions (28) which function as transfer paths are formed under the optical sensors (4). The first and the second transfer electrodes (12 and 14) are disposed between the buffer layer (18) and the n-type regions (28), and an insulating film (30) is interposed between the n-type regions (28) and the first and the second transfer electrodes (12 and 14). In this structure, the light-receiving area is large since the transfer electrodes are not disposed in the front region.
    Type: Application
    Filed: October 22, 2007
    Publication date: March 6, 2008
    Inventor: Takashi Kasuga
  • Patent number: 7285438
    Abstract: A plurality of optical sensors (4) are arranged in a surface region of a semiconductor substrate (6) in a matrix pattern, and electric charge generated by the optical sensors (4) is transferred by first and second transfer electrodes (12 and 14) embedded under the optical sensors (4). The semiconductor substrate (6) is constructed by laminating a support substrate (16) composed of silicon, a buffer layer (18), and a thin silicon layer (20) composed of single-crystal silicon. p? regions (26) (overflow barrier) and n-type regions (28) which function as transfer paths are formed under the optical sensors (4). The first and the second transfer electrodes (12 and 14) are disposed between the buffer layer (18) and the n-type regions (28), and an insulating film (30) is interposed between the n-type regions (28) and the first and the second transfer electrodes (12 and 14). In this structure, the light-receiving area is large since the transfer electrodes are not disposed in the front region.
    Type: Grant
    Filed: January 31, 2006
    Date of Patent: October 23, 2007
    Assignee: Sony Corporation
    Inventor: Takashi Kasuga
  • Patent number: 7285808
    Abstract: A plurality of optical sensors (4) are arranged in a surface region of a semiconductor substrate (6) in a matrix pattern, and electric charge generated by the optical sensors (4) is transferred by first and second transfer electrodes (12 and 14) embedded under the optical sensors (4). The semiconductor substrate (6) is constructed by laminating a support substrate (16) composed of silicon, a buffer layer (18), and a thin silicon layer (20) composed of single-crystal silicon. p? regions (26) (overflow barrier) and n-type regions (28) which function as transfer paths are formed under the optical sensors (4). The first and the second transfer electrodes (12 and 14) are disposed between the buffer layer (18) and the n-type regions (28), and an insulating film (30) is interposed between the n-type regions (28) and the first and the second transfer electrodes (12 and 14). In this structure, the light-receiving area is large since the transfer electrodes are not disposed in the front region.
    Type: Grant
    Filed: October 2, 2002
    Date of Patent: October 23, 2007
    Assignee: Sony Corporation
    Inventor: Takashi Kasuga
  • Publication number: 20070089565
    Abstract: A method of producing metal powder by reducing ions of a metal for precipitation by performance of a reducing agent in a liquid-phase reaction system, wherein the metal is precipitated as metal powder particles by being reduced under conditions in which the exchange-current density of an oxidation-reduction reaction between the metal ions and the reducing agent is 100 ?A/cm2 or less, the exchange-current density being determined by the mixed potential theory.
    Type: Application
    Filed: December 8, 2004
    Publication date: April 26, 2007
    Inventors: Masatoshi Majima, Kohei Shimoda, Issei Okada, Masahiro Yamakawa, Takashi Kasuga
  • Patent number: 7198736
    Abstract: A conductive silver paste according to the present invention comprises epoxy resin, flake-shaped silver powders having an average particle diameter of 0.5 to 50 ?m, and spherical silver powders, each having its surface coated with organic matter, having an average particle diameter of not more than 1 ?m, and a conductive film according to the present invention is formed by printing or applying the conductive silver paste on a surface of a base material, followed by drying, and then thermosetting the epoxy resin.
    Type: Grant
    Filed: March 2, 2005
    Date of Patent: April 3, 2007
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Takashi Kasuga, Kohei Shimoda, Masahiro Yamakawa
  • Publication number: 20060125036
    Abstract: A plurality of optical sensors (4) are arranged in a surface region of a semiconductor substrate (6) in a matrix pattern, and electric charge generated by the optical sensors (4) is transferred by first and second transfer electrodes (12 and 14) embedded under the optical sensors (4). The semiconductor substrate (6) is constructed by laminating a support substrate (16) composed of silicon, a buffer layer (18), and a thin silicon layer (20) composed of single-crystal silicon. p? regions (26) (overflow barrier) and n-type regions (28) which function as transfer paths are formed under the optical sensors (4). The first and the second transfer electrodes (12 and 14) are disposed between the buffer layer (18) and the n-type regions (28), and an insulating film (30) is interposed between the n-type regions (28) and the first and the second transfer electrodes (12 and 14). In this structure, the light-receiving area is large since the transfer electrodes are not disposed in the front region.
    Type: Application
    Filed: January 31, 2006
    Publication date: June 15, 2006
    Inventor: Takashi Kasuga
  • Publication number: 20050194577
    Abstract: A conductive silver paste according to the present invention comprises epoxy resin, flake-shaped silver powders having an average particle diameter of 0.5 to 50 ?m, and spherical silver powders, each having its surface coated with organic matter, having an average particle diameter of not more than 1 ?m, and a conductive film according to the present invention is formed by printing or applying the conductive silver paste on a surface of a base material, followed by drying, and then thermosetting the epoxy resin.
    Type: Application
    Filed: March 2, 2005
    Publication date: September 8, 2005
    Inventors: Takashi Kasuga, Kohei Shimoda, Masahiro Yamakawa
  • Publication number: 20050077588
    Abstract: A plurality of optical sensors (4) are arranged in a surface region of a semiconductor substrate (6) in a matrix pattern, and electric charge generated by the optical sensors (4) is transferred by first and second transfer electrodes (12 and 14) embedded under the optical sensors (4). The semiconductor substrate (6) is constructed by laminating a support substrate (16) composed of silicon, a buffer layer (18), and a thin silicon layer (20) composed of single-crystal silicon. p? regions (26) (overflow barrier) and n-type regions (28) which function as transfer paths are formed under the optical sensors (4). The first and the second transfer electrodes (12 and 14) are disposed between the buffer layer (18) and the n-type regions (28), and an insulating film (30) is interposed between the n-type regions (28) and the first and the second transfer electrodes (12 and 14). In this structure, the light-receiving area is large since the transfer electrodes are not disposed in the front region.
    Type: Application
    Filed: October 2, 2002
    Publication date: April 14, 2005
    Inventor: Takashi Kasuga