Abstract: A Y/C separating apparatus includes a first separator for separating a stationary C component which has a demodulator for demodulating a color difference signal from the composite video signal with a color subcarrier signal, a detector for detecting a frame difference signal between two adjacent frames of the color difference signal and a modulator for modulating the frame difference signal with the color subcarrier signal so as to reproduce the stationary C component.

Abstract: In a video tape recorder and reproduction apparatus, a reproduction circuit includes a switcher for generating a composite video signal composed of a multiplicity of synchronization signals from two or more video heads, a synchronization signal separator for receiving the composite video signal and separating from the composite video signal the synchronization signal, an error detection circuit for receiving the synchronization signal, detecting an error in the synchronization signal from an average period of the synchronization signals, and outputting an error signal representative of the error, a hold circuit for receiving the error signal and generating a correction signal having a constant value for each average period of the synchronization signals, with a value of the correction signal being adjusted by being added with the error signal and holding the adjusted value for each successive period of the synchronization signals and a delay circuit for receiving the composite video signal and correcting the

Abstract: A Y/C separation circuit for separating the Y and C components of a composite video signal having a horizontal scan period, which includes an input circuit for receiving the composite video signal, a first delay which receives the composite video signal and delays the composite video signal by an amount equal to an integer times the horizontal scan period, a second delay which receives the delayed output signal from the first delay and delays delayed output signal by an amount equal to an integral plus one times the horizontal scan period, a C component extraction circuit which receives the composite video signal and the output from the first and second delays and outputs a C component signal representing the C component of the composite video signal and a Y component extraction circuit which receives the composite video signal from the input circuit and the C component signal from the C component extraction circuit and generates a Y component signal representing the Y component of the composite video signal

Abstract: A phase detection circuit for detecting the phase shift of an input signal. An A/D converter converts the input signal into first, second and third digital data according to successive three sampling points. A first subtractor subtracts the third data from the second data to produce a first subtraction signal. A second subtractor subtracts the first data from the second data to produce a second subtraction signal. A third subtractor subtracts the second subtraction signal from the first subtraction signal to produce a signal representing the phase shift. An adder adds the first and second subtraction signals together to produce a signal representing the amplitude of the input signal. A converter converts the signal representing the phase shift into a signal representing the absolute value of the phase shift according to the signals representing the phase shift and the amplitude.

Abstract: An FM signal demodulator for converting the frequency of an input signal to a corresponding voltage. The demodulator includes a delay circuit responsive to the input signal for delaying the phase of the input signal by a fixed time, an exclusive-OR gate responsive to the input signal and the delayed phase signal from the delay circuit for outputting a pulse signal having a duration corresponding to the fixed time and an LPF responsive to the pulse signal for generating an output signal having a level which changes in response to changes in the frequency of the input signal.

Abstract: A DC motor is supplied, from a motor driver, with a brake voltage constituted by a forward drive voltage, a reverse drive voltage, and a stop voltage of a zero potential level. An operational current of the motor driver is supplied to a low-pass filter whose output is supplied to first and second sample and hold (S/H) circuits. The first S/H circuit performs its sampling operation after a minute period of time in which the brake voltage goes through a polarity inversion from the reverse drive voltage to the forward drive voltage. The second S/H circuit performs its sampling operation after a minute period of time in which the voltage applied is changed from the forward drive voltage to the reverse drive voltage. The outputs or sampled values of both S/H circuits are compared with each other by a comparator. When the sampled values equal each other, i.e., when the number of rotations of the motor becomes zero, the comparator outputs a coincidence pulse. This pulse is supplied to a stop detector.

Abstract: A circuit for adjusting a picture quality by processing a digital video signal. A digital filter receives the digital video signal and extracts a high-frequency component therefrom. A first waveform-shaping element wave-shapes the high-frequency component to provide a noise cancel signal for canceling the noise. A second waveform-shaping element wave-shapes the high-frequency component to provide a contour compensation signal for compensating a contour of a picture. An adder adds the digital video signal, the noise cancel signal and the contour compensation signal to provide a signal with adjusted picture quality.

Abstract: In a record mode, a record video signal applied to an input terminal is separated into a luminance signal and a color signal by a comb filter made up of a 1H delay line, an adder circuit and a subtraction circuit. In a playback mode, the reproduced luminance signal and color signal are added together in an adder circuit, thereby to form a video signal. This video signal is applied to the comb filter through switches and then is separated into a luminance signal and a color signal.

Abstract: A resistor, together with a charging capacitor, is connected in series between the emitters of transistors to constitute an emitter-coupled astable multivibrator to be used with a voltage-controlled oscillator. The resistance of the resistor is given by:R.sub.a =(.tau..sub.d1 +.tau..sub.d2)/2C.sub.awhere C.sub.a is capacitance of the capacitor and (.tau..sub.d1 +.tau..sub.d2) is a delay time during one period of oscillation, as determined by the circuit elements.

Abstract: A semiconductor integrated circuit comprises a differential pair of transistors, a pair of constant current source transistors, an emitter resistor connected between the emitters of the differential transistors, and a load resistor coupled to the collector of one of the differential transistors. Each of the differential transistors and constant current source transistors is a vertical PNP transistor. In the semiconductor integrated circuit, therefore, each vertical PNP transistor has its collector coupled with a parasitic diode having a relatively large junction capacitance. The parasitic diodes are reversely biased when the circuit is operative.

Abstract: A differential switch circuit having an input circuit being responsive to an input signal for providing switch instructions corresponding to the level of the input signal, a bias circuit coupled to the input circuit for generating bias signals respectively corresponding to the switch instructions, and a differential transistor circuit coupled to the bias circuit for providing a plurality of outputs in accordance with the potential of each of the bias signals. The input circuit includes comparators which respond to three levels of the input signal and provide the switch instructions in a manner so that the switch instructions respectively correspond to the levels of the input signal. The bias circuit includes three bias sources. Each of the bias sources generates one of the bias signals according to the switch instructions.