Patents by Inventor Takashi Kyono

Takashi Kyono has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20100297784
    Abstract: In the nitride based semiconductor optical device LE1, the strained well layers 21 extend along a reference plane SR1 tilting at a tilt angle ? from the plane that is orthogonal to a reference axis extending in the direction of the c-axis. The tilt angle ? is in the range of greater than 59 degrees to less than 80 degrees or greater than 150 degrees to less than 180 degrees. A gallium nitride based semiconductor layer P is adjacent to a light-emitting layer SP? with a negative piezoelectric field and has a band gap larger than that of a barrier layer. The direction of the piezoelectric field in the well layer W3 is directed in a direction from the n-type layer to the p-type layer, and the piezoelectric field in the gallium nitride based semiconductor layer P is directed in a direction from the p-type layer to the n-type layer. Consequently, the valence band, not the conduction band, has a dip at the interface between the light-emitting layer SP? and the gallium nitride based semiconductor layer P.
    Type: Application
    Filed: August 6, 2010
    Publication date: November 25, 2010
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Masaki UENO, Yohei ENYA, Takashi KYONO, Katsushi AKITA, Yusuke YOSHIZUMI, Takamichi SUMITOMO, Takao NAKAMURA
  • Publication number: 20100276663
    Abstract: In a GaN based semiconductor optical device 11a, the primary surface 13a of the substrate 13 tilts at a tilting angle toward an m-axis direction of the first GaN based semiconductor with respect to a reference axis “Cx” extending in a direction of a c-axis of the first GaN based semiconductor, and the tilting angle is 63 degrees or more, and is less than 80 degrees. The GaN based semiconductor epitaxial region 15 is provided on the primary surface 13a. On the GaN based semiconductor epitaxial region 15, an active layer 17 is provided. The active layer 17 includes one semiconductor epitaxial layer 19. The semiconductor epitaxial layer 19 is composed of InGaN. The thickness direction of the semiconductor epitaxial layer 19 tilts with respect to the reference axis “Cx.” The reference axis “Cx” extends in the direction of the [0001] axis. This structure provides the GaN based semiconductor optical device that can reduces decrease in light emission characteristics due to the indium segregation.
    Type: Application
    Filed: June 18, 2010
    Publication date: November 4, 2010
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Yohei ENYA, Yusuke YOSHIZUMI, Masaki UENO, Katsushi AKITA, Takashi KYONO, Takamichi SUMITOMO, Takao NAKAMURA
  • Patent number: 7816238
    Abstract: A GaN substrate having a large diameter of two inches or more by which a semiconductor device such as a light emitting element with improved characteristics such as luminance efficiency, an operating life and the like can be obtained at low cost industrially, a substrate having an epitaxial layer formed on the GaN substrate, a semiconductor device, and a method of manufacturing the GaN substrate are provided. A GaN substrate has a main surface and contains a low-defect crystal region and a defect concentrated region adjacent to low-defect crystal region. Low-defect crystal region and defect concentrated region extend from the main surface to a back surface positioned on the opposite side of the main surface. A plane direction [0001] is inclined in an off-angle direction with respect to a normal vector of the main surface.
    Type: Grant
    Filed: June 11, 2008
    Date of Patent: October 19, 2010
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Hideki Osada, Hitoshi Kasai, Keiji Ishibashi, Seiji Nakahata, Takashi Kyono, Katsushi Akita, Yoshiki Miura
  • Publication number: 20100230690
    Abstract: A group III nitride semiconductor device having a gallium nitride based semiconductor film with an excellent surface morphology is provided. A group III nitride optical semiconductor device 11a includes a group III nitride semiconductor supporting base 13, a GaN based semiconductor region 15, an active layer active layer 17, and a GaN semiconductor region 19. The primary surface 13a of the group III nitride semiconductor supporting base 13 is not any polar plane, and forms a finite angle with a reference plane Sc that is orthogonal to a reference axis Cx extending in the direction of a c-axis of the group III nitride semiconductor. The GaN based semiconductor region 15 is grown on the semipolar primary surface 13a. A GaN based semiconductor layer 21 of the GaN based semiconductor region 15 is, for example, an n-type GaN based semiconductor, and the n-type GaN based semiconductor is doped with silicon.
    Type: Application
    Filed: February 26, 2010
    Publication date: September 16, 2010
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Takashi KYONO, Yusuke YOSHIZUMI, Yohei ENYA, Katsushi AKITA, Masaki UENO, Takamichi SUMITOMO, Takao NAKAMURA
  • Publication number: 20100213439
    Abstract: In the nitride based semiconductor optical device LE1, the strained well layers 21 extend along a reference plane SR1 tilting at a tilt angle ? from the plane that is orthogonal to a reference axis extending in the direction of the c-axis. The tilt angle ? is in the range of greater than 59 degrees to less than 80 degrees or greater than 150 degrees to less than 180 degrees. A gallium nitride based semiconductor layer P is adjacent to a light-emitting layer SP? with a negative piezoelectric field and has a band gap larger than that of a barrier layer. The direction of the piezoelectric field in the well layer W3 is directed in a direction from the n-type layer to the p-type layer, and the piezoelectric field in the gallium nitride based semiconductor layer P is directed in a direction from the p-type layer to the n-type layer. Consequently, the valence band, not the conduction band, has a dip at the interface between the light-emitting layer SP? and the gallium nitride based semiconductor layer P.
    Type: Application
    Filed: April 1, 2010
    Publication date: August 26, 2010
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Masaki Ueno, Yohei Enya, Takashi Kyono, Katsushi Akita, Yusuke Yoshizumi, Takamichi Sumitomo, Takao Nakamura
  • Patent number: 7781314
    Abstract: Affords a manufacturing method enabling nitride-based semiconductor devices containing epitaxial films excelling in flatness and crystallinity to be easily produced. Method of manufacturing nitride semiconductor devices that are formed onto a semiconductor substrate being a compound containing nitrogen, and a Group IIIA element for forming compounds with nitrogen, including steps of: heating the semiconductor substrate (1) to a film-deposition temperature; supplying to the substrate a film-deposition gas containing a source gas for the Group IIIA element and a nitrogen source gas; and epitaxially growing onto the semiconductor substrate a thin film (2) of a compound containing nitrogen and the Group IIIA element; and being furnished with a step, in advance of the epitaxial growth step, of heating the semiconductor substrate to a pretreating temperature less than the film-deposition temperature, to clean the surface of the semiconductor substrate.
    Type: Grant
    Filed: December 17, 2007
    Date of Patent: August 24, 2010
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Takashi Kyono, Masaki Ueno
  • Publication number: 20100190284
    Abstract: In the method of fabricating a nitride-based semiconductor optical device by metal-organic chemical vapor deposition, a barrier layer is grown at a first temperature while supplying a gallium source to a reactor. The barrier layer comprises a first gallium nitride-based semiconductor. After the growth of the barrier layer, a nitrogen material and an indium material are supplied to the reactor without supply of the gallium source to perform a preflow of indium. Immediately after the preflow, a well layer is grown on the barrier layer at a second temperature while supplying an indium source and the gallium source to the reactor. The well layer comprises InGaN, and the second temperature is lower than the first temperature. The gallium source and the indium source are supplied to the reactor during plural first periods of the step of growing the well layer to grow plural InGaN layers, respectively.
    Type: Application
    Filed: January 22, 2010
    Publication date: July 29, 2010
    Applicant: Sumitomo Electric Industries, Ltd.
    Inventors: Yohei ENYA, Yusuke YOSHIZUMI, Masaki UENO, Takashi KYONO, Katsushi AKITA
  • Publication number: 20100189148
    Abstract: A group III nitride semiconductor laser is provided that has a good optical confinement property and includes an InGaN well layer having good crystal quality. An active layer 19 is provided between a first optical guiding layer 21 and a second optical guiding layer 23. The active layer 19 can include well layers 27a, 27b, and 27c and further includes at least one first barrier layer 29a provided between the well layers. The first and second optical guiding layers 21 and 23 respectively include first and second InGaN regions 21a and 23a smaller than the band gap E29 of the first barrier layer 29a, and hence the average refractive index nGUIDE of the first and second optical guiding layers 21 and 23 can be made larger than the refractive index n29 of the first barrier layer 29a. Thus, good optical confinement is achieved. The band gap E29 of the first barrier layer 29a is larger than the band gaps E21 and E23 of the first and second InGaN regions 21a and 23a.
    Type: Application
    Filed: February 17, 2009
    Publication date: July 29, 2010
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Takashi Kyono, Katsushi Akita, Yusuke Yoshizumi
  • Publication number: 20100059759
    Abstract: An active layer 17 is provided so as to emit light having a light emission wavelength in the range of 440 to 550 nm. A first conduction type gallium nitride-based semiconductor region 13, the active layer 17, and a second conduction type gallium nitride-based semiconductor region 15 are disposed in a predetermined axis Ax direction. The active layer 17 includes a well layer composed of hexagonal InXGa1-XN (0.16?X?0.35, X: strained composition), and the indium composition X is represented by a strained composition. The a-plane of the hexagonal InXGa1-XN is aligned in the predetermined axis Ax direction. The thickness of the well layer is in the range of more than 2.5 nm to 10 nm. When the thickness of the well layer is set to 2.5 nm or more, a light emitting device having a light emission wavelength of 440 nm or more can be formed.
    Type: Application
    Filed: April 17, 2008
    Publication date: March 11, 2010
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Katsushi Akita, Takashi Kyono, Keiji Ishibashi, Hitoshi Kasai
  • Publication number: 20100055820
    Abstract: In step S106, an InXGa1-XN well layer is grown on a semipolar main surface between times t4 and t5 while a temperature in a growth furnace is maintained at temperature TW. In step S107, immediately after completion of the growth of the well layer, the growth of a protective layer covering the main surface of the well layer is initiated at temperature TW. The protective layer is composed of a gallium nitride-based semiconductor with a band gap energy that is higher than that of the well layer and equal to or less than that of a barrier layer. In step S108, the temperature in the furnace is changed from temperatures TW to TB before the barrier layer growth. The barrier layer composed of the gallium nitride-based semiconductor is grown on the protective layer between times t8 and t9 while the temperature in the furnace is maintained at temperature TB.
    Type: Application
    Filed: August 12, 2009
    Publication date: March 4, 2010
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Katsushi Akita, Yohei Enya, Takashi Kyono, Takamichi Sumitomo, Yusuke Yoshizumi, Masaki Ueno, Takao Nakamura
  • Publication number: 20100047933
    Abstract: A substrate inspection method allowing inspection of all a plurality of substrates each provided at its surface with a plurality of layers by determining quality of the plurality of layers as well as methods of manufacturing the substrate and an element using the substrate inspection method are provided. The substrate inspection method includes a step of preparing the substrate provided at its main surface with the plurality of layers, a film forming step, a local etching step, and an inspection step or a composition analysis step. In the step, a concavity is formed in a region provided with an epitaxial layer of the main surface of the substrate by removing at least partially the epitaxial layer. In the inspection step, the inspection is performed on the layer exposed in the concavity.
    Type: Application
    Filed: October 29, 2009
    Publication date: February 25, 2010
    Inventors: Takao NAKAMURA, Toshio Ueda, Takashi Kyono
  • Publication number: 20100032644
    Abstract: An active layer (17) is provided so as to emit light having an emission wavelength in the 440 nm to 550 nm band. A first-conductivity-type gallium nitride semiconductor region (13), the active layer (17), and a second-conductivity-type gallium nitride semiconductor region (15) are arranged along a predetermined axis (Ax). The active layer (17) includes a well layer composed of hexagonal InxGa1-xN (0.16?x?0.4, x: strained composition), with the indium fraction x represented by the strained composition. The m-plane of the hexagonal InxGa1-xN is oriented along the predetermined axis (Ax). The well-layer thickness is between greater than 3 nm and less than or equal to 20 nm. Having the well-layer thickness be over 3 nm makes it possible to fabricate light-emitting devices having an emission wavelength of over 440 nm.
    Type: Application
    Filed: March 28, 2008
    Publication date: February 11, 2010
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Katsushi Akita, Takashi Kyono, Keiji Ishibashi, Hitoshi Kasai
  • Publication number: 20100009484
    Abstract: In the method of fabricating a quantum well structure which includes a well layer and a barrier layer, the well layer is grown at a first temperature on a sapphire substrate. The well layer comprises a group III nitride semiconductor which contains indium as a constituent. An intermediate layer is grown on the InGaN well layer while monotonically increasing the sapphire substrate temperature from the first temperature. The group III nitride semiconductor of the intermediate layer has a band gap energy larger than the band gap energy of the InGaN well layer, and a thickness of the intermediate layer is greater than 1 nm and less than 3 nm in thickness. The barrier layer is grown on the intermediate layer at a second temperature higher than the first temperature. The barrier layer comprising a group III nitride semiconductor and the group III nitride semiconductor of the barrier layer has a band gap energy larger than the band gap energy of the well layer.
    Type: Application
    Filed: July 9, 2009
    Publication date: January 14, 2010
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Katsushi AKITA, Takamichi SUMITOMO, Yohei ENYA, Takashi KYONO, Masaki UENO
  • Publication number: 20100008393
    Abstract: The group II nitride semiconductor light-emitting device includes: a gallium nitride based semiconductor region of n-type; a p-type gallium nitride based semiconductor region; a hole-blocking layer; and an active layer. The gallium nitride based semiconductor region of n-type has a primary surface, and the primary surface extends on a predetermined plane. The c-axis of the gallium nitride based semiconductor region tilts from a normal line of the predetermined plane. The hole-blocking layer comprises a first gallium nitride based semiconductor. The band gap of the hole-blocking layer is greater than the band gap of the gallium nitride based semiconductor region, and the thickness of the hole-blocking layer is less than the thickness of the gallium nitride based semiconductor region. The active layer comprises a gallium nitride semiconductor. The active layer is provided between the p-type gallium nitride based semiconductor region and the hole-blocking layer.
    Type: Application
    Filed: July 9, 2009
    Publication date: January 14, 2010
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Yohei Enya, Takashi Kyono, Katsushi Akita, Masaki Ueno
  • Publication number: 20090268768
    Abstract: A method of making a nitride semiconductor laser comprises forming a first InGaN film for an active layer on a gallium nitride based semiconductor region, and the first InGaN film has a first thickness. In the formation of the first InGaN film, a first gallium raw material, a first indium raw material, and a first nitrogen raw material are supplied to a reactor to deposit a first InGaN for forming the first InGaN film at a first temperature, and the first InGaN has a thickness thinner than the first thickness. Next, the first InGaN is heat-treated at a second temperature lower than the first temperature in the reactor, while supplying a second indium raw material and a second nitrogen raw material to the reactor. Then, after the heat treatment, a second InGaN is deposited at least once to form the first InGaN film.
    Type: Application
    Filed: April 24, 2009
    Publication date: October 29, 2009
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Masaki UENO, Takashi KYONO
  • Publication number: 20090227056
    Abstract: A method of fabricating a nitride semiconductor laser comprises preparing a substrate having a plurality of marker structures and a crystalline mass made of a hexagonal gallium nitride semiconductor. The primary and back surfaces of the substrate intersect with a predetermined axis extending in the direction of a c-axis of the hexagonal gallium nitride semiconductor. Each marker structure extends along a reference plane defined by the c-axis and an m-axis of the hexagonal gallium nitride semiconductor. The method comprises cutting the substrate along a cutting plane to form a wafer of hexagonal gallium nitride semiconductor, and the cutting plane intersects with the plurality of the marker structures. The wafer has a plurality of first markers, each of which extends from the primary surface to the back surface of the wafer, and each of the first markers comprises part of each of the marker structures. The primary surface of the wafer is semipolar or nonpolar.
    Type: Application
    Filed: March 3, 2009
    Publication date: September 10, 2009
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Takashi Kyono, Katsushi Akita, Yusuke Yoshizumi
  • Publication number: 20090212277
    Abstract: A group-III nitride light-emitting device is provided. An active layer having a quantum well structure is grown on a basal plane of a gallium nitride based semiconductor region. The quantum well structure is formed in such a way as to have an emission peak wavelength of 410 nm or more. The thickness of a well layer is 4 nm or more, and 10 nm or less. The well layer is composed of InXGa1-XN (0.15?X<1, where X is a strained composition). The basal plane of the gallium nitride based semiconductor region is inclined at an inclination angle within the range of 15 degrees or more, and 85 degrees or less with reference to a {0001} plane or a {000-1} plane of a hexagonal system group III nitride. The basal plane in this range is a semipolar plane.
    Type: Application
    Filed: February 20, 2009
    Publication date: August 27, 2009
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Katsushi Akita, Hitoshi Kasai, Takashi Kyono, Kensaku Motoki
  • Patent number: 7576351
    Abstract: A nitride semiconductor light generating device comprises an n-type gallium nitride based semiconductor layer, a quantum well active layer including an InX1AlY1Ga1-X1-Y1N (1>X1>0, 1>Y1>0) well layer and an InX2AlY2Ga1-X2-Y2N (1>X2>0, 1>Y2>0) barrier layer, an InX3AlY3Ga1-X3-Y3N (1>X3>0, 1>Y3>0) layer provided between the quantum well active layer and the n-type gallium nitride based semiconductor layer, and a p-type AlGaN layer having a bandgap energy greater than that of the InX2AlY2Ga1-X2-Y2N barrier layer. The indium composition X3 is greater than an indium composition X1. The indium composition X3 is greater than an indium composition X2. The aluminum composition Y2 is smaller than an aluminum composition Y3. The aluminum composition Y1 is smaller than an aluminum composition Y3. The oxygen concentration of the quantum well active layer is lower than that of the InX3AlY3Ga1-X3-Y3N layer.
    Type: Grant
    Filed: January 26, 2007
    Date of Patent: August 18, 2009
    Assignees: Sumitomo Electric Industries, Ltd., Riken
    Inventors: Takashi Kyono, Hideki Hirayama
  • Patent number: 7554122
    Abstract: In a nitride semiconductor light emitting device, a first conductivity type nitride semiconductor layer is provided on a support base and a second conductivity type nitride semiconductor layer is provided on the support base. An active region is provided between the first conductivity type nitride semiconductor layer and the second conductivity type nitride semiconductor layer. The active region includes an InX1AlY1Ga1-X1-Y1N well layer (1>X1>0 and 1>Y1>0) and an InX2AlY2Ga1-X2-Y2N barrier layer (1>X2>0 and 1>Y2>0). An InX3AlY3Ga1-X3-Y3N buffer layer (1>X3>0 and 1>Y3>0) is provided between the active region and the first conductivity type nitride semiconductor layer. A proportion X1 of indium in the InX1AlY1Ga1-X1-Y1N well layer is smaller than a proportion X3 of indium in the InX3AlY3Ga1-X3-Y3N buffer layer, and a proportion X2 of indium in the InX2AlY2Ga1-X2-Y2N barrier layer is smaller than the proportion X3 of indium in the InX3AlY3Ga1-X3-Y3N buffer layer.
    Type: Grant
    Filed: August 3, 2005
    Date of Patent: June 30, 2009
    Assignees: Sumitomo Electric Industries, Ltd., Riken
    Inventors: Takashi Kyono, Hideki Hirayama
  • Patent number: 7547910
    Abstract: Affords a semiconductor light-emitting device in which a decrease in external quantum efficiency has been minimized even at high current densities. In a semiconductor light-emitting device (11), a gallium nitride cladding layer (13) has a threading dislocation density of 1×107 cm?2 or less. An active region (17) has a quantum well structure (17a) consisted of a plurality of well layers (19) and a plurality of barrier layers (21), and the quantum well structure (17a) is provided so as to emit light having a peak wavelength within the wavelength range of 420 nm to 490 nm inclusive. The well layers (19) each include an un-doped InXGa1-XN (0<X<0.14, X: strained composition) region. The barrier layers (21) include an un-doped InYGa1-YN (0?Y?0.05, Y: strained composition, Y<X) region. Herein, indium composition X is indicated as strained composition, not as relaxation composition, in the embodiments of the present invention.
    Type: Grant
    Filed: September 27, 2007
    Date of Patent: June 16, 2009
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Katsushi Akita, Yusuke Yoshizumi, Takashi Kyono, Hiroyuki Kitabayashi, Koji Katayama