Patents by Inventor Takashi Maeda
Takashi Maeda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20250095743Abstract: A semiconductor memory device includes: a first conductive layer; and a second conductive layer adjacent to the first conductive layer. Write loops each include: a first program operation that applies the first conductive layer with a program voltage and applies a bit line with a first bit line voltage; and a second program operation that applies the first conductive layer with the program voltage and applies the bit line with a second bit line voltage larger than the first bit line voltage. The write operation includes a state judging operation that judges whether a memory cell corresponding to the semiconductor layer and the second conductive layer has been controlled to a Low-state, or not. When the memory cell has been controlled to the Low-state, the first program operation is executed, and when the memory cell has not been controlled to the Low-state, the second program operation is executed.Type: ApplicationFiled: September 10, 2024Publication date: March 20, 2025Applicant: Kioxia CorporationInventors: Tatsuo OGURA, Masaki KONDO, Takashi MAEDA
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Patent number: 12211557Abstract: A semiconductor memory device includes a first memory pillar and a sequencer. The first memory pillar is sandwiched between a first word line and a second word line, sandwiched between a third word line and a fourth word line, sandwiched between a fifth word line and a sixth word line, includes a first memory cell facing the first word line, a second memory cell facing the second word line, a third memory cell facing the third word line, a fourth memory cell facing the fourth word line, a fifth memory cell facing the fifth word line and a sixth memory cell facing the sixth word line. The sequencer executes an erase operation on the first to sixth memory cells to enable execution of a primary write operation for the first memory cell and a primary write operation for the second memory cell at different timings.Type: GrantFiled: March 1, 2023Date of Patent: January 28, 2025Assignee: Kioxia CorporationInventors: Kyosuke Sano, Kazutaka Ikegami, Takashi Maeda
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Patent number: 12211551Abstract: A control circuit of a semiconductor memory device performs a write operation on a memory cell transistor of the semiconductor memory device by performing a first pulse application operation of lowering a threshold voltage of the memory cell transistor, a precharge operation, and then a second pulse application operation. In the precharge operation, in a state in which first and second select transistors connected to the memory cell transistor are turned on, a bit line connected to the memory cell transistor is charged by applying a ground voltage to a word line connected to a gate of the memory cell transistor and applying a voltage higher than the ground voltage to a source line. In the second pulse application operation, in a state in which the first select transistor is turned on and the second select transistor is turned off, a program voltage is applied to the word line.Type: GrantFiled: March 2, 2023Date of Patent: January 28, 2025Assignee: Kioxia CorporationInventors: Natsuki Sakaguchi, Takashi Maeda, Rieko Funatsuki, Hidehiro Shiga
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Patent number: 12211567Abstract: A memory system according to an embodiment includes a first bit line, a source line, a first word line, a second word line, a first memory pillar and a control circuit. The control circuit performs a first verify operation to first and second memory cells, a second verify operation to the first memory cell, a third verify operation to the second memory cell and a write operation or a read operation with a lower voltage in accordance with a request from an external device.Type: GrantFiled: August 2, 2022Date of Patent: January 28, 2025Assignee: Kioxia CorporationInventors: Kazutaka Ikegami, Takashi Maeda, Reiko Sumi
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Patent number: 12162520Abstract: An electric vehicle control device includes an idling-sliding control unit that provides control to reduce or prevent idling and sliding that may occur on a wheel of an electric vehicle. The idling-sliding control unit includes an idling-sliding detection unit for detecting idling or sliding that has occurred on the electric vehicle, and a torque command value generation unit that generates a torque command value used for reducing or preventing idling or sliding, based on output of the idling-sliding detection unit. When a prediction signal representing an anticipated occurrence of idling or sliding is inputted, the torque command value generation unit performs narrowing of the torque command value regardless of whether or not the idling-sliding control unit is performing idling-sliding control.Type: GrantFiled: May 29, 2020Date of Patent: December 10, 2024Assignee: Mitsubishi Electric CorporationInventors: Yoshinori Yamashita, Osamu Arai, Takashi Maeda, Tatsuro Takahashi
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Patent number: 12160050Abstract: A phased-array antenna device with a long operating life without mechanical parts, has a high spatial resolution, and realizes microwave observation of broadband and high-frequency resolution. The phased-array antenna device performs direct A/D conversion through a BPF on an antenna analog signal amplified by an amplifier. Then, the device performs a second cross-spectrum calculation after conversion into complex frequency data through FFT. To detect a weak electromagnetic wave, the device repeatedly performs a second FFT over a long period and lastly performs integration.Type: GrantFiled: June 4, 2020Date of Patent: December 3, 2024Assignee: JAPAN AEROSPACE EXPLORATION AGENCYInventors: Takashi Maeda, Naoya Tomii, Akihisa Uematsu, Kazuya Inaoka, Noriyuki Kawaguchi
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Patent number: 12159040Abstract: A semiconductor memory device includes a semiconductor pillar including first and second memory cells electrically connected in series and formed on opposite sides of the semiconductor pillar, first word lines connected to the first memory cells, respectively, and second word lines connected to the second memory cells, respectively. A verify operation includes a channel clean operation for supplying a reference voltage to a semiconductor channel shared by the first and second memory cells followed by at least first and second sense operation for determining whether a threshold voltage of a target memory cell has reached first and second threshold voltage states, respectively, then a second channel clean operation for supplying the reference voltage to the semiconductor channel, and then at least a third sense operation for determining whether the threshold voltage of the target memory cell has reached a third threshold voltage state.Type: GrantFiled: August 31, 2022Date of Patent: December 3, 2024Assignee: Kioxia CorporationInventors: Rieko Funatsuki, Takashi Maeda, Sumiko Domae, Kazutaka Ikegami
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Patent number: 12139408Abstract: Provided is a synthetic graphite material, in which a size L (112) of a crystallite in a c-axis direction as calculated from a (112) diffraction line obtained by an X-ray wide angle diffraction method is in a range of 4 to 30 nm, a surface area based on a volume as calculated by a laser diffraction type particle size distribution measuring device is in a range of 0.22 to 1.70 m2/cm3, an oil absorption is in a range of 67 to 147 mL/100 g, and a half width ?vG of a peak present in a wavelength range of 1580 cm?1±100 cm?1 is in a range of 19 to 24 cm?1 in Raman spectrum analysis using argon ion laser light having a wavelength of 514.5 nm.Type: GrantFiled: January 14, 2020Date of Patent: November 12, 2024Assignee: ENEOS CORPORATIONInventors: Takashi Suzuki, Takashi Maeda, Mitsuo Karakane, Takahiro Shirai, Hiroshi Kawachi, Noriyuki Kiuchi
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Publication number: 20240354167Abstract: A management device is used in a grid computing system, wherein a computational job constitutes a part of a project to be implemented by a client. The management device is configured to: store the content of the project, and a compensation rate set for the computational job of the project; acquire a computational amount of computational processing executed for the computational job by a computing device; calculate a first compensation value of a first compensation to be given to the user, according to the computational amount by the computing device; and acquire the degree of progress of the project, and when it is determined, based on the acquired degree of progress, that the project has been completed, calculate a second compensation value of a second compensation to be given to the user, according to the compensation rate.Type: ApplicationFiled: August 23, 2022Publication date: October 24, 2024Applicant: MAZDA MOTOR CORPORATIONInventors: Seiichi ITO, Masashi OKAMURA, Takashi MAEDA
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Publication number: 20240354165Abstract: Grid computing processing is managed considering rate of amount of renewable energy-derived electric power in amount of electric power used for computation by computing device of vehicles, thereby contributing to utilization of renewable energy. Management server manages grid computing processing of causing computing devices mounted on a plurality of vehicles to process job data provided from client server. Controller of the management server acquires overall renewable energy rate information indicative of the rate of the amount of renewable energy-derived electric power in the amount of electric power consumption used for computation of the job data by all computing devices assigned to the job data, based on the amount of computations for a part of the job data to be processed by each of the computing devices and renewable energy rate information of each of the computing devices, and transmits the overall renewable energy rate information to the client server.Type: ApplicationFiled: August 2, 2022Publication date: October 24, 2024Applicant: MAZDA MOTOR CORPORATIONInventors: Seiichi ITO, Masashi OKAMURA, Takashi MAEDA, Yuji FURUKAWA
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Publication number: 20240352706Abstract: A work machine includes a vehicle body, a work implement movably connected to the vehicle body, a plurality of actuators that are connected to the work implement and change an orientation of the work implement with respect to the vehicle body, an operating device that is operable to change the orientation of the work implement, a sensor that detects the orientation of the work implement, and a controller. The controller acquires a current orientation of the work implement, determines a target orientation of the work implement corresponding to an operation of the operating device, determines respective target stroke lengths of the plurality of actuators so that the work implement assumes the target orientation from the current orientation with a combination of stroke motions of the plurality of actuators, and controls the plurality of actuators based on the target stroke lengths.Type: ApplicationFiled: May 10, 2022Publication date: October 24, 2024Inventors: Takuya SONODA, Yoshihide NAKAE, Takashi MAEDA
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Patent number: 12125545Abstract: A semiconductor memory device includes a driver that, in a write operation, applies a first voltage to a first select gate line, applies a second voltage lower than the first voltage to a second select gate line, applies a third voltage equal to or higher than the first voltage to a first dummy word line on an uppermost layer, applies a fourth voltage different from the third voltage and higher than the second voltage to a second dummy word line on an uppermost layer, applies a fifth voltage equal to or higher than the third voltage to a first dummy word line on a lowermost layer, and applies a sixth voltage different from the fifth voltage and equal to or higher than the fourth voltage to a second dummy word line on a lowermost layer.Type: GrantFiled: March 8, 2022Date of Patent: October 22, 2024Assignee: Kioxia CorporationInventors: Reiko Sumi, Takashi Maeda, Hidehiro Shiga
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Publication number: 20240345889Abstract: A management device used in a grid computing system is configured to execute compensation calculation processing of calculating a first compensation and a second compensation with respect to execution of a computational job by a computing device of a user, and stores evaluation values each set for a respective one of a plurality of computational jobs, wherein the compensation calculation processing includes: a first processing of calculating a first compensation value of the first compensation according to a computational amount of computational processing; and second processing of calculating and storing a second compensation value of the second compensation according to a relevant one of the evaluation values, wherein management device is configured to, in the first processing, calculate the first compensation value to have a larger value, as a cumulative value of the second compensation values which have been previously stored has a larger value.Type: ApplicationFiled: August 23, 2022Publication date: October 17, 2024Applicant: MAZDA MOTOR CORPORATIONInventors: Seiichi ITO, Masashi OKAMURA, Takashi MAEDA, Yuji FURUKAWA
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Publication number: 20240337089Abstract: A controller acquires vehicle body posture data. The controller acquires work implement posture data. The controller calculates a height of a work implement in a gravity direction from a reference point of a vehicle body based on the vehicle body posture data and the work implement posture data. The controller controls an actuator so that the height of the work implement in the gravity direction is maintained even when a posture of the vehicle body changes.Type: ApplicationFiled: August 29, 2022Publication date: October 10, 2024Inventors: Takuya SONODA, Yoshihide NAKAE, Takashi MAEDA
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Patent number: 12097982Abstract: The present disclosure relates to a landing device capable of allowing an unmanned aerial vehicle to be accommodated in a compact manner. A landing device includes a first leg portion that is swingable with a first end portion on a main body side of an unmanned aerial vehicle as an axis; and a second leg portion that is detachably attached to a second end portion of the first leg portion such that the second leg portion extends in an axial direction of the first leg portion. The present disclosure can be applied to, for example, a drone including a camera at a bottom of a main body.Type: GrantFiled: May 27, 2021Date of Patent: September 24, 2024Assignee: SONY GROUP CORPORATIONInventors: Takashi Maeda, Hiroki Sato, Tatsuo Makii
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Publication number: 20240311286Abstract: An information processing apparatus that detects whether the corresponding first element and second element among the multiple first elements and the plurality of second elements are matched or are similar, has one or multiple strings connected to a first wiring and connected to multiple second wirings, wherein the string includes multiple transistor pairs connected in series along a current path having one end connected to the first wiring, each of the multiple transistor pairs includes a first transistor and a second transistor connected in series along the current path, the second wirings are connected to gates of the first transistor and the second transistor in each of the multiple transistor pairs, the first transistor is set to a first threshold depending on first data, the second transistor is set to a second threshold depending on second data that is complement data of the first data.Type: ApplicationFiled: March 11, 2024Publication date: September 19, 2024Applicant: Kioxia CorporationInventors: Atsushi KAWASUMI, Takashi MAEDA, Hidehiro SHIGA
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Patent number: 12092669Abstract: Provided is an AD converter that is capable of converting a wideband noise signal of several GHz or more into a digital signal and that can be used even when an installation space and power supply are severely limited. The AD converter includes: a comparator (10) configured to compare an input voltage of an analog signal to a determination voltage; an adjustment unit (12) configured to shift at least one of the input voltage of the analog signal or the determination voltage; an encoder (11) configured to output time-series data of one bit based on a result of the comparison obtained by the comparator; a processing unit (13) configured to calculate a frequency of appearance of an output code included in the time-series data; and a control unit (14) configured to cause the adjustment unit to operate so that a result of the calculation obtained by the processing unit becomes a predetermined value.Type: GrantFiled: March 29, 2022Date of Patent: September 17, 2024Assignee: ELECS INDUSTRY CO., LTD.Inventors: Noriyuki Kawaguchi, Takashi Maeda, Kenichi Harada, Kenji Ema, Kensuke Ozeki
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Publication number: 20240301657Abstract: A travel system for a work machine is provided that can facilitate recording of courses actually traveled by the work machine. A travel system for a motor grader includes a traveling apparatus and a controller. The traveling apparatus prompts the motor grader to travel. The controller prompts automatic recording of an actually traveled course which is a course actually traveled by the motor grader.Type: ApplicationFiled: January 19, 2022Publication date: September 12, 2024Applicant: KOMATSU LTD.Inventors: Takuya SONODA, Takeshi KAMIMAE, Yoshihide NAKAE, Youichirou KIMURA, Takashi MAEDA
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Publication number: 20240291928Abstract: An image processing apparatus includes an operation receiver configured to receive a predetermined operation, a first communication interface connectable with an external device, and a controller. The controller is configured to, in response to the operation receiver receiving the predetermined operation when the first communication interface is not connected with the external device, perform a first imaging process, and in response to the operation receiver receiving the predetermined operation when the first communication interface is connected with the external device, perform a second imaging process using the external device. The second imaging process is different from the first imaging process.Type: ApplicationFiled: January 18, 2024Publication date: August 29, 2024Inventor: Takashi MAEDA
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Publication number: 20240282384Abstract: When selectively erasing one sub-block, a control circuit applies, in a first sub-block, a first voltage to bit lines and a source line, and applies a second voltage smaller than the first voltage to the word lines. Then, the control circuit applies a third voltage lower than the first voltage by a certain value to a drain-side select gate line and a source-side select gate line, thereby performing the erase operation in the first sub-block. The control circuit applies, in a second sub-block existing in an identical memory block to the 10 selected sub-block, a fourth voltage substantially identical to the first voltage to the drain side select gate line and the source side select gate line, thereby not performing the erase operation in the second sub-block.Type: ApplicationFiled: March 21, 2024Publication date: August 22, 2024Applicant: Kioxia CorporationInventor: Takashi MAEDA