Patents by Inventor Takashi Morie

Takashi Morie has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6882207
    Abstract: In an offset control circuit, a voltage/current converting portion generates differential current (I+ and I?) that are proportional to a potential difference between differential input voltage signals (VIN+ and VIN?), and an offset adjusting current-generating portion generates offset adjusting currents (Iofs+ and Iofs?). In a current/voltage converting portion, a current (Ir) that is proportional to a potential difference between differential terminals flows through. Differential current output terminals, offset adjusting current-output terminals and the differential terminals are connected. The offset components contained in the differential input voltage signals (VIN+ and VIN?) are adjusted with the offset adjusting currents (Iofs+ and Iofs?), and differential output voltage signals (VO+ and VO?) in which the offset components are added to the differential input voltage signals (VIN+ and VIN?) are generated.
    Type: Grant
    Filed: June 25, 2003
    Date of Patent: April 19, 2005
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Hirokuni Fujiyama, Takashi Morie
  • Publication number: 20040263261
    Abstract: In a low-pass filter, the filter characteristics equivalent to those of a conventional low-pass filter are maintained, the size of a capacitive element is decreased, and the low-pass filter operates stably. Further, a MOS capacitor is used as a capacitive element. For such purposes, in a low-pass filter including a first capacitive element, and a resistive element and a second capacitive element which are connected in series to the first capacitive element, a first electric current is supplied to the first input terminal connected to one end of the first capacitive element, and a second electric current is supplied to the second input terminal connected to the other end of the first capacitive element. Herein, the capacitance value of the first capacitive element is set according to the magnitude of the first electric current.
    Type: Application
    Filed: March 15, 2004
    Publication date: December 30, 2004
    Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
    Inventors: Shiro Dosho, Takashi Morie, Kazuaki Sogawa
  • Patent number: 6825712
    Abstract: In a front end that has a filter circuit and is used for a communication system having an asymmetric communication channel in which upstream and downstream data rates are different, a filter circuit for received signals, which is for filtering received signals, and a filter circuit for transmitted signals, which is for filtering transmitted signals, are provided. The filter circuit for received signals has an amplifier block including a plurality of amplifiers, a capacitor block including a plurality of capacitors and being connected to the plurality of amplifiers included in the amplifier block, and a first and a second resistor blocks each including a plurality of resistors. Either one of the first or the second resistor block is selectively switched so as to be connected to the amplifier block by a resistor block-switching circuit. The circuit scale is reduced since only one amplifier block and one capacitor block are commonly used for two kinds of filter circuits.
    Type: Grant
    Filed: March 12, 2003
    Date of Patent: November 30, 2004
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Shiro Dosho, Takashi Morie, Hitoshi Kobayashi, Norihide Kinugasa, Masaomi Toyama
  • Patent number: 6784654
    Abstract: In a signal reproduction block of a DVD reproduction apparatus, an output signal line for outputting a characteristic information signal representing a characteristic of a filter incorporated in the signal reproduction block to the outside is additionally provided on the output side of an A/D converter. In this way, it is possible to prevent an analog data signal from deteriorating during a data signal reproduction process due to a parasitic effect of the output signal line. Moreover, the filter characteristic information signal is output through the output signal line after it is convened to a digital signal by the A/D convener, thereby avoiding the deterioration the characteristic information signal and thus improving the measurement precision.
    Type: Grant
    Filed: September 16, 2002
    Date of Patent: August 31, 2004
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Hirokuni Fujiyama, Takashi Morie
  • Publication number: 20040165510
    Abstract: An analog filter is placed at a stage previous to an analog-digital converter (ADC), and a waveform equalizer is placed at a stage subsequent to the ADC. The sampling frequency of the ADC is determined by a clock generation section according to the relationship between the bit rate of an input reproduction signal and the characteristic of the analog filter. The number of taps is changed according to the relationship between the bit rate of the input reproduction signal and the characteristic of the analog filter. Further, the tap coefficients of a waveform equalizer are changed according to the height of the frequency band of the input reproduction signal. A waveform evaluation section generates a signal that evaluates a waveform equalization signal transmitted from the waveform equalizer to a Viterbi decoder, whereby adaptive waveform equalization is realized.
    Type: Application
    Filed: November 12, 2003
    Publication date: August 26, 2004
    Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
    Inventors: Hiroyuki Nakahira, Takashi Morie
  • Publication number: 20040070443
    Abstract: A ladder filter includes multiple inductor sections, each including voltage-controlled current sources and capacitors. A second signal input terminal is provided for the filter separately from an ordinary signal input terminal and a signal, which has been input through the second terminal, is supplied to one of the voltage-controlled current sources by way of a gain calculator. By adjusting the gain obtained by the gain calculator to an appropriate value, the ladder filter can make the numerator of its transfer function freely definable.
    Type: Application
    Filed: October 8, 2003
    Publication date: April 15, 2004
    Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
    Inventors: Shiro Dosho, Takashi Morie
  • Patent number: 6714075
    Abstract: The variable gain amplifier of the invention includes an input node pair, a first output node pair, a voltage-current converter, a plurality of first resistances, a first current source, a second current source, a second output node pair, a third output node pair and a switch circuit. A differential signal supplied to the input node pair is amplified with a predetermined gain (first gain) and output from the second output node pair. The differential signal is also amplified with a gain (second gain) corresponding to the resistance value between one interconnection node and another interconnection node, among the interconnection nodes connecting the plurality of first resistances, connected to the third output node pair via the switch circuit, and output from the third output node pair. The second gain can be changed by changing the two interconnection nodes connected to the third output node pair via the switch circuit.
    Type: Grant
    Filed: November 4, 2002
    Date of Patent: March 30, 2004
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Takashi Morie, Hirokuni Fujiyama
  • Publication number: 20040004507
    Abstract: In an offset control circuit, a voltage/current converting portion generates differential current (I+ and I−) that are proportional to a potential difference between differential input voltage signals (VIN+ and VIN−), and an offset adjusting current-generating portion generates offset adjusting currents (Iofs+ and Iofs−). In a current/voltage converting portion, a current (Ir) that is proportional to a potential difference between differential terminals flows through. Differential current output terminals, offset adjusting current-output terminals and the differential terminals are connected. The offset components contained in the differential input voltage signals (VIN+ and VIN−) are adjusted with the offset adjusting currents (Iofs+ and Iofs−), and differential output voltage signals (VO+ and VO−) in which the offset components are added to the differential input voltage signals (VIN+ and VIN−) are generated.
    Type: Application
    Filed: June 25, 2003
    Publication date: January 8, 2004
    Applicant: Matsushita Electric Industrial Co., Ltd.
    Inventors: Hirokuni Fujiyama, Takashi Morie
  • Patent number: 6661022
    Abstract: An information processing structure is disclosed that is formed of single electron circuits each operating rapidly and stably by way of a single electron operation. The information processing structure includes a MOSFET (11), and a plurality of quantum dots (13) disposed immediately above a gate electrode (12) of the MOSFET and each of which is made of a microconductor or microsemiconductor of a nanometer scale in size. Between each of the quantum dots and the gate electrode is there formed an energy barrier that an electron is capable of directly tunneling. The total number of such electrons moved between the quantum dots and the gate electrode is used to represent information. In the structure, a power source electrode (14) is disposed in contact with the quantum dots and a pair of information electrodes (15) is disposed across a quantum dot in contact therewith for having electric potentials applied thereto, representing data of information.
    Type: Grant
    Filed: December 4, 2001
    Date of Patent: December 9, 2003
    Assignee: Japan Science and Technology Corporation
    Inventors: Takashi Morie, Atsushi Iwata, Makoto Nagata, Toshio Yamanaka, Tomohiro Matsuura
  • Publication number: 20030184367
    Abstract: In a front end that has a filter circuit and is used for a communication system having an asymmetric communication channel in which upstream and downstream data rates are different, a filter circuit for received signals, which is for filtering received signals, and a filter circuit for transmitted signals, which is for filtering transmitted signals, are provided. The filter circuit for received signals has an amplifier block including a plurality of amplifiers, a capacitor block including a plurality of capacitors and being connected to the plurality of amplifiers included in the amplifier block, and a first and a second resistor blocks each including a plurality of resistors. Either one of the first or the second resistor block is selectively switched so as to be connected to the amplifier block by a resistor block-switching circuit. The circuit scale is reduced since only one amplifier block and one capacitor block are commonly used for two kinds of filter circuits.
    Type: Application
    Filed: March 12, 2003
    Publication date: October 2, 2003
    Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
    Inventors: Shiro Dosho, Takashi Morie, Hitoshi Kobayashi, Norihide Kinugasa, Masaomi Toyama
  • Publication number: 20030095005
    Abstract: The variable gain amplifier of the invention includes an input node pair, a first output node pair, a voltage-current converter, a plurality of first resistances, a first current source, a second current source, a second output node pair, a third output node pair and a switch circuit. A differential signal supplied to the input node pair is amplified with a predetermined gain (first gain) and output from the second output node pair. The differential signal is also amplified with a gain (second gain) corresponding to the resistance value between one interconnection node and another interconnection node, among the interconnection nodes connecting the plurality of first resistances, connected to the third output node pair via the switch circuit, and output from the third output node pair. The second gain can be changed by changing the two interconnection nodes connected to the third output node pair via the switch circuit.
    Type: Application
    Filed: November 4, 2002
    Publication date: May 22, 2003
    Applicant: Matsushita Electric Industrial Co., Ltd.
    Inventors: Takashi Morie, Hirokuni Fujiyama
  • Patent number: 6556073
    Abstract: A transconductor which has a transconductance gm and which receives an input voltage Vin and outputs in response to the input voltage Vin an output current Iout of gm×Vin, wherein: the transconductor includes a plurality of sub-transconductors which are connected in parallel to one another; and at least one control signal is input to the plurality of sub-transconductors, and the plurality of sub-transconductors are controlled by the at least one control signal such that at least one of the plurality of sub-transconductors has a negative transconductance, whereby the transconductance gm of the transconductor can be varied.
    Type: Grant
    Filed: September 9, 2002
    Date of Patent: April 29, 2003
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Takashi Morie, Shiro Dosho
  • Publication number: 20030052698
    Abstract: In a signal reproduction block of a DVD reproduction apparatus, an output signal line for outputting a characteristic information signal representing a characteristic of a filter incorporated in the signal reproduction block to the outside is additionally provided on the output side of an A/D converter. In this way, it is possible to prevent an analog data signal from deteriorating during a data signal reproduction process due to a parasitic effect of the output signal line. Moreover, the filter characteristic information signal is output through the output signal line after it is converted to a digital signal by the A/D converter, thereby avoiding the deterioration the characteristic information signal and thus improving the measurement precision.
    Type: Application
    Filed: September 16, 2002
    Publication date: March 20, 2003
    Applicant: Matsushita Electric Industrial Co., Ltd.
    Inventors: Hirokuni Fujiyama, Takashi Morie
  • Publication number: 20030006834
    Abstract: A transconductor which has a transconductance gm and which receives an input voltage Vin and outputs in response to the input voltage Vin an output current Iout of gm×Vin, wherein: the transconductor includes a plurality of sub-transconductors which are connected in parallel to one another; and at least one control signal is input to the plurality of sub-transconductors, and the plurality of sub-transconductors are controlled by the at least one control signal such that at least one of the plurality of sub-transconductors has a negative transconductance, whereby the transconductance gm of the transconductor can be varied.
    Type: Application
    Filed: September 9, 2002
    Publication date: January 9, 2003
    Inventors: Takashi Morie, Shiro Dosho
  • Patent number: 6472932
    Abstract: A transconductor which has a transconductance gm and which receives an input voltage VIn and outputs in response to the input voltage Vin an output current Iout of gm×Vin, wherein: the transconductor includes a plurality of sub-transconductors which are connected in parallel to one another; and at least one control signal is input to the plurality of sub-transconductors, and the plurality of sub-transconductors are controlled by the at least one control signal such that at least one of the plurality of sub-transconductors has a negative transconductance, whereby the transconductance gm of the transconductor can be varied.
    Type: Grant
    Filed: January 31, 2001
    Date of Patent: October 29, 2002
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Takashi Morie, Shiro Dosho
  • Publication number: 20020134996
    Abstract: An information processing structure is disclosed that is formed of single electron circuits each operating rapidly and stably by way of a single electron operation. The information processing structure includes a MOSFET (11), and a plurality of quantum dots (13) disposed immediately above a gate electrode (12) of the MOSFET and each of which is made of a microconductor or microsemiconductor of a nanometer scale in size. Between each of the quantum dots and the gate electrode is there formed an energy barrier that an electron is capable of directly tunneling. The total number of such electrons moved between the quantum dots and the gate electrode is used to represent information. In the structure, a power source electrode (14) is disposed in contact with the quantum dots and a pair of information electrodes (15) is disposed across a quantum dot in contact therewith for having electric potentials applied thereto, representing data of information.
    Type: Application
    Filed: December 4, 2001
    Publication date: September 26, 2002
    Inventors: Takashi Morie, Atsushi Iwata, Makoto Nagata, Toshio Yamanaka, Tomohiro Matsuura
  • Patent number: 6388510
    Abstract: A gm-C filter system having low power consumption is provided. An adjusting circuit 2 is equipped with an oscillator 3 constructed of a gm amplifier 3a having the same arrangement as that of a gm amplifier 1a of a gm-C filter circuit 1. The adjusting circuit 2 generates a digital adjusting value “Dgm” based upon an oscillation signal OSC outputted from this oscillation 3, and this digital adjusting value “Dgm” is used to adjust a gm value of the gm amplifier 3a of the oscillator 3. This digital adjusting value “Dgm” is held in a register 10. The digital adjusting value “Dgm” held in this register 10 is converted into an analog adjusting value (bias current) by a D/A converter 8, and then, this analog adjusting value is supplied to the gm amplifier 1a of the gm-C filter circuit 1 so as to adjust the gm value. The adjusting circuit 2 is operated in an intermittent manner based upon, for example, a change contained in ambient temperatures of the gm-C filter system.
    Type: Grant
    Filed: July 12, 2001
    Date of Patent: May 14, 2002
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Hiroki Hayashi, Shiro Doushoh, Takashi Morie, Kunihiro Fujiyama, Tomoyuki Katada
  • Publication number: 20020008572
    Abstract: A gm-C filter system having low power consumption is provided. An adjusting circuit 2 is equipped with an oscillator 3 constructed of a gm amplifier 3a having the same arrangement as that of a gm amplifier 1a of a gm-C filter circuit 1. The adjusting circuit 2 generates a digital adjusting value “Dgm” based upon an oscillation signal OSC outputted from this oscillation 3, and this digital adjusting value “Dgm” is used to adjust a gm value of the gm amplifier 3a of the oscillator 3. This digital adjusting value “Dgm” is held in a register 10. The digital adjusting value “Dgm” held in this register 10 is converted into an analog adjusting value (bias current) by a D/A converter 8, and then, this analog adjusting value is supplied to the gm amplifier 1a of the gm-C filter circuit 1 so as to adjust the gm value. The adjusting circuit 2 is operated in an intermittent manner based upon, for example, a change contained in ambient temperatures of the gm-C filter system.
    Type: Application
    Filed: July 12, 2001
    Publication date: January 24, 2002
    Applicant: Matsushita Electric Industrial Co., Ltd.
    Inventors: Hiroki Hayashi, Shiro Dosho, Takashi Morie, Hirokuni Fujiyama, Tomoyuki Katada
  • Publication number: 20010020865
    Abstract: A transductor which has a transductance gm and which receives an input voltage Vin and outputs in response to the input voltage Vin an output current Iout of gm×Vin, wherein: the transductor includes a plurality of sub-transconductors which are connected in parallel to one another; and at least one control signal is input to the plurality of sub-transconductors, and the plurality of sub-transconductors are controlled by the at least one control signal such that at least one of the plurality of sub-transconductors has a negative transconductance, whereby the transconductance gm of the transconductor can be varied.
    Type: Application
    Filed: January 31, 2001
    Publication date: September 13, 2001
    Inventors: Takashi Morie, Shiro Dosho
  • Patent number: 5111430
    Abstract: A non-volatile memory includes a charge injecting electrode, a control electrode, and a floating electrode. The charge injecting electrode generates hot carriers by a tunnel effect. The control electrode is formed on the charge injecting electrode to set a tunnel voltage. The floating electrode is formed on the control electrode via an insulating film. The hot carriers generated by the charge injecting electrode are injected over an energy barrier of the insulating film into the floating electrode.
    Type: Grant
    Filed: June 21, 1990
    Date of Patent: May 5, 1992
    Assignee: Nippon Telegraph and Telephone Corporation
    Inventor: Takashi Morie