Patents by Inventor Takashi Morimoto

Takashi Morimoto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8786542
    Abstract: A display device is disclosed which is capable of suppressing characteristic changes due to a long period of conduction, thereby achieving high-quality video display, and also to provide a drive method therefor. In at least one embodiment, while sequentially activating n first scanning signal line groups G1(1) to G1(n), a predetermined voltage, which is the same as a voltage for turning off a thin-film transistor included in each pixel formation portion in that the polarity thereof is negative and is at a higher level than that voltage, is applied simultaneously to n second scanning signal line groups G2(1) to G2(n). Thereafter, while sequentially activating the n second scanning signal line groups G2(1) to G2(n), the predetermined voltage is applied simultaneously to the n first scanning signal line groups G1(1) to G1(n). By repeating this, charges accumulated in the vicinity of the thin-film transistors are eliminated, thereby suppressing changes in off characteristics thereof.
    Type: Grant
    Filed: January 3, 2009
    Date of Patent: July 22, 2014
    Assignee: Sharp Kabushiki Kaisha
    Inventor: Takashi Morimoto
  • Patent number: 8777317
    Abstract: An armrest device including a stationary shaft 2, fixed to a seat frame, an armrest body 7 in which the stationary shaft 2 is inserted and which is rotatable, a lock spring 3 made of a coil spring tightly wound around the stationary shaft 2, with one end of the coil spring serving as a stationary-side hook 3a locked to the armrest body 7, and the other end of the coil spring serving as a free-side hook 3b A hook-supporting part 12 that supports the free-side hook 3b such that the free-side hook 3b is raised in the axial direction of the stationary shaft 2, a hook-fitting part 13 that enlarges the diameter of the lock spring 3 by dropping the free-side hook 3b on the hook-supporting part 12 downward in the axial direction of the stationary shaft 2, a plate 11 for a hook, where the plate 11 projects from the armrest body 7, and a cam member 5 on the stationary shaft 2.
    Type: Grant
    Filed: December 4, 2007
    Date of Patent: July 15, 2014
    Assignee: NHK Spring Co., Ltd.
    Inventors: Makoto Saito, Takashi Morimoto, Ken Suzuki, Toshikazu Numazawa, Hideko Kitamura
  • Patent number: 8775998
    Abstract: To provide a design support device of a three-dimensional integrated circuit capable of, in the case where a placement position of a through-via changes in the design phase of a three-dimensional integrated circuit composed of a plurality of semiconductor chips in layers, avoiding change of respective placement positions of other parts as much as possible. A design support device includes a TSV placement unit that determines respective placement positions of through-vias on one semiconductor chip, the through-bias each penetrating to connect to another semiconductor chip, a TSV reserved cell placement unit that determines, based on the respective placement positions of the through-vias, respective placement positions of reserved cells as respective spare placement positions of the through-vias, and a mask data generation unit that generates layout data that includes the respective placement positions of the through-vias and the respective placement positions of the reserved cells.
    Type: Grant
    Filed: November 10, 2011
    Date of Patent: July 8, 2014
    Assignee: Panasonic Corporation
    Inventors: Takashi Morimoto, Takashi Hashimoto
  • Publication number: 20140151882
    Abstract: The three-dimensional integrated circuit has a first semiconductor chip and a second semiconductor chip stacked on the first semiconductor chip, wherein each of the first semiconductor chip and the second semiconductor chip is provided with a power supply wiring layer which has a wiring pattern structure for stably supplying a power supply voltage to an internal circuit of the semiconductor chip, and a ground wiring layer in succession, and one of the first semiconductor chip and the second semiconductor chip further includes a second ground wiring layer or a second power supply wiring layer on a surface facing to the other semiconductor chip.
    Type: Application
    Filed: April 10, 2013
    Publication date: June 5, 2014
    Inventor: Takashi Morimoto
  • Publication number: 20140134510
    Abstract: In a solid polymer fuel cell, destabilization of a voltage when an output state is changed is suppressed, and flow of a corrosion current through a cooling liquid in a cooling liquid manifold is reduced. The fuel cell is constructed by laminating a plurality of fuel battery cells, each including an MEA, a pair of separators, a frame that surrounds the periphery of the MEA, an anode, and a cathode, and a cooling liquid manifold that is formed by the frame. A flow channel of the cooling liquid manifold has a constant flow channel cross-sectional area, and a flow channel length of the cooling liquid manifold, which is included in one of the fuel battery cells, along a flow channel direction is longer than the thickness of the one fuel battery cell in a stacked direction.
    Type: Application
    Filed: May 16, 2012
    Publication date: May 15, 2014
    Applicant: Panasonic Corporation
    Inventors: Norihiko Kawabata, Takashi Morimoto, Soichi Shibata
  • Patent number: 8704226
    Abstract: A chip is layered on a rewiring member. A plurality of connecting members and a plurality of redundant connecting members are arranged in the chip, and electrically connect the chip to the rewiring member. Redundant circuits are embedded in each of the rewiring member and the chip. When one of the connecting members is faulty, the redundant circuits cause one of the redundant connecting members to transmit a signal between the rewiring member and the chip, instead of the faulty connecting member. The connecting members have first and second subsets arranged in first and second regions, respectively. A distance between the rewiring member and the chip exceeds a predetermined threshold value in the first region in contrast to the second region. The first subset has a higher proportion of connecting members that the redundant circuits can replace with a subset of the redundant connecting members than the second subset.
    Type: Grant
    Filed: January 11, 2012
    Date of Patent: April 22, 2014
    Assignee: Panasonic Corporation
    Inventors: Takashi Morimoto, Takashi Hashimoto
  • Patent number: 8703360
    Abstract: In an electrode-membrane-frame assembly production method, a principal part is formed by an electrolyte membrane, first and second catalyst layers and first and second gas diffusion layers, with the first and second gas diffusion layers arranged with their outer circumferences at different positions. The principal part is arranged in a molding die with a circumferential region of the principal part disposed on a flat region of a primary molded body. A circumferential portion of one of the gas diffusion layers is arranged to oppose a flat region of the primary molded body so that the membrane is interposed between the circumferential portion and the flat region. Subsequently, a secondary molded body is formed to integrate with the primary molded body and the principal part.
    Type: Grant
    Filed: December 4, 2008
    Date of Patent: April 22, 2014
    Assignee: Panasonic Corporation
    Inventors: Yoichiro Tsuji, Toshihiro Matsumoto, Hiroki Kusakabe, Takashi Morimoto
  • Publication number: 20140103934
    Abstract: An apparatus is disclosed that includes a resistance measuring unit operable to determine a solution resistance Rsol and a charge transfer resistance Rct of a battery; and at least one computer-readable non-transitory storage medium comprising code, that, when executed by at least one processor, is operable to provide an estimate of the present value of the battery by: comparing Rsol and Rct to historical deterioration transition information; estimating the number of remaining charge cycles before a discharge capacity lower limit is reached by the battery using the comparison; and estimating the number of remaining charge cycles before a discharge time lower limit is reached by the battery using the comparison. The estimate of the present value of the battery includes the smaller of the number of remaining charge cycles before a discharge capacity lower limit is reached or the number of remaining charge cycles before a discharge time lower limit is reached.
    Type: Application
    Filed: November 20, 2013
    Publication date: April 17, 2014
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Akihiro Matsui, Kazuto Kuroda, Yasuhiro Harada, Shinichiro Kosugi, Hisashi Oya, Mami Mizutani, Takashi Morimoto, Takeo Hayase, Yukitaka Monden, Norio Takami
  • Patent number: 8677567
    Abstract: Provided is a hinge that can be manufactured easily in a short time. The hinge rotatably connects a first member and a second member, and is provided with two brackets that are rotatable against each other and mounted to the first member and the second member, respectively, and a friction-torque-generating member that generates friction torque by directly or indirectly pressing the two brackets against each other. A first of the two brackets is configured from an integral structure that includes a shaft part that passes through the second bracket and supports the rotation, and a mounting part that is mounted to the first member or the second member, with the shaft part and the mounting part being produced from a plate material.
    Type: Grant
    Filed: May 24, 2010
    Date of Patent: March 25, 2014
    Assignee: NHK Spring Co., Ltd.
    Inventors: Takao Kobayashi, Ikuomi Takahashi, Makoto Saito, Takashi Morimoto, Toshihiro Tamura
  • Publication number: 20140059325
    Abstract: The present invention provides a three-dimensional integrated circuit wherein generation of hot spot which makes a high temperature part as a result of intensively generated heat can be suppressed in. The integrated circuit apparatus comprises: a first circuit made of a memory circuit, a second circuit made of an arithmetic circuit, and a control circuit. The first circuit is partitioned into a plurality of circuit blocks according to the distance from the arranged position of the second circuit, and the control circuit controls the partitioned respective circuit blocks separately.
    Type: Application
    Filed: October 22, 2012
    Publication date: February 27, 2014
    Applicant: PANASONIC CORPORATION
    Inventors: Takashi Morimoto, Kouji Kai
  • Patent number: 8642230
    Abstract: An electrode-membrane-frame assembly for a polyelectrolyte fuel cell including of a membrane electrode assembly, a first frame body which has a separator-side surface on which a sealing member for sealing between the member and one separator and a membrane-side surface located on one surface of the peripheral edge portion of the membrane electrode assembly and is formed of a thermoplastic resin material, and a second frame body that has a separator-side surface on which a sealing member for sealing between the member and the other separator and a membrane-side surface located on the other surface of the peripheral edge portion of the membrane electrode assembly and is formed of a thermoplastic resin material and fitted to the first frame body holding the peripheral edge portion of the membrane electrode assembly between the second frame body and the first frame body.
    Type: Grant
    Filed: June 10, 2008
    Date of Patent: February 4, 2014
    Assignee: Panasonic Corporation
    Inventors: Tsutomu Kawashima, Norihiko Kawabata, Toshihiro Matsumoto, Atsushi Murata, Takashi Morimoto
  • Publication number: 20130345426
    Abstract: An object of the present invention is to provide a drug having the inhibitory activity on ENPP2 which is a different target from that of the existing drug, as a medicament useful in a urinary excretion disorder patient for whom the existing drug has the insufficient effect. The present invention provides a compound represented by the general formula (I): (wherein definition of each group is as defined in the description) having the ENPP2 inhibitory activity, a salt thereof or a solvate thereof or a prodrug thereof, and an agent for preventing or treating urinary excretion disorder and/or improving symptoms thereof, containing them as an active ingredient.
    Type: Application
    Filed: January 5, 2012
    Publication date: December 26, 2013
    Applicant: ONO PHARMACEUTICAL CO., LTD.
    Inventors: Akira Ohata, Shingo Nakatani, Tetsuya Sugiyama, Takashi Morimoto
  • Patent number: 8601192
    Abstract: Provided is a hierarchical arbitration device wherein an arbitration device at each level of the hierarchy selects a resource use request having the highest priority and a resource use request having the second highest priority, outputting these two resource use requests to the arbitration device that is one level higher. After outputting the memory use request having the highest priority to a resource control unit as the top priority resource use request, when the arbitration device at the highest level of the hierarchy receives a signal from the memory control unit indicating receipt of the resource use request, the arbitration device then selects the resource use request having the second highest priority and outputs this resource request as the next top priority resource use request.
    Type: Grant
    Filed: June 4, 2010
    Date of Patent: December 3, 2013
    Assignee: Panasonic Corporation
    Inventors: Takashi Morimoto, Yoshiharu Watanabe, Takashi Yamada, Takashi Hashimoto, Koji Asai
  • Patent number: 8587717
    Abstract: An imaging unit includes a mount unit, an imaging element unit, a plurality of elastic members, a plurality of adjusting screws, and at least one restricting member. The mount unit is configured to support the interchangeable lens unit. The imaging element unit is disposed apart from the mount unit and is configured to produce image data for the subject by opto-electrical conversion. The plurality of elastic members is disposed in a compressed state between the mount unit and the imaging element unit. The plurality of adjusting screws is mounted to the mount unit and/or the imaging element unit to adjust the distance between the mount unit and the imaging element unit. The restricting member is mounted to the mount unit and/or the imaging element unit and configured to restrict the imaging element unit from moving close to the mount unit against the elastic force of the elastic members.
    Type: Grant
    Filed: January 31, 2012
    Date of Patent: November 19, 2013
    Assignee: Panasonic Corporation
    Inventors: Eisaku Sakoda, Takashi Morimoto, Kunihiko Hara, Tetsuro Tanaka
  • Patent number: 8571284
    Abstract: A surface analyzer with which users only need to perform simple operations to quantitatively compare different physical quantities, such as the altitude and phase, in a region of interest on a sample is provided. A three-dimensional color image created by mapping color information corresponding to the phase onto a three-dimensional image created from two-dimensional distribution data of a sample's altitude is displayed in an analysis result display screen. A section image is superposed on the three-dimensional color image. The one-dimensional area at which the section image intersects the sample is defined as the region of interest. The altitude and phase along this region of interest are graphically shown on the graph display area. Various characteristic values at the position of these cursors, such as the altitude and phase values or the difference in these values between two cursors, are displayed in a characteristic value table.
    Type: Grant
    Filed: September 14, 2011
    Date of Patent: October 29, 2013
    Assignee: Shimadzu Corporation
    Inventors: Takashi Morimoto, Akinori Kogure
  • Patent number: 8566762
    Abstract: A worst-case temperature calculation unit calculates, based on heat value information of each layer of a three-dimensional integrated circuit to be designed and stack structure information of the three-dimensional integrated circuit, a worst-case temperature of a layer during operation that is targeted for logic synthesis. A logic synthesis library selection unit selects a library appropriate for the calculated worst-case temperature. A logic synthesis unit performs logic synthesis on the targeted layer with use of the selected library.
    Type: Grant
    Filed: February 17, 2012
    Date of Patent: October 22, 2013
    Assignee: Panasonic Corportion
    Inventors: Takashi Morimoto, Takashi Hashimoto
  • Patent number: 8475062
    Abstract: A shutter drive device includes a base member, an actuator, a first drive member, and a second drive member. The actuator is fixed to the base member and produces a driving force to drive the shutter mechanism. The first drive member is rotatably supported by the base member and configured to be rotated by the driving force. The second drive member is supported by the base member so as to be linearly movable in a first direction and configured to transmit the driving force of the actuator to the shutter mechanism. The first drive member has a gear component to drive the second drive member in the first direction, and a cam component configured to hold the second drive member in a specific position. The second drive member has a rack gear configured to mesh with the gear component, and a cam follower configured to contact the cam component.
    Type: Grant
    Filed: January 31, 2012
    Date of Patent: July 2, 2013
    Assignee: Panasonic Corporation
    Inventors: Masanao Wakikawa, Takashi Morimoto, Kunihiko Hara, Yasuhiro Nakagai, Tetsuro Tanaka
  • Publication number: 20130157164
    Abstract: A close attachment region is provided on the outer side relative to an outer edge portion of a gas diffusion layer and on the inner side relative to the inner edge portion of a gasket as seen from the thickness direction of a polymer electrolyte membrane, such that separators and a frame member are closely attached to each other. Thus, it becomes possible to suppress an increase in the manufacturing cost and a reduction in the power generation performance, which is attributed to the impurity eluted from the gasket and flowing toward the gas diffusion layer.
    Type: Application
    Filed: April 16, 2012
    Publication date: June 20, 2013
    Inventors: Masaki Yamauchi, Yasushi Sugawara, Shinsuke Takeguchi, Yoichiro Tsuji, Hiroki Kusakabe, Takashi Morimoto
  • Patent number: 8462287
    Abstract: An active matrix substrate capable of suppressing a change in an off characteristic of the TFT even when current passage time becomes longer is provided. A diode is connected between a video signal line and a conductive plate formed so as to cover a TFT of a pixel formation portion. Current is passed to the diode when a potential of a video signal applied to the video signal line is lower than that of the conductive plate, and the potential of the conductive plate becomes equal to that of the video signal line. No current flows when the potential of the video signal is higher than that of the conductive plate and the potential of the diode remains the same. Consequently, a leak current which flows from the pixel electrode of the pixel formation portion to the video signal line when the TFT is in the off state is suppressed.
    Type: Grant
    Filed: August 19, 2009
    Date of Patent: June 11, 2013
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Takashi Morimoto, Mitsuaki Hirata
  • Patent number: 8458409
    Abstract: An access control apparatus receives access requests from one or more regular masters and an irregular master and sequentially selects an access allowable target. Additionally, the access control apparatus calculates an amount of unused resources based on an amount of resources used by a regular master and a maximum amount of resources to be used by the regular master, and manages the unused resources. The access control apparatus selects an access request of an irregular master as an access allowable target when the irregular master makes the access request during a unit period and access based on an access request of at least one of the regular masters that has not been executed. The managed amount of unused resources is equal to or larger than an amount of resources which is to be used based on the access request of the irregular master.
    Type: Grant
    Filed: March 2, 2009
    Date of Patent: June 4, 2013
    Assignee: Panasonic Corporation
    Inventors: Koji Asai, Takashi Morimoto, Ryuta Nakanishi