Abstract: A photoelectric conversion device includes analog signal output units including pixels and configured to output analog signals based on pixels, and signal processing units. Each of the signal processing units is provided correspondingly to one of the analog signal output units and includes a gain application unit configured to apply a gain to an analog signal and an AD conversion unit. The gain application unit selectively outputs a first amplified signal obtained by applying a first gain of 1 or less to the analog signal or a second amplified signal obtained by applying a second gain, smaller than the first gain, to the analog signal. The AD conversion unit converts, from analog to digital, the first or second amplified signal output from the gain application unit.

Abstract: A photoelectric conversion device includes analog signal output units including pixels and configured to output analog signals based on pixels, and signal processing units. Each of the signal processing units is provided correspondingly to one of the analog signal output units and including a gain application unit configured to apply a gain to an analog signal by using only passive elements and an AD conversion unit. In the gain application unit, a portion that contributes to application of a gain to the analog signal is constituted only of passive elements. The gain application unit selectively outputs a first amplified signal obtained by applying a first gain to the analog signal or a second amplified signal obtained by applying a second gain to the analog signal smaller than the first gain. The AD conversion unit converts, from analog to digital, the first or second amplified signal.

Abstract: There are provided a method for driving an image pickup device, a method for correcting a digital signal, an image pickup device, a method for driving an image capturing system, and an image capturing system. Digital signals are generated on the basis of a potential at an input node of a comparison unit by using a first reference signal whose potential changes by a first amount per unit time and a second reference signal whose potential changes by a second amount per unit time, the second amount being greater than the first amount. A correction value based on a difference in signal value between the digital signals is derived. A digital signal based on a pixel signal is corrected on the basis of the derived correction value.

Abstract: A photoelectric conversion device includes a plurality of pixels arranged in a plurality of columns, a plurality of comparators provided correspondingly to the respective columns, a reference signal generation unit configured to supply a reference signal to the plurality of comparators, a counter configured to generate a count signal that includes a plurality of bits in synchronization with a first clock signal, a synchronization unit configured to synchronize the plurality of bits with a second clock signal to generate a synchronized count signal and to output the generated synchronized count signal, and a plurality of memories provided correspondingly to the respective comparators, the memories each being configured to store the synchronized count signal in response to a change in an output of a corresponding one of the comparators.

Abstract: A transmitter circuit in which a driver circuit includes MOS transistors for bias voltage application, in which a driving current flows, cascode-connected to MOS transistors for differential signal input controlled by a voltage value of transmitted data signals, controlled by a voltage value of a bias voltage, and driver circuits include MOS transistors for bias voltage application, in which a driving current flows, cascode-connected to MOS transistors for differential signal input that is controlled by a voltage value of signals obtained by the transmitted data signals, connected to a load portion, and controlled by a voltage value of a bias voltage.

Abstract: When a level of a signal output from a pixel is higher than a comparison level, the signal output from the pixel is converted into a digital signal during a first period by using a first reference signal. If the level of the signal output from the pixel is lower than the comparison level, the signal output from the pixel is converted into a digital signal during a second period that is longer than the first period by using a second reference signal.

Abstract: A photoelectric conversion apparatus includes a plurality of pixels provided in a plurality of columns, a plurality of analog-to-digital conversion units each provided for a corresponding one of the plurality of columns, and a correction unit. Each of the plurality of analog-to-digital conversion units is configured to convert a signal of a corresponding one of the plurality of pixels into a digital signal at a resolution corresponding to a magnitude of the signal. The correction unit is configured to correct a difference in the resolution.

Abstract: Pixels output a first signal based on signal charge of a part of photoelectric conversion units of multiple photoelectric conversion units, and a second signal based on signal charge of multiple photoelectric conversion units. An imaging apparatus outputs signals based on the first signals and signals based on the second signals by reducing the number of signals based on the first signals as compared to the number of signals based on the second signals.

Abstract: Power consumption is increased in an interface circuit having a signal processing function for waveform shaping due to influence of a circuit added for waveform shaping. Also, since a plurality of boards are connected to a backplane in a system, they are not exchanged in accordance with distances while there are boards being far or near are mixed, but a common board is used. Thus, it is necessary to prepare a configuration of an interface circuit meeting the longest transfer distance. An interface circuit disabling a part of or all of operations of a waveform shaping circuit is provided. Accordingly, in accordance with transfer distances, switching of operation ranges of waveform shaping circuit inside the interface circuit is possible, and operation ranges of the waveform shaping circuit can be limited, and power consumption of the interface circuit, an LSI including the interface circuit, and a server device can be reduced.

Abstract: The game apparatus (1) has a fixed main unit (100) and a movable operating device (8) that is held by a player and is capable of detecting the body motion of the player and of transmitting a signal to, receiving from, the main unit (100). The operating device (8) has an acceleration sensor (86) for detecting acceleration, a light source (85), and a transmitter (87) for transmitting a value detected by the acceleration sensor (86) to the main unit (100). The main unit (100) has light receiving units (9L,9R) that receive the light emitted from the light source (85) to detect the intensity of the received light, a RAM (14), and a processor (16).

Abstract: A differential amplifier stage under a band design whereby a data signal at a maximum transfer rate among received waveforms is subjected to attenuation upon passing through a transmission line is not amplified, and a signal at a transfer rate half the maximum transfer rate is amplified. If it is determined that a signal whose amplitude is larger in value than a high reference voltage, the signal is determined as a signal “1” while if smaller in value than a low reference voltage, the signal is determined as a signal “0”. If the first amplitude detector detects that the amplitude of the signal is smaller in value than the high reference voltage, and the second amplitude detector detects that the amplitude of the signal is larger in value than the low reference voltage, the present signal is determined as an inverting signal of an immediately preceding signal.

Abstract: A transmitter circuit in which a driver circuit includes MOS transistors for bias voltage application, in which a driving current flows, cascode-connected to MOS transistors for differential signal input controlled by a voltage value of transmitted data signals, controlled by a voltage value of a bias voltage, and driver circuits include MOS transistors for bias voltage application, in which a driving current flows, cascode-connected to MOS transistors for differential signal input that is controlled by a voltage value of signals obtained by the transmitted data signals, connected to a load portion, and controlled by a voltage value of a bias voltage.

Abstract: In a data transfer device which cancells an offset of a differential amplifier for amplifying a received signal and an offset caused by characteristics of a differential transmission line and selects optimum conditions such as pre-emphasis amount of an output pre-emphasis circuit, a first chip (transmission side LSI=transfer engine 210) and a second chip (reception side LSI=multiplexing engine 330) are connected to each other through differential transmission line 430 and a SerDes (serializer) 401 and a SerDes (deserializer) 402 are used to make signal transmission, so that optimum setting conditions of an offset amount of an offset cancellation circuit included in an input buffer amplifier and a pre-emphasis amount of pre-emphasis circuit included in an output buffer are decided in training using a training PRBS generator 560 and a training PRBS comparator 570.

Abstract: In an output circuit having a de-emphasis for use in high-speed serial transmission, a circuit for suppressing a fluctuation of a common mode potential which occurs in output amplitude is provided. A positive pole and a negative pole of an output circuit in a serial transmission device for differential transmission having de-emphasis are connected to the respective outputs of a differential circuit that differentially receives outputs of a detector device for a pattern of data to be transmitted, and a detector device for an inverted pattern of the data to be transmitted. When a specific pattern of data to be transmitted and its reverted pattern appear, a current of the output circuit is compensated by the connected differential circuit, thereby enabling a common mode noise to be prevented.

Abstract: Power consumption is increased in an interface circuit having a signal processing function for waveform shaping due to influence of a circuit added for waveform shaping. Also, since a plurality of boards are connected to a backplane in a system, they are not exchanged in accordance with distances while there are boards being far or near are mixed, but a common board is used. Thus, it is necessary to prepare a configuration of an interface circuit meeting the longest transfer distance. An interface circuit disabling a part of or all of operations of a waveform shaping circuit is provided. Accordingly, in accordance with transfer distances, switching of operation ranges of waveform shaping circuit inside the interface circuit is possible, and operation ranges of the waveform shaping circuit can be limited, and power consumption of the interface circuit, an LSI including the interface circuit, and a server device can be reduced.

Abstract: In order to transfer data at high speed over a long distance, a current mode logic output circuit (CML) having a large number of taps, high accuracy, and a wide switchable range of the amount of pre-emphasis is needed. However, when the amount of emphasis is set by adding unit source-coupled pair circuits, a problem will arise that the output capacitance of the current mode logic output circuit would increase, thus hampering high-speed transmission. An output circuit of the invention is constructed from unit source-coupled pair circuits 501, which are obtained by dividing a current mode logic output circuit (CML) into m groups, terminal resistors 502, and a data selector 504. The amount of emphasis of each tap is determined by the ratio of the number of unit source-coupled pair circuits, which have been obtained by dividing the CML into m groups, allocated to each tap. Thus, the amount of emphasis can be set to be any arbitrary amount without a change in the output amplitude of 1.

Abstract: In an output circuit having a de-emphasis for use in high-speed serial transmission, a circuit for suppressing a fluctuation of a common mode potential which occurs in output amplitude is provided. A positive pole and a negative pole of an output circuit in a serial transmission device for differential transmission having de-emphasis are connected to the respective outputs of a differential circuit that differentially receives outputs of a detector device for a pattern of data to be transmitted, and a detector device for an inverted pattern of the data to be transmitted. When a specific pattern of data to be transmitted and its reverted pattern appear, a current of the output circuit is compensated by the connected differential circuit, thereby enabling a common mode noise to be prevented.

Abstract: In order to optimize with high accuracy parameters that a fast I/F has, optimization by training is required. Regarding these parameters, their optimum values vary to an operating frequency band and a power supply voltage of the I/F. In order to lower the operating frequency band and lower the power supply voltage for reduction of power consumption, re-training that requires a time becomes needed. By obtaining in advance optimum combinations of the operating frequency band, the power supply voltage, and various parameters of the I/F for various parameters of the I/F and then by making a table with them, it is possible to optimize the parameters in a short time by referring to the table in optimizing the power supply voltage. By the optimization of the parameters in a short time being enabled, it is also possible to perform dynamic optimization during an operation of the device.

Abstract: A differential amplifier stage under a band design whereby a data signal at a maximum transfer rate among received waveforms is subjected to attenuation upon passing through a transmission line is not amplified, and a signal at a transfer rate half the maximum transfer rate is amplified. If it is determined that a signal whose amplitude is larger in value than a high reference voltage, the signal is determined as a signal “1” while if smaller in value than a low reference voltage, the signal is determined as a signal “0”. If the first amplitude detector detects that the amplitude of the signal is smaller in value than the high reference voltage, and the second amplitude detector detects that the amplitude of the signal is larger in value than the low reference voltage, the present signal is determined as an inverting signal of an immediately preceding signal.