Patents by Inventor Takashi Okada

Takashi Okada has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250260232
    Abstract: A method for operating a power system in the present disclosure includes the steps of planning an output of a fuel cell system in a second period, which is later than a first period, in such a way as to make up differences between actual values of power demand and actual values of an output of a solar power generation system in the first period, causing, if a sum of the output of the solar power generation system and the output of the fuel cell system is larger than the power demand, the storage battery system to store power, and causing, if the sum of the output of the solar power generation system and the output of the fuel cell system is smaller than the power demand, the storage battery system to discharge power in such a way as to meet the power demand.
    Type: Application
    Filed: April 10, 2025
    Publication date: August 14, 2025
    Inventors: TAKASHI OKADA, ATSUSHI SHIMIZU, MASARU FUKUOKA, YUSUKE IGUCHI
  • Publication number: 20250239863
    Abstract: A method for operating a power system in the present disclosure includes the step of planning an output of a fuel cell system in such a way as to make up a difference between power demand and an output of a solar power generation system. In the step, if a charge level of a storage battery system is higher than or equal to an upper limit value smaller than 100%, first correction, in which the plan is corrected in such a way as to reduce the output of the fuel cell system, is performed and/or if the charge level of the storage battery system is lower than or equal to a lower limit value larger than 0%, second correction, in which the plan is corrected in such a way as to increase the output of the fuel cell system, is performed.
    Type: Application
    Filed: April 10, 2025
    Publication date: July 24, 2025
    Inventors: TAKASHI OKADA, ATSUSHI SHIMIZU, MASARU FUKUOKA, YUSUKE IGUCHI
  • Publication number: 20250197817
    Abstract: It is an object of the present invention to provide a method for producing a virus, for use in obtaining viral particles with high purity, and the present method is more efficient than conventional methods. Specifically, the present invention relates to a method for obtaining a virus, comprising a step of treating a virus-containing sample with a surfactant. The surfactant may be one or more selected from the group consisting of an amphoteric surfactant, an anionic surfactant, a cationic surfactant, and a nonionic surfactant. In addition, the method for obtaining a virus according to the present invention may comprise a step of performing tangential flow filtration (TFF) to purify the virus.
    Type: Application
    Filed: March 23, 2023
    Publication date: June 19, 2025
    Applicant: The University of Tokyo
    Inventors: Takashi OKADA, Yuji TSUNEKAWA, Hiromi KINOH, Mikako WADA
  • Publication number: 20250163456
    Abstract: This invention is intended to enhance production of viral vectors when producing viral vectors using viral vector-producing cells. A protein involved in the DNA damage response in viral vector-producing cells is inhibited.
    Type: Application
    Filed: February 21, 2023
    Publication date: May 22, 2025
    Applicant: NIPPON MEDICAL SCHOOL FOUNDATION
    Inventors: Yoshitaka MIYAGAWA, Takashi OKADA, Yukage KOBARI, Takao UCHIKAI
  • Publication number: 20250116845
    Abstract: An imaging optical system includes an imaging lens, and an optical element disposed on an image side of the imaging lens. At least one surface of the optical element is a diffractive surface with a controlled wavelength dispersion characteristic. Predetermined inequalities are satisfied.
    Type: Application
    Filed: September 5, 2024
    Publication date: April 10, 2025
    Inventor: Takashi OKADA
  • Publication number: 20250115847
    Abstract: Provision of a cell production method, in particular, a method in which carriers are suspended and oscillated in a culture fluid, which is capable of reducing physical stress imposed on animal cells or a transfection reagent and improving cell culture efficiency or transfection efficiency. The cell production method includes a culturing step for culturing cells in a culture vessel 2, which holds at least cells, a culture fluid, and a carrier C while the vessel is oscillated on an oscillation plate 102, in which the oscillation plate 102 is tilted only in one direction with respect to a horizontal state.
    Type: Application
    Filed: January 20, 2023
    Publication date: April 10, 2025
    Inventors: Takashi OKADA, Yuji TSUNEKAWA, Shutaro ISHIKAWA
  • Patent number: 12189446
    Abstract: A method for addressing power outage of an arithmetic logic apparatus including an arithmetic logic part, a power supply port to which power is externally supplied, and a battery, the arithmetic logic part including a primary system device and a secondary system device, the method includes detection processing of detecting disruption of power in the power supply port, supplying processing of supplying power from the battery to the arithmetic logic part when the disruption is detected in the detection processing, end processing of performing processing of ending the secondary system device to reduce power consumption of the secondary system device when the supplying processing is performed, and backup processing of performing data backup using the primary system device upon completion of the end processing.
    Type: Grant
    Filed: March 7, 2023
    Date of Patent: January 7, 2025
    Assignee: Hitachi Vantara, Ltd.
    Inventors: Sotaro Nakayama, Takashi Okada, Naoya Okamura
  • Publication number: 20240429321
    Abstract: A semiconductor device includes a gate electrode on a substrate, a gate insulating film on the gate electrode, an oxide semiconductor film via the gate insulating film on the gate electrode, a source electrode and a drain electrode on the oxide semiconductor film, a protective film provided on the source electrode and the drain electrode; and a conductive layer provided on the protective film and overlapped on the oxide semiconductor layer. The protective film includes a first silicon oxide film and a first silicon nitride film. The first oxide film is in contact with the oxide semiconductor layer. The gate insulating film includes a second silicon nitride film and a second silicon oxide film. The second silicon oxide film is in contact with the oxide semiconductor layer. The oxide semiconductor layer has a first region located between the source electrode and the drain electrode in a plan view.
    Type: Application
    Filed: September 6, 2024
    Publication date: December 26, 2024
    Applicant: Japan Display Inc.
    Inventors: Masashi TSUBUKU, Michiaki SAKAMOTO, Takashi OKADA, Toshiki KANEKO, Tatsuya TODA
  • Patent number: 12157548
    Abstract: An underwater docking system according to one aspect of the present disclosure includes: an underwater vehicle that sails in water; and an underwater station with which the underwater vehicle docks. One of the underwater vehicle and the underwater station includes: a reference point; and a first fitting located around the reference point as a center. The other of the underwater vehicle and the underwater station includes: a detector that detects the reference point; and a second fitting located around the detector as a center and fitted to the first fitting. One of the first fitting and the second fitting is an annular groove. The other of the first fitting and the second fitting includes at least two protrusions that are inserted into the annular groove.
    Type: Grant
    Filed: June 8, 2022
    Date of Patent: December 3, 2024
    Assignee: KAWASAKI JUKOGYO KABUSHIKI KAISHA
    Inventors: Noriyuki Okaya, Kosuke Masuda, Takashi Okada, Shinichi Miyata
  • Patent number: 12132117
    Abstract: According to one embodiment, a semiconductor device includes a first insulating film formed of silicon nitride, a second insulating film disposed above the first insulating film and formed of silicon oxide, including a first region and a peripheral region surrounding the first region and thinner than the first region, an oxide semiconductor disposed on the second insulating film and intersecting the first region, a source electrode overlapping the peripheral region and a drain electrode overlapping the peripheral region. The first region is located between the source electrode and the drain electrode and separated from the source electrode and the drain electrode.
    Type: Grant
    Filed: December 27, 2021
    Date of Patent: October 29, 2024
    Assignee: JAPAN DISPLAY INC.
    Inventors: Takuo Kaitoh, Akihiro Hanada, Takashi Okada
  • Publication number: 20240344153
    Abstract: It is an object of the present invention to provide a method of detecting an AAV (adeno-associated virus)-neutralizing antibody with high sensitivity, and tools used in this method (e.g. DNA, cells, etc.).
    Type: Application
    Filed: October 12, 2022
    Publication date: October 17, 2024
    Applicant: The University of Tokyo
    Inventors: Takashi OKADA, Yuji TSUNEKAWA
  • Patent number: 12119407
    Abstract: A semiconductor device includes a gate electrode on a substrate, a gate insulating film on the gate electrode, an oxide semiconductor film via the gate insulating film on the gate electrode, a source electrode and a drain electrode on the oxide semiconductor film, a protective film provided on the source electrode and the drain electrode; and a conductive layer provided on the protective film and overlapped on the oxide semiconductor layer. The protective film includes a first silicon oxide film and a first silicon nitride film. The first oxide film is in contact with the oxide semiconductor layer. The gate insulating film includes a second silicon nitride film and a second silicon oxide film. The second silicon oxide film is in contact with the oxide semiconductor layer. The oxide semiconductor layer has a first region located between the source electrode and the drain electrode in a plan view.
    Type: Grant
    Filed: February 1, 2023
    Date of Patent: October 15, 2024
    Assignee: Japan Display Inc.
    Inventors: Masashi Tsubuku, Michiaki Sakamoto, Takashi Okada, Toshiki Kaneko, Tatsuya Toda
  • Patent number: 12103352
    Abstract: A lower vehicle-body structure of a vehicle, in which plural sets of suspension links included in a rear suspension apparatus may be provided so as to extend to a vehicle-width-direction inner side from a lower position of respective wheel wells. A set of a pair of left and right first suspension links out of the suspension links may be respectively configured in a U-shape of which upper surface is opened in cross-section, and a first undercover structure that covers a vehicle-body lower surface so as to be flush with a lower surface of each of the first suspension links may be provided on a side portion of the first suspension link.
    Type: Grant
    Filed: August 8, 2022
    Date of Patent: October 1, 2024
    Assignee: MAZDA MOTOR CORPORATION
    Inventors: Michiya Mizokane, Hidetaka Yamamoto, Seiichi Imajyo, Takashi Okada, Yuki Ikawa
  • Publication number: 20240287469
    Abstract: The purpose of the invention is to provide a virus recovery method including reducing viability of cells in a culture solution and filtering, through a hollow fiber membrane, the culture solution containing a virus produced by the cells to recover the virus. The hollow fiber membrane has a gradient structure in which an average pore size becomes smaller from an upstream side to a downstream side in a membrane thickness direction.
    Type: Application
    Filed: June 30, 2022
    Publication date: August 29, 2024
    Applicant: ASAHI KASEI MEDICAL CO., LTD.
    Inventors: Rimi MIYAOKA, Hiroki TANIGUCHI, Takashi OKADA
  • Patent number: 12068399
    Abstract: According to one embodiment, a method for manufacturing a semiconductor device, includes forming a first insulating film which covers a gate electrode, forming an island-shaped oxide semiconductor in contact with the first insulating film, forming a second insulating film which covers the oxide semiconductor, forming a source electrode in contact with the oxide semiconductor, forming a drain electrode in contact with the oxide semiconductor, forming a third insulating film which covers the source electrode and the drain electrode and forming a channel region between the source electrode and the drain electrode by supplying oxygen from the third insulating film to the oxide semiconductor via the second insulating film.
    Type: Grant
    Filed: October 27, 2021
    Date of Patent: August 20, 2024
    Assignee: JAPAN DISPLAY INC.
    Inventors: Akihiro Hanada, Takuo Kaitoh, Ryo Onodera, Takashi Okada, Tomoyuki Ito, Toshiki Kaneko
  • Patent number: 12048027
    Abstract: A device management system according to one embodiment includes: a notification processing unit configured to obtain a proximity notification that represents a situation in which a portable connection source device is in proximity to a target connection destination device; and a connection determining unit configured to manage a connection between the connection source device and the target connection destination device through a radio communication network in response to the proximity notification.
    Type: Grant
    Filed: October 1, 2019
    Date of Patent: July 23, 2024
    Assignee: NTT DOCOMO, INC.
    Inventors: Nozomi Matsumoto, Takashi Okada, Kazuoki Ichikawa, Tatsuya Nishizaki
  • Patent number: 12023398
    Abstract: Provided is a composition including: an acrylamide compound (A1) having a molecular weight of 150 or greater but 250 or less; and a multifunctional polymerizable compound (A2), wherein a content of the multifunctional polymerizable compound (A2) is 15% by mass or greater but 35% by mass or less.
    Type: Grant
    Filed: July 1, 2019
    Date of Patent: July 2, 2024
    Assignee: Ricoh Company, Ltd.
    Inventors: Tatsuki Yamaguchi, Masahide Kobayashi, Mitsunobu Morita, Takashi Okada, Soh Noguchi, Takenori Suenaga
  • Patent number: 12017648
    Abstract: Provided is a vehicle control device capable of realizing fuel-efficient traveling of an own vehicle. Therefore, a vehicle control device 100 includes a limiting factor determination unit 101 that determines whether there are a limiting factor on an own lane that limits traveling of an own vehicle in the own lane and a limiting factor on an adjacent lane that limits the traveling of the own vehicle in a lane adjacent to the own lane, a lane selection unit 102 that selects a lane in which the own vehicle travels based on a determination result of the limiting factor determination unit 101, and a driving force control unit 103 that controls a driving force of the own vehicle based on the lane selected by the lane selection unit 102.
    Type: Grant
    Filed: February 14, 2019
    Date of Patent: June 25, 2024
    Assignee: Hitachi Astemo, Ltd.
    Inventors: Yuuki Okuda, Takashi Okada, Kengo Kumano
  • Publication number: 20240200037
    Abstract: It is an object of the present invention to provide a method for producing a virus to obtain high-purity virus particles, said method being more efficient than conventional methods.
    Type: Application
    Filed: April 14, 2022
    Publication date: June 20, 2024
    Applicant: The University of Tokyo
    Inventors: Takashi OKADA, Mikako WADA
  • Patent number: RE50274
    Abstract: According to one embodiment, a semiconductor memory card includes a first pin group which includes a plurality of pins arranged in a line at an end portion on a side of an inserting direction into a connector and part of which is used both in a first and second modes; and a second pin group which includes a plurality of pins including at least two pin pairs for differential signal, is arranged so that a ground is positioned on both sides of each of the pin pairs for differential signal, and is used only in the second mode. In the second mode, among the respective pins configuring the first pin group, any of adjacent two pins are changed to a pin pair for differential clock signal, and a function of remaining pins of the first pin group is stopped.
    Type: Grant
    Filed: January 20, 2022
    Date of Patent: January 14, 2025
    Assignee: KIOXIA CORPORATION
    Inventor: Takashi Okada