Abstract: According to one embodiment, an ultrasonic probe comprises piezoelectric elements arranged in the form of a two-dimensional array, a processing IC configured to process signal information obtained from the piezoelectric elements, and a flexible wiring substrate disposed between the piezoelectric elements and the processing IC, with the piezoelectric elements mounted on a front surface, and the processing IC mounted on a rear surface.

Abstract: For a suppressed breakage after a flip chip connection of a semiconductor device using a low-permittivity insulation film and a lead-free solder together, with an enhanced production yield, bump electrodes (2) are heated by a temperature profile having, after a heating up to a melting point of the bump electrodes (2) or more, a cooling in which a temperature within a range of 190 to 210° C. is kept for an interval of time within a range of 3 to 15 minutes, and a condition is met, such that 1.4<Lb/La<1.6, where La is a diameter of second electrode pads (33), and Lb is a diameter of first electrode pads (13).

Abstract: According to one embodiment, a manufacturing method of a semiconductor device attained as follows. A dielectric layer having a first opening and a second opening reaching an electrode terminal is formed by modifying a photosensitive resin film on a substrate on which the electrode terminal of a first conductive layer is provided. Next, a second conductive layer that is electrically connected to the electrode terminal is formed on the dielectric layer that includes inside of the first opening, and a third conductive layer that has an oxidation-reduction potential of which difference from the oxidation-reduction potential of the first conductive layer is smaller than a difference of the oxidation-reduction potential between the first conductive layer and the second conductive layer is formed on the second conductive layer.

Abstract: An electronic component in which an element is formed on a chip includes: a pad that is made of a conductive material and that is formed in a first bump formation region that is two-dimensionally arranged in center of one principle face and in a second bump formation region that is linearly arranged at peripheral border of the principle face; a passivation film that is formed on the principle face to cover portion except a formation position of the pad; a metal layer that is formed on the pad; and a bump that is made of a conductive material and that is formed on the metal layer by plating, wherein radius of the metal layer in the second bump formation region is smaller than radius of at least some of the metal layer in the first bump formation region.

Abstract: A first conducting layer is formed on a side of a main surface on which an electrode terminal of a semiconductor device is provided in a semiconductor substrate. The first conducting layer is electrically connected to the electrode terminal of the semiconductor device. A mask layer that has an opening at a predetermined position is formed on the first conducting layer. A second conducting layer is formed inside the opening of the mask layer. The mask layer is removed. A relocation wiring that includes the first conducting layer and electrically draws out the electrode terminal is formed by performing anisotropic etching for the first conducting layer using the second conducting layer as a mask. Finally, a bump is formed on the relocation wiring by causing the second conducting layer to reflow.

Abstract: For a suppressed breakage after a flip chip connection of a semiconductor device using a low-permittivity insulation film and a lead-free solder together, with an enhanced production yield, bump electrodes (2) are heated by a temperature profile having, after a heating up to a melting point of the bump electrodes (2) or more, a cooling in which a temperature within a range of 190 to 210° C. is kept for an interval of time within a range of 3 to 15 minutes, and a condition is met, such that 1.4<Lb/La<1.6, where La is a diameter of second electrode pads (33), and Lb is a diameter of first electrode pads (13).

Abstract: An optical-fiber connector comprises a first optical fiber, a first ferrule which has a cutout portion in at least a periphery of one end face thereof and holds the first optical fiber such that a front end of the first optical fiber becomes the same face as the one end face, a second optical fiber, a second ferrule which has a cutout portion in at least a periphery of one end face thereof and holds the second optical fiber such that a front end of the second optical fiber becomes the same face as the one end face, and an adhesive which connects the one end face of the first ferrule with the one end face of the second ferrule.

Abstract: A laser apparatus comprises a semiconductor laser element which emits a light beam with a spread in a slow-axis direction and a fast-axis direction, a fast-axis collimating lens which controls the spread in the fast-axis direction of the light beam emitted from the semiconductor laser element, a reflector which returns the light beam emitted in the slow-axis direction in a specific angle range to the semiconductor laser element, a reflector supporting member which supports the reflector, and a side support member which supports the fast-axis collimating lens and the reflector supporting member in the slow-axis direction with respect to the semiconductor laser element.

Abstract: A semiconductor device wherein a sealing resin is filled in a space between an interconnecting wiring board and a semiconductor chip after the semiconductor chip is flip chip-mounted on the wiring board in which at least a non-planar region consisting of a through hole, a concave portion or a convex portion, or a region exhibiting poor wettability to the sealing resin is formed on the surface of the wiring board or the semiconductor chip so as to provide a void in the sealed resin filled between the wiring board and the semiconductor chip for the purpose of minimizing any bad influence from the sealing resin on the interconnecting wirings or elements formed on the semiconductor chip.