Abstract: A duty of a system clock is changed by a duty changing circuit, and a phase difference is provided between a current consumed at a leading edge of the system clock and a current consumed at a trailing edge thereof in an internal circuit, so as to shift phases of consumed currents away from each other. Thereby, frequency components concentrating on frequencies each of an even order frequency of the system clock can be cancelled and harmonic components each of a frequency of an even order in a current be reduced. Thus, a semiconductor equipment with less electromagnetic interference can be realized.

Abstract: A backup memory, a DMA (direct memory access) controller, and a WDT (watch dog timer) are provided in addition to a CPU (central processing unit), a RAM (random access memory), and a peripheral circuit. The DMA controller exercises control so that respective data of the CPU, RAM and peripheral circuit is saved in the backup memory each time the CPU, being under normal operation, supplies a counter reset signal to the WDT, and so that the data that has been saved in the backup memory is restored to the CPU, the RAM and the peripheral circuit, respectively, if the WDT has detected a program runaway and outputted a time-over signal. Therefore, even in a case where a program runaway has occurred in the CPU, normal operation is permitted to be resumed from midway in the program.

Abstract: An object of this invention is to provide a wiring design method of integrated circuit device capable of determining a layout without such a problem as congestion of wirings efficiently upon determination of the wiring layout in the integrated circuit device, system thereof and program product thereof. In the wiring design method for determining the route of wiring between a cell and another cell in the integrated circuit device, first, a region in which wirings are to be placed is divided vertically and horizontally (S102). Which divided regions each wiring should cross is determined (S103). The numbers of the wirings crossing the border of each divided region are equalized (S104). If the length of a side of each divided region is larger than a predetermined length (No in S105), that region is further divided (S102). If the length of a side of each region is smaller than the predetermined length, the route at that time is adopted as the rough wiring route of each wiring (S106).

Abstract: To provide a device and method for preventing a computer from malfunctioning due to external noise, while maintaining continuity of computer processing. A clock generation circuit detects a presence or absence of external noise which enters into the computer. The clock generation circuit generates an operation clock signal whose pulse width is (a) a first width when the external noise is not detected and (b) a second width greater than the first width when the external noise is detected. The clock generation circuit supplies the generated operation clock signal to the computer.

Abstract: In a higher layer, power source wiring is provisionally provided between a logic-decided functional block and the logic-undecided functional block. Then, a resistor network of the power source wiring within the logic-undecided functional block is prepared by assuming that a current source has been connected to a power source terminal of the logic-undecided functional block. A resistor network of a total power source wiring in the higher layer is prepared by using this local resistor network. An optimum width of the power source wiring is determined by analyzing this resistor network. Based on the width, the power source wiring of the higher layer is rewired.

Abstract: In a method of and an apparatus for designing a semiconductor integrated circuit device, which are capable of causing each waveform rounding to fall within a predetermined limit value without delay calculations at an early stage of the development of the semiconductor integrated circuit device, a wiring path resistance Rpath from an output terminal of a target circuit cell to a next-stage circuit cell and an allowable longest wiring resistance RtL drivable by the target circuit cell are compared. When Rpath is less than or equal to RtL (S4: YES), the sum Rtotal of resistances of wiring loads in a net and RtL are compared. If Rtotal is less than or equal to RtL (S5: YES), then the next-stage circuit cell is judged to be drivable within a predetermined waveform rounding limit value. When Rtotal is greater than RtL (S5: NO), an effective resistance Rw of each wiring load and an allowable longest wiring effective resistance RwL are compared.

Abstract: A method for designing a semiconductor device having a plurality of logic elements provided with a plurality of power supplies. First, a power supply type name is given to each power supply in accordance with the purpose of the power supply in each logic element. Each logic element is associated with the power supply type name of the power supply that is to be provided to the logic element. A power supply group is formed for each power supply. Specific information of each power supply group associating the power supply type name with supplied voltage is generated. Then, the power supply provided to each logic element is determined by allocating the power supply group to the logic element. The method simplifies designing the layout of a semiconductor device operated by multiple power supplies.

Abstract: In a computer device, a latch circuit latches a program read from a ROM. Even when a program C is mistakenly read from the ROM in place of a correct program B, a CPU outputs an access signal to the ROM again to read the program B at the same address from the ROM, and a match detection circuit compares the program B with the program C output from the latch circuit. Since these programs fail to match with each other, the CPU outputs the access signal again. If the ROM outputs the program B correctly this time, the program B matches with the program B output from the latch circuit when the match detection circuit compares these programs. The CPU then executes the program B as correctly read ROM data. Thus, even when a program in the ROM is mistakenly read, safe operation by a correctly read program is ensured.

Abstract: A method and apparatus for calculating circuit delay times efficiently arranges and stores data to reduce system memory requirements, which allows computers without large storage devices, such as conventional personal computers with limited hard disk space, to be used for testing preliminary device designs, Delay time ratio coefficient values representing a ratio of a delay time determined by values of dependency factors having a large correlation with one another to a predetermined reference delay time of a circuit element are stored in a coefficient table. The dependency factors include process condition, in use or operational temperature, and first and second operational supply voltages.

Abstract: In a method of and an apparatus for designing a semiconductor integrated circuit device, which are capable of causing each waveform rounding to fall within a predetermined limit value without delay calculations at an early stage of the development of the semiconductor integrated circuit device, a wiring path resistance Rpath from an output terminal of a target circuit cell to a next-stage circuit cell and an allowable longest wiring resistance RtL drivable by the target circuit cell are compared. When Rpath is less than or equal to RtL (S4: YES), the sum Rtotal of resistances of wiring loads in a net and RtL are compared. If Rtotal is less than or equal to RtL (S5: YES), then the next-stage circuit cell is judged to be drivable within a predetermined waveform rounding limit value. When Rtotal is greater than RtL (S5: NO), an effective resistance Rw of each wiring load and an allowable longest wiring effective resistance RwL are compared.

Abstract: In a higher layer, power source wiring is provisionally provided between a logic-decided functional block and the logic-undecided functional block. Then, a resistor network of the power source wiring within the logic-undecided functional block is prepared by assuming that a current source has been connected to a power source terminal of the logic-undecided functional block. A resistor network of a total power source wiring in the higher layer is prepared by using this local resistor network. An optimum width of the power source wiring is determined by analyzing this resistor network. Based on the width, the power source wiring of the higher layer is rewired.

Abstract: A method for designing a semiconductor device having a plurality of logic elements provided with a plurality of power supplies. First, a power supply type name is given to each power supply in accordance with the purpose of the power supply in each logic element. Each logic element is associated with the power supply type name of the power supply that is to be provided to the logic element. A power supply group is formed for each power supply. Specific information of each power supply group associating the power supply type name with supplied voltage is generated. Then, the power supply provided to each logic element is determined by allocating the power supply group to the logic element. The method simplifies designing the layout of a semiconductor device operated by multiple power supplies.

Abstract: A transfer robot 2 for holding the peripheral edge of a wafer 1 and transferring the wafer 1, a turning-over alignment section 7 for turning over the wafer 1 and centering the wafer 1, and a transfer robot cleaning section 6 for cleaning holding portions 2a of the transfer robot 2 are provided. Besides, a wafer cleaning section 5 for cleaning the wafer 1 is provided and in this wafer cleaning section 5, a spinner 22 for chucking the wafer 1 and a nozzle 20 through which a cleaning liquid is jetted to this wafer 1. To this nozzle 20, a tank 11 for pure water for supplying pure water, a tank 12 for functional water for supplying a functional water, a tank 13 for chemical liquid for supplying a chemical liquid, and a cleaning liquid mixing portion 14 for storing these various kinds of cleaning liquids and mixing them are connected through supply lines.

Abstract: Superimposing strip layers including a positive electrode strip and a negative electrode strip, which are put into layers together with a separator strip which is put between the electrode strips, are spirally wound around an outer circumference of a bobbin having an end cross section similar in shape to a center hole of a spiral electrode to form a substantially circular center hole in the spiral electrode while extracting the bobbin.

Abstract: A reciprocatory dry shaver is capable of providing a drive point of transmitting a reciprocating force to an inner cutter from a drive element at a location as close as to a cutting edge of the inner cutter for enhancing cutting performance, yet making the use of a plastic made drive element to give a detachable connection with the inner cutter. The shaver comprises a housing incorporating a drive source which is connected to move a drive element projecting on top of the housing. An outer cutter is supported to the top of the housing. An inner cutter is detachably connected to the drive element and is driven thereby to reciprocate in hair shearing engagement with the outer cutter. The drive element comprises a stud and a pin which projects beyond the upper end of the stud. The inner cutter is formed with a joint for detachable connection to the stud and with a catch for detachable connection to the pin.

Abstract: A container 1 has a support member 3 which ascends and descends freely and is provided at back of a container body 2, a top connecting member 11 which is fixed at front of the container body 2 and can couple and decouple with a carrier 45, a bottom connecting member 16 which is provided at the front of the container body 2 so as to be able to move and which couples and decouples with the carrier 45, and transmitting members 21, 40 which transmit the movement of the bottom connecting member 16 to the support member 3 and raise and lower the support member 3.

Abstract: A method of refining tungsten hexafluoride containing molybdenum hexafluoride as an impurity includes the step of contacting the tungsten hexafluoride with at least one metal selected from the group consisting of Mo, W, Cu, Ni, Fe, Co, Zn, Ti, Al, Ca and Mg at a temperature ranging from 100.degree. to 500.degree. C. Molybdenum hexafluoride is efficiently removed from the tungsten hexafluoride by the method.

Abstract: A cargo truck has a lift frame which is mounted on a chassis thereof in a tiltable and slidable manner and has on a back end of the lift frame a curved member which curves downward. The lift frame is tilted so that a back end of the lift frame descends while the lift frame is slid to the rear with respect to the chassis. Thus, the curved member of the lift frame contacts the ground. Then, a body is slid along the lift frame backward by a body drive device, a front of the body is slid along the curved member at a back of the lift frame and lowered, and the body is lowered in an approximately level manner to the ground. Then freight is loaded onto the body lowered level to the ground and is tied down.

Abstract: A container 1 has a support member 3 which ascends and descends freely and is provided at back of a container body 2, a top connecting member 11 which is fixed at front of the container body 2 and can couple and decouple with a carrier 45, a bottom connecting member 16 which is provided at the front of the container body 2 so as to be able to move and which couples and decouples with the carrier 45, and transmitting members 21, 40 which transmit the movement of the bottom connecting member 16 to the support member 3 and raise and lower the support member 3.