Patents by Inventor Takashi Yoshitomi

Takashi Yoshitomi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20140248525
    Abstract: A separator for a non-aqueous secondary battery includes a porous substrate and an adhesive porous layer provided on one or both sides of the porous substrate, the adhesive porous layer including a polyvinylidene-fluoride resin and a filler whose difference between a particle diameter at 90% cumulative volume and a particle diameter at 10% cumulative volume is 2 ?m or less, and the adhesive porous layer satisfying Inequality (1): 0.5?a/r?3.0, wherein, in Inequality (1), “a” represents an average thickness (?m) of the adhesive porous layer on one of the sides of the porous substrate; and “r” represents a volume average particle diameter (?m) of the filler contained in the adhesive porous layer.
    Type: Application
    Filed: October 19, 2012
    Publication date: September 4, 2014
    Applicant: TEIJIN LIMITED
    Inventors: Ayumi Iwai, Takashi Yoshitomi, Satoshi Nishikawa
  • Publication number: 20140242444
    Abstract: A separator for a non-aqueous secondary battery including a porous substrate, and an adhesive porous layer that is formed on one side or both sides of the porous substrate and contains the following polyvinylidene fluoride resin A and the following polyvinylidene fluoride resin B: Polyvinylidene fluoride resin A: a polyvinylidene fluoride resin containing structural units derived from vinylidene fluoride and structural units derived from hexafluoropropylene, a total content ratio of structural units derived from hexafluoropropylene in each of the vinylidene fluoride copolymers being from 0.5 mol % to 1.
    Type: Application
    Filed: October 19, 2012
    Publication date: August 28, 2014
    Applicant: TEIJIN LIMITED
    Inventors: Satoshi Nishikawa, Takashi Yoshitomi, Atsuhiro Otsuka, Ayumi Iwai
  • Patent number: 8597816
    Abstract: The present invention is to provide a separator that is excellent in heat resistance, shutdown function, flame retardancy and handling property. The separator for a nonaqueous secondary battery of the invention is a separator for a nonaqueous secondary battery that has a polyolefin microporous membrane at least one surface of which is laminated with a heat resistant porous layer containing a heat resistant resin, and is characterized by containing an inorganic filler containing a metallic hydroxide that undergoes dehydration reaction at a temperature of 200 to 400° C.
    Type: Grant
    Filed: August 28, 2012
    Date of Patent: December 3, 2013
    Assignee: Teijin Limited
    Inventors: Satoshi Nishikawa, Takashi Yoshitomi, Guemju Cha, Takahiro Daido
  • Publication number: 20130273408
    Abstract: The present invention provides a separator for a non-aqueous electrolyte battery that includes a porous base material including a polyolefin and a heat-resistant porous layer provided on at least one surface of the porous base material and including a heat-resistant resin, in which when a thermomechanical analysis measurement has been performed by applying a constant load, the separator for a non-aqueous electrolyte battery satisfies the following conditions (i) and (ii): (i) at least one shrinkage peak appears in a temperature range of from 130 to 155° C. in a displacement waveform representing shrinkage displacement with respect to temperature; and (ii) an extension rate in a range from a shrinkage peak appearance temperature T1 to (T1+20)° C. is less than 0.5%/° C.
    Type: Application
    Filed: December 12, 2011
    Publication date: October 17, 2013
    Applicant: TEIJIN LIMITED
    Inventors: Takashi Yoshitomi, Satoshi Nishikawa, Takahiro Daidou
  • Publication number: 20130236767
    Abstract: An example of the present invention is provided with porous sheets 11, 21 each formed by layering a porous base material including a polyolefin and a heat-resistant porous layer including a heat-resistant resin. The porous sheets 11, 21, respectively, are connected at connecting regions 15a and 15b, 25a and 25b, respectively, which have been formed by thermal fusion of the heat-resistant porous layers facing each other by folding the sheets. Furthermore, the porous sheets 11, 21 are additionally connected at a connecting region 27 that has been formed by thermal fusion.
    Type: Application
    Filed: October 21, 2011
    Publication date: September 12, 2013
    Applicant: TEIJIN LIMITED
    Inventors: Satoshi Nishikawa, Hiroki Sano, Takashi Yoshitomi
  • Publication number: 20130224560
    Abstract: Disclosed is a separator for a non-aqueous electrolyte battery, the separator including a polyolefin microporous substrate in which a content of polyolefin having a molecular weight of 100,000 or less is from 10% by mass to 25% by mass relative to a total amount of polyolefin, and a heat resistant porous layer that is formed on one or both sides of the polyolefin microporous substrate and that includes a heat resistant polymer, wherein a maximum value of S, which is represented by the following formula (1), is 0.8 or more, and a temperature exhibiting the maximum value of S is from 130° C. to 155° C.: S=d(log R)/dT??Formula (1) wherein R represents a resistance (ohm·cm2) of a cell, and T represents a temperature (° C.), in a measurement using a battery that includes the cell that is provided with a separator for a non-aqueous electrolyte battery, at a temperature rising rate of 1.6° C./min.
    Type: Application
    Filed: October 21, 2011
    Publication date: August 29, 2013
    Applicant: TEIJIN LIMITED
    Inventor: Takashi Yoshitomi
  • Publication number: 20130011716
    Abstract: The present invention provides a polyolefin microporous membrane in which a degree of crystallinity is from 60 to 85%, and a tie molecular volume fraction is from 0.7 to 1.7%.
    Type: Application
    Filed: March 24, 2011
    Publication date: January 10, 2013
    Applicant: TEIJIN LIMITED
    Inventors: Hiroki Sano, Satoshi Nishikawa, Takashi Yoshitomi
  • Publication number: 20120321929
    Abstract: The present invention is to provide a separator that is excellent in heat resistance, shutdown function, flame retardancy and handling property. The separator for a nonaqueous secondary battery of the invention is a separator for a nonaqueous secondary battery that has a polyolefin microporous membrane at least one surface of which is laminated with a heat resistant porous layer containing a heat resistant resin, and is characterized by containing an inorganic filler containing a metallic hydroxide that undergoes dehydration reaction at a temperature of 200 to 400° C.
    Type: Application
    Filed: August 28, 2012
    Publication date: December 20, 2012
    Applicant: TEIJIN LIMITED
    Inventors: Satoshi NISHIKAWA, Takashi YOSHITOMI, Guemju CHA, Takahiro DAIDO
  • Publication number: 20120115008
    Abstract: A polyolefin microporous membrane, the membrane having, when measured by DSC, a degree of crystallinity of from 65 to 85%, a lamellar crystal/crystal ratio of from 30 to 85%, a crystal length of from 5 nm to 50 nm and an amorphous length of from 3 nm to 30 nm, and a polyolefin microporous membrane, the membrane having, when measured by X-ray diffractometry, crystal size of from 12.5 nm to 13.5 nm and a degree of crystallinity of from 64 to 68%.
    Type: Application
    Filed: March 23, 2011
    Publication date: May 10, 2012
    Applicant: TEIJIN LIMITED
    Inventors: Hiroki Sano, Satoshi Nishikawa, Takashi Yoshitomi
  • Publication number: 20110171514
    Abstract: The present invention is to provide a separator that is excellent in heat resistance, shutdown function, flame retardancy and handling property. The separator for a nonaqueous secondary battery of the invention is a separator for a nonaqueous secondary battery that has a polyolefin microporous membrane at least one surface of which is laminated with a heat resistant porous layer containing a heat resistant resin, and is characterized by containing an inorganic filler containing a metallic hydroxide that undergoes dehydration reaction at a temperature of 200 to 400° C.
    Type: Application
    Filed: March 22, 2011
    Publication date: July 14, 2011
    Applicant: TEIJIN LIMITED
    Inventors: Satoshi NISHIKAWA, Takashi YOSHITOMI, Guemju CHA, Takahiro DAIDO
  • Patent number: 7976987
    Abstract: The present invention is to provide a separator that is excellent in heat resistance, shutdown function, flame retardancy and handling property. The separator for a nonaqueous secondary battery of the invention is a separator for a nonaqueous secondary battery that has a polyolefin microporous membrane at least one surface of which is laminated with a heat resistant porous layer containing a heat resistant resin, and is characterized by containing an inorganic filler containing a metallic hydroxide that undergoes dehydration reaction at a temperature of 200 to 400° C.
    Type: Grant
    Filed: June 13, 2008
    Date of Patent: July 12, 2011
    Assignee: Teijin Limited
    Inventors: Satoshi Nishikawa, Takashi Yoshitomi, Guemju Cha, Takahiro Daido
  • Publication number: 20100173187
    Abstract: The present invention is to provide a separator that is excellent in heat resistance, shutdown function, flame retardancy and handling property. The separator for a nonaqueous secondary battery of the invention is a separator for a nonaqueous secondary battery that has a polyolefin microporous membrane at least one surface of which is laminated with a heat resistant porous layer containing a heat resistant resin, and is characterized by containing an inorganic filler containing a metallic hydroxide that undergoes dehydration reaction at a temperature of 200 to 400° C.
    Type: Application
    Filed: June 13, 2008
    Publication date: July 8, 2010
    Applicant: TEIJIN LIMITED
    Inventors: Satoshi Nishikawa, Takashi Yoshitomi, Guemju Cha, Takahiro Daido
  • Publication number: 20080048250
    Abstract: A semiconductor device comprises: a p-type semiconductor substrate (1); an insulating film (3); a gate electrode (2) formed on the substrate via the insulating film; and an n-type source/drain region (5) formed on both sides of a channel forming region (4) located under the gate electrode (2) formed on the substrate (1). In particular, the thickness (TOX) of the insulating film (3) is determined to be less than 2.5 nm at conversion rate of silicon oxide film (silicon oxide equivalent thickness); a gate length (Lg) of the gate electrode (2) is determined to be equal to or less than 0.3 ?m; and further a voltage applied to the gate electrode (2) and the drain region (6) is determined to be 1.5 V or less. Therefore, in the MOSFET having the tunneling gate oxide film (3), the reliability of the transistor under the hot carrier stress can be improved, and the gate leakage current can be reduced markedly, so that the transistor characteristics can be improved markedly.
    Type: Application
    Filed: August 28, 2007
    Publication date: February 28, 2008
    Inventors: Hisayo MOMOSE, Hiroshi Iwai, Masanobu Saito, Tatsuya Ohguro, Mizuki Ono, Takashi Yoshitomi, Shinichi Nakamura
  • Patent number: 7282752
    Abstract: A semiconductor device comprises: a p-type semiconductor substrate (1); an insulating film (3); a gate electrode (2) formed an the substrate via the insulating film; and an n-type source/drain region (5) formed on both sides of a channel forming region (4) located under the gate electrode (2) formed on the substrate (1). In particular, the thickness (TOX) of the insulating film (3) is determined to be less than 2.5 nm at conversion rate of silicon oxide film (silicon oxide equivalent thickness); a gate length (Lg) of the gate electrode (2) is determined to be equal to or less than 0.3 ?m; and further a voltage applied to the gate electrode (2) and the drain region (6) is determined a be 1.5 V or less. Therefore, in the MOSFET having the tunneling gate oxide film (3), the reliability of the transistor under the hot carrier stress can be improved, and the gate leakage current can be reduced markedly, so that the transistor characteristics can be improved markedly.
    Type: Grant
    Filed: June 3, 2005
    Date of Patent: October 16, 2007
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hisayo Momose, Hiroshi Iwai, Masanobu Saito, Tatsuya Ohguro, Mizuki Ono, Takashi Yoshitomi, Shinichi Nakamura
  • Publication number: 20070148480
    Abstract: A laminate which is advantageously used as an insulating layer for electronic package application and as an adhesive film for fixing a semiconductor wafer for semiconductor device application, laminates comprising the same and a process for manufacturing the above laminate. The laminate (I) comprises a base layer (A) and an adhesive layer (B) formed on one side or both sides of the layer A, the layer A is a film made of (A-1) a specific wholly aromatic polyimide (PIA-1) or (A-2) a specific wholly aromatic polyamide (PAA-2); and the layer B comprises (B-1) a specific wholly aromatic polyimide (PIB-1), (B-2) a specific wholly aromatic polyamide (PAB-2), or (B-3) a specific resin composition (RCB-3) comprising a wholly aromatic polyimide (PIB-3) and a specific wholly aromatic polyamide (PAB-3), laminates comprising the same and a process for manufacturing the above laminate.
    Type: Application
    Filed: December 22, 2004
    Publication date: June 28, 2007
    Inventors: Toyoaki Ishiwata, Toru Sawaki, Takashi Yoshitomi, Tsutomu Nakamura
  • Publication number: 20060134407
    Abstract: There are provided an adhesive sheet, exhibiting a specific peel strength and shear peel strength and being composed of a base material (A) comprising a fully aromatic polyimide film having a glass transition temperature of 200° C. or above and a thermal adhesive layer (C) comprising a fully aromatic polyamide having a glass transition temperature of 200-500° C., as well as a laminate composed of the sheet and a process for its production. Also provided is a method of release after treatment of the laminate composed of the adhesive sheet, to obtain a laminate having the target to-be-treated layer.
    Type: Application
    Filed: January 28, 2004
    Publication date: June 22, 2006
    Inventors: Takashi Yoshitomi, Kazunori Kojima, Tsutomu Nakamura, Toyoaki Ishiwata, Toru Sawaki
  • Patent number: 7045415
    Abstract: At present, Cu (copper) is being used as a wiring material. In an RF-CMOS device as a combination of an RF analog device and CMOS logic device, two electrodes of a MIM capacitor are formed from Cu having a large diffusion coefficient. To prevent Cu from diffusing to the capacitor insulating film of the MIM capacitor, diffusion prevention films having a function of preventing diffusion of Cu are interposed between the capacitor insulating film and the two electrodes. As a result, Cu forming the electrodes does not diffuse to the capacitor insulating film.
    Type: Grant
    Filed: July 30, 2004
    Date of Patent: May 16, 2006
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Takashi Yoshitomi, Tatsuya Ohguro, Ryoji Hasumi, Hideki Kimijima, Takashi Yamaguchi, Masahiro Inohara
  • Patent number: 6998663
    Abstract: A semiconductor device, comprising a first wiring formed in a first insulating film, a second insulating film formed on the first insulating film, a first electrode film selectively formed on the second insulating film, a third insulating film formed on the first electrode film, and having an end portion and a central portion, wherein the end portion has a thickness thinner than the central portion, a second electrode film formed on the central portion of the third insulating film such that the second electrode film faces the first electrode film.
    Type: Grant
    Filed: February 4, 2004
    Date of Patent: February 14, 2006
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Takashi Yoshitomi, Masahiko Matsumoto
  • Publication number: 20050224898
    Abstract: A semiconductor device comprises: a p-type semiconductor substrate (1); an insulating film (3); a gate electrode (2) formed an the substrate via the insulating film; and an n-type source/drain region (5) formed on both sides of a channel forming region (4) located under the gate electrode (2) formed on the substrate (1). In particular, the thickness (TOX) of the insulating film (3) is determined to be less than 2.5 nm at conversion rate of silicon oxide film (silicon oxide equivalent thickness); a gate length (Lg) of the gate electrode (2) is determined to be equal to or less than 0.3 ?m; and further a voltage applied to the gate electrode (2) and the drain region (6) is determined a be 1.5 V or less. Therefore, in the MOSFET having the tunneling gate oxide film (3), the reliability of the transistor under the hot carrier stress can be improved, and the gate leakage current can be reduced markedly, so that the transistor characteristics can be improved markedly.
    Type: Application
    Filed: June 3, 2005
    Publication date: October 13, 2005
    Inventors: Hisayo Momose, Hiroshi Iwai, Masanobu Saito, Tatsuya Ohguro, Mizuki Ono, Takashi Yoshitomi, Shinichi Nakamura
  • Patent number: 6929990
    Abstract: A semiconductor device comprises: a p-type semiconductor substrate (1); an insulating film (3); a gate electrode (2) formed on the substrate via the insulating film; and an n-type source/drain region (5) formed on both sides of a channel forming region (4) located under the gate electrode (2) formed on the substrate (1). In particular, the thickness (TOX) of the insulating film (3) is determined to be less than 2.5 nm at conversion rate of silicon oxide film (silicon oxide equivalent thickness); a gate length (Lg) of the gate electrode (2) is determined to be equal to or less than 0.3 ?m; and further a voltage applied to the gate electrode (2) and the drain region (6) is determined to be 1.5 V or less. Therefore, in the MOSFET having the tunneling gate oxide film (3), the reliability of the transistor under the hot carrier stress can be improved, and the gate leakage current can be reduced markedly, so that the transistor characteristics can be improved markedly.
    Type: Grant
    Filed: October 9, 2003
    Date of Patent: August 16, 2005
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hisayo Momose, Hiroshi Iwai, Masanobu Saito, Tatsuya Ohguro, Mizuki Ono, Takashi Yoshitomi, Shinichi Nakamura