Patents by Inventor Takashi Yui
Takashi Yui has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10847702Abstract: A semiconductor module includes: a semiconductor element; a wiring substrate on which the semiconductor element is mounted; a heat dissipation substrate; a first metal material that bonds the wiring substrate and the heat dissipation substrate; and a second metal material that bonds the wiring substrate and the heat dissipation substrate and has a different melting point from the first metal material. Each of the following is at least partially bonded: the first metal material and the wiring substrate, the first metal material and the heat dissipation substrate, the second metal material and the wiring substrate, the second metal material and the heat dissipation substrate, and the first metal material and the second metal material. Each of the following is bonded by alloying: the first metal material and the wiring substrate, the first metal material and the heat dissipation substrate, and the first metal material and the second metal material.Type: GrantFiled: February 26, 2019Date of Patent: November 24, 2020Assignee: PANASONIC SEMICONDUCTOR SOLUTIONS CO., LTD.Inventors: Takeshi Kawabata, Kiyomi Hagihara, Takashi Yui, Naofumi Koga
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Publication number: 20190189881Abstract: A semiconductor module includes: a semiconductor element; a wiring substrate on which the semiconductor element is mounted; a heat dissipation substrate; a first metal material that bonds the wiring substrate and the heat dissipation substrate; and a second metal material that bonds the wiring substrate and the heat dissipation substrate and has a different melting point from the first metal material. Each of the following is at least partially bonded: the first metal material and the wiring substrate, the first metal material and the heat dissipation substrate, the second metal material and the wiring substrate, the second metal material and the heat dissipation substrate, and the first metal material and the second metal material. Each of the following is bonded by alloying: the first metal material and the wiring substrate, the first metal material and the heat dissipation substrate, and the first metal material and the second metal material.Type: ApplicationFiled: February 26, 2019Publication date: June 20, 2019Inventors: Takeshi KAWABATA, Kiyomi HAGIHARA, Takashi YUI, Naofumi KOGA
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Patent number: 10305008Abstract: A semiconductor module includes: one or more semiconductor elements; a wiring substrate having a first surface on which the one or more semiconductor elements are mounted, the wiring substrate being electrically connected to the one or more semiconductor elements; a heat sink on which the wiring substrate is mounted, the heat sink facing a second surface of the wiring substrate on a reverse side of the first surface; a binder which is formed in a die pad area on the heat sink so as to be present between the wiring substrate and the heat sink, and bonds the wiring substrate and the heat sink; and a support which is formed in a peripheral part of the die pad area on the heat sink, and fixes the wiring substrate to the heat sink by being in contact with a peripheral part of the second surface of the wiring substrate.Type: GrantFiled: October 18, 2017Date of Patent: May 28, 2019Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.Inventors: Takeshi Kawabata, Kiyomi Hagihara, Satoshi Kanai, Takashi Yui
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Patent number: 10006381Abstract: An internal combustion engine includes a variable mechanism that changes a working angle of an intake valve. A controller diagnoses whether there is an abnormality that an intake air amount reduces during idle operation. The controller changes an abnormality determination threshold for diagnosing an abnormality on the basis of a mode in which the working angle is changed by the variable mechanism.Type: GrantFiled: July 16, 2014Date of Patent: June 26, 2018Assignee: Toyota Jidosha Kabushiki KaishaInventors: Takashi Yui, Kota Hayashi
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Patent number: 9917066Abstract: A lamination structure includes a first semiconductor chip and a second semiconductor chip stacked via a bonding section so that a rear surface of the first semiconductor chip faces the main surface of the second semiconductor chip. At least a part of a side surface of the first semiconductor chip are covered with a first resin, a distribution layer is formed on the plane formed of the main surface of the first semiconductor chip and a surface of the first resin. At least part of electrodes existing in the main surface of the second semiconductor chip is electrically connected to at least part of first external electrodes formed on the distribution layer via the penetration electrodes that penetrate the first semiconductor chip.Type: GrantFiled: July 16, 2014Date of Patent: March 13, 2018Assignee: Panasonic CorporationInventors: Nobuo Aoi, Masaru Sasago, Yoshihiro Mori, Takeshi Kawabata, Takashi Yui, Toshio Fujii
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Publication number: 20180040792Abstract: A semiconductor module includes: one or more semiconductor elements; a wiring substrate having a first surface on which the one or more semiconductor elements are mounted, the wiring substrate being electrically connected to the one or more semiconductor elements; a heat sink on which the wiring substrate is mounted, the heat sink facing a second surface of the wiring substrate on a reverse side of the first surface; a binder which is formed in a die pad area on the heat sink so as to be present between the wiring substrate and the heat sink, and bonds the wiring substrate and the heat sink; and a support which is formed in a peripheral part of the die pad area on the heat sink, and fixes the wiring substrate to the heat sink by being in contact with a peripheral part of the second surface of the wiring substrate.Type: ApplicationFiled: October 18, 2017Publication date: February 8, 2018Inventors: Takeshi KAWABATA, Kiyomi HAGIHARA, Satoshi KANAI, Takashi YUI
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Patent number: 9443793Abstract: A first chip including electrodes is mounted above an expanded semiconductor chip formed by providing an expanded portion at an outer edge of a second chip including chips. The electrodes of the first chip are electrically connected to the electrodes of the second chip by conductive members. A re-distribution structure is formed from a top of the first chip outside a region for disposing the conductive members along a top of the expanded portion. Connection terminals are provided above the expanded portion, and electrically connected to ones of the electrodes of the first chip via the re-distribution structure.Type: GrantFiled: December 27, 2013Date of Patent: September 13, 2016Assignee: Panasonic CorporationInventors: Hiroki Yamashita, Takashi Yui, Takeshi Kawabata, Kiyomi Hagihara, Kenji Yokoyama
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Publication number: 20150371971Abstract: To provide a CoC type semiconductor device capable of preventing a power supply voltage from dropping (IR drop) in a center portion of a chip, and preventing deterioration in timing reliability. The semiconductor device includes a substrate, a first semiconductor chip placed on the substrate, having a circuit formation surface on an upper surface provided opposite to a surface facing the substrate, and including a TSV electrode and a connection pad electrically connected to the substrate, a second semiconductor chip placed on the upper surface of the first semiconductor chip, and electrically connected to the first semiconductor chip through a bump, a connection member for electrically connecting the connection pad of the first semiconductor chip to the substrate, and a redistribution layer formed on the upper surface of the first semiconductor chip, and electrically connected to the TSV electrode.Type: ApplicationFiled: September 1, 2015Publication date: December 24, 2015Inventors: KENJI YOKOYAMA, TAKESHI KAWABATA, TAKASHI YUI
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Publication number: 20150039209Abstract: An internal combustion engine includes a variable mechanism that changes a working angle of an intake valve. A controller diagnoses whether there is an abnormality that an intake air amount reduces during idle operation. The controller changes an abnormality determination threshold for diagnosing an abnormality on the basis of a mode in which the working angle is changed by the variable mechanism.Type: ApplicationFiled: July 16, 2014Publication date: February 5, 2015Inventors: Takashi Yui, Kota Hayashi
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Publication number: 20140327157Abstract: A lamination structure includes a first semiconductor chip and a second semiconductor chip stacked via a bonding section so that a rear surface of the first semiconductor chip faces the main surface of the second semiconductor chip. At least a part of a side surface of the first semiconductor chip are covered with a first resin, a distribution layer is formed on the plane formed of the main surface of the first semiconductor chip and a surface of the first resin. At least part of electrodes existing in the main surface of the second semiconductor chip is electrically connected to at least part of first external electrodes formed on the distribution layer via the penetration electrodes that penetrate the first semiconductor chip.Type: ApplicationFiled: July 16, 2014Publication date: November 6, 2014Inventors: NOBUO AOI, MASARU SASAGO, YOSHIHIRO MORI, TAKESHI KAWABATA, TAKASHI YUI, TOSHIO FUJII
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Patent number: 8866284Abstract: A semiconductor device includes a first extended semiconductor chip including a first semiconductor chip and an extension extending outwardly from a side surface of the first semiconductor chip. The semiconductor device also includes a second semiconductor chip mounted above the first extended semiconductor chip and electrically connected with the first semiconductor chip. The first extended semiconductor chip includes a first extension electrode pad provided above the extension and electrically connected with an electrode of the first semiconductor chip.Type: GrantFiled: July 10, 2013Date of Patent: October 21, 2014Assignee: Panasonic CorporationInventors: Shouichi Kobayashi, Hiroaki Suzuki, Kazuhide Uriu, Koichi Seko, Takashi Yui, Kiyomi Hagihara
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Patent number: 8833150Abstract: A detecting apparatus that detects an abnormality of imbalance of air-fuel ratios among cylinders of a multi-cylinder internal combustion engine, which is equipped with a variable working angle mechanism of an intake valve, the detecting apparatus includes an abnormality detection portion that detects a parameter regarding rotational fluctuations of each of the cylinders and detects whether or not there is an abnormality of imbalance of air-fuel ratios among the cylinders. The abnormality detection portion refrains from determining that the air-fuel ratios are normal when the working angle at the time of detection of the parameter is within a predetermined large working angle range, and determines that the air-fuel ratios are normal when the working angle at the time of detection of the parameter is within a predetermined small working angle range that is on a small working angle side with respect to the large working angle range.Type: GrantFiled: November 28, 2012Date of Patent: September 16, 2014Assignee: Toyota Jidosha Kabushiki KaishaInventors: Takashi Yui, Kota Hayashi, Tokiji Ito
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Patent number: 8766418Abstract: A semiconductor device includes a first semiconductor chip; an extension formed at a side surface of the first semiconductor chip; a connection terminal formed on the first semiconductor chip; a re-distribution part formed over the first semiconductor chip and the extension and including an interconnect connected to the connection terminal and an insulating layer covering the interconnect; and an electrode formed above the extension on a surface of the re-distribution part and connected to the interconnect at an opening of the insulating layer. The electrode is mainly made of a material having an elastic modulus higher than that of the interconnect. The electrode includes a bonding region where the electrode is bonded to the interconnect at the opening, and an outer region closer to an end part of the extension. The interconnect is formed so as not to continuously extend to a position right below the outer region.Type: GrantFiled: January 9, 2014Date of Patent: July 1, 2014Assignee: Panasonic CorporationInventors: Teppei Iwase, Takashi Yui
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Publication number: 20140124911Abstract: A semiconductor device includes a first semiconductor chip; an extension formed at a side surface of the first semiconductor chip; a connection terminal formed on the first semiconductor chip; a re-distribution part formed over the first semiconductor chip and the extension and including an interconnect connected to the connection terminal and an insulating layer covering the interconnect; and an electrode formed above the extension on a surface of the re-distribution part and connected to the interconnect at an opening of the insulating layer. The electrode is mainly made of a material having an elastic modulus higher than that of the interconnect. The electrode includes a bonding region where the electrode is bonded to the interconnect at the opening, and an outer region closer to an end part of the extension. The interconnect is formed so as not to continuously extend to a position right below the outer region.Type: ApplicationFiled: January 9, 2014Publication date: May 8, 2014Applicant: Panasonic CorporationInventors: TEPPEI IWASE, TAKASHI YUI
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Patent number: 8716868Abstract: A pad (15) is provided on a surface connecting a first substrate (11) of a lower layer module with an upper layer module, the pad is partially covered by an insulating film (20) to form an opening section (3) exposing the pad (15), a first connection terminal (2) is formed on the lower surface of the first substrate (11) of the lower layer module, the planar shape of the opening section (3) is different from the planar shape of the first connection terminal (2), the outer shape of the opening section (3) is larger than the first connection terminal (2), and in a transmissive inspection from above, the shape of the lower end of a second connection terminal (30) spreading in the opening section (3) is not concealed by the other terminal. This configuration enables easy and reliable determination of whether bonding sections are satisfactory by a non-destructive inspection.Type: GrantFiled: May 20, 2010Date of Patent: May 6, 2014Assignee: Panasonic CorporationInventors: Takeshi Kawabata, Takashi Yui
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Publication number: 20140103504Abstract: A first chip including electrodes is mounted above an expanded semiconductor chip formed by providing an expanded portion at an outer edge of a second chip including chips. The electrodes of the first chip are electrically connected to the electrodes of the second chip by conductive members. A re-distribution structure is formed from a top of the first chip outside a region for disposing the conductive members along a top of the expanded portion. Connection terminals are provided above the expanded portion, and electrically connected to ones of the electrodes of the first chip via the re-distribution structure.Type: ApplicationFiled: December 27, 2013Publication date: April 17, 2014Applicant: Panasonic CorporationInventors: HIROKI YAMASHITA, TAKASHI YUI, TAKESHI KAWABATA, KIYOMI HAGIHARA, KENJI YOKOYAMA
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Publication number: 20130299957Abstract: A semiconductor device includes a first extended semiconductor chip including a first semiconductor chip and an extension extending outwardly from a side surface of the first semiconductor chip. The semiconductor device also includes a second semiconductor chip mounted above the first extended semiconductor chip and electrically connected with the first semiconductor chip. The first extended semiconductor chip includes a first extension electrode pad provided above the extension and electrically connected with an electrode of the first semiconductor chip.Type: ApplicationFiled: July 10, 2013Publication date: November 14, 2013Inventors: SHOUICHI KOBAYASHI, HIROAKI SUZUKI, KAZUHIDE URIU, KOICHI SEKO, TAKASHI YUI, KIYOMI HAGIHARA
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Publication number: 20130133401Abstract: A detecting apparatus that detects an abnormality of imbalance of air-fuel ratios among cylinders of a multi-cylinder internal combustion engine, which is equipped with a variable working angle mechanism of an intake valve, the detecting apparatus includes an abnormality detection portion that detects a parameter regarding rotational fluctuations of each of the cylinders and detects whether or not there is an abnormality of imbalance of air-fuel ratios among the cylinders. The abnormality detection portion refrains from determining that the air-fuel ratios are normal when the working angle at the time of detection of the parameter is within a predetermined large working angle range, and determines that the air-fuel ratios are normal when the working angle at the time of detection of the parameter is within a predetermined small working angle range that is on a small working angle side with respect to the large working angle range.Type: ApplicationFiled: November 28, 2012Publication date: May 30, 2013Inventors: Takashi Yui, Kota Hayashi, Tokiji Ito
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Patent number: 8330266Abstract: A semiconductor device includes: a first semiconductor device including an interconnect substrate having a cavity structure and a semiconductor element mounted on a bottom part of the cavity structure; and a second semiconductor device provided on and connected to the first semiconductor device via connection terminals. A sealing material is provided between the first semiconductor device and the second semiconductor device. A sloped portion is formed, at a corner portion at which the bottom part and a side wall of the cavity structure in the first semiconductor device meets, to be sloped toward a center part of the cavity structure and have a tapered shape which becomes continuously wider in the direction from an upper part to a lower part.Type: GrantFiled: March 10, 2010Date of Patent: December 11, 2012Assignee: Panasonic CorporationInventor: Takashi Yui
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Patent number: 8022305Abstract: A semiconductor device fabrication method includes: forming an elongated hole 5 in a wiring board plate along a perimeter line 3 of a plurality of wiring board regions defined over the wiring board plate with a connecting portion left unremoved at a corner of each of the wiring board regions; mounting semiconductor elements on the wiring board regions; and cutting the connecting portion using a punch 8 to isolate the wiring board regions from the wiring board plate into wiring boards. Each of the wiring boards has a cut edge formed by the punch, the cut edge starting from an end of the elongated hole 5 provided on a first side of the perimeter line 3 and extending across part of the connecting portion inside the perimeter line 3, the cut edge being angled inward of the wiring board so as to slope downward from the end of the elongated hole 5.Type: GrantFiled: April 23, 2009Date of Patent: September 20, 2011Assignee: Panasonic CorporationInventors: Takashi Yui, Atsushi Saiki