Abstract: A modified layer 5 and an altered layer 8 are formed outside a dicing point of a dicing area 3. Thus without forming another interface between different physical properties on the dicing point, it is possible to prevent chipping from progressing along a crystal orientation from an interface between a semiconductor element 2 and a semiconductor substrate 1 and from a surface of the semiconductor element during dicing, thereby suppressing the development of chipping to the semiconductor element.

Abstract: A pad (15) is provided on a surface connecting a first substrate (11) of a lower layer module with an upper layer module, the pad is partially covered by an insulating film (20) to form an opening section (3) exposing the pad (15), a first connection terminal (2) is formed on the lower surface of the first substrate (11) of the lower layer module, the planar shape of the opening section (3) is different from the planar shape of the first connection terminal (2), the outer shape of the opening section (3) is larger than the first connection terminal (2), and in a transmissive inspection from above, the shape of the lower end of a second connection terminal (30) spreading in the opening section (3) is not concealed by the other terminal. This configuration enables easy and reliable determination of whether bonding sections are satisfactory by a non-destructive inspection.

Abstract: An upper surface of a semiconductor substrate includes a first portion where a dielectric film is provided, and a second portion where the dielectric film is not provided, wherein the second portion is located in the periphery of the first portion. The upper surface of the semiconductor substrate is covered with a sealing resin.

Abstract: A semiconductor device includes: a first semiconductor device including an interconnect substrate having a cavity structure and a semiconductor element mounted on a bottom part of the cavity structure; and a second semiconductor device provided on and connected to the first semiconductor device via connection terminals. A sealing material is provided between the first semiconductor device and the second semiconductor device. A sloped portion is formed, at a corner portion at which the bottom part and a side wall of the cavity structure in the first semiconductor device meets, to be sloped toward a center part of the cavity structure and have a tapered shape which becomes continuously wider in the direction from an upper part to a lower part.

Abstract: A semiconductor device includes a multilayer wiring substrate having a plurality of inner wiring layers and a semiconductor chip mounted on the multilayer wiring substrate. The multilayer wiring substrate has a groove formed in the bottom surface. The groove does not reach the lowermost of the inner wiring layers.

Abstract: A semiconductor device fabrication method includes: forming an elongated hole 5 in a wiring board plate along a perimeter line 3 of a plurality of wiring board regions defined over the wiring board plate with a connecting portion left unremoved at a corner of each of the wiring board regions; mounting semiconductor elements on the wiring board regions; and cutting the connecting portion using a punch 8 to isolate the wiring board regions from the wiring board plate into wiring boards. Each of the wiring boards has a cut edge formed by the punch, the cut edge starting from an end of the elongated hole 5 provided on a first side of the perimeter line 3 and extending across part of the connecting portion inside the perimeter line 3, the cut edge being angled inward of the wiring board so as to slope downward from the end of the elongated hole 5.

Abstract: A stacked chip semiconductor device including: a substrate having electrode pads; a first semiconductor chip that is flip-chip-packaged on the substrate via a first adhesive layer; a second semiconductor chip that is mounted on an upper part of the first semiconductor chip and that has electrode pads; wires for electrically connecting the electrode pads of the second semiconductor chip and the electrode pads of the substrate; and a molded resin for encapsulating the first semiconductor chip, the second semiconductor chip and the wires, the first adhesive layer forming a fillet at the periphery of the first semiconductor chip. The first semiconductor chip is disposed with its central axis being offset from a central axis of the substrate, the offset being provided so that the first semiconductor chip is shifted toward a side opposite to a side where the fillet has a maximum length from the periphery of the first semiconductor chip.

Abstract: A modified layer 5 and an altered layer 8 are formed outside a dicing point of a dicing area 3. Thus without forming another interface between different physical properties on the dicing point, it is possible to prevent chipping from progressing along a crystal orientation from an interface between a semiconductor element 2 and a semiconductor substrate 1 and from a surface of the semiconductor element during dicing, thereby suppressing the development of chipping to the semiconductor element.

Abstract: A semiconductor device having a wiring substrate, a semiconductor element mounted on the wiring substrate via a heat sink, a wire electrically connecting the wiring substrate and the semiconductor element, the wiring substrate having through holes each connected to the wire or the heat sink, and external electrodes formed on a back surface of the wiring substrate and connected to the through holes. An insulating layer is formed between the heat sink and the semiconductor element, and the heat sink is divided into at least two sections. Hence, the back surface of the semiconductor element maintains an electrically disconnected state irrespective of the potential of the heat sink, and the heat dissipation design is allowed greater flexibility. Thus, the external electrodes connected to the heat sink via the through holes are connected to the mounting substrate wirings having satisfactory heat dissipation efficiency, allowing the heat of the semiconductor element to escape efficiently.

Abstract: A stacked chip semiconductor device including: a substrate having electrode pads; a first semiconductor chip that is flip-chip-packaged on the substrate via a first adhesive layer; a second semiconductor chip that is mounted on an upper part of the first semiconductor chip and that has electrode pads; wires for electrically connecting the electrode pads of the second semiconductor chip and the electrode pads of the substrate; and a molded resin for encapsulating the first semiconductor chip, the second semiconductor chip and the wires, the first adhesive layer forming a fillet at the periphery of the first semiconductor chip. The first semiconductor chip is disposed with its central axis being offset from a central axis of the substrate, the offset being provided so that the first semiconductor chip is shifted toward a side opposite to a side where the fillet has a maximum length from the periphery of the first semiconductor chip.

Abstract: A stacked chip semiconductor device including: a substrate having electrode pads; a first semiconductor chip that is flip-chip-packaged on the substrate via a first adhesive layer; a second semiconductor chip that is mounted on an upper part of the first semiconductor chip and that has electrode pads; wires for electrically connecting the electrode pads of the second semiconductor chip and the electrode pads of the substrate; and a molded resin for encapsulating the first semiconductor chip, the second semiconductor chip and the wires, the first adhesive layer forming a fillet at the periphery of the first semiconductor chip. The first semiconductor chip is disposed with its central axis being offset from a central axis of the substrate, the offset being provided so that the first semiconductor chip is shifted toward a side opposite to a side where the fillet has a maximum length from the periphery of the first semiconductor chip.

Abstract: A semiconductor device with excellent heat dissipation characteristics that can achieve a high reliability when mounted in electronic equipment such as a cellular phone or the like and a method for manufacturing the same are provided. The semiconductor device includes a substrate, a plurality of semiconductor chips mounted on the substrate by stacking one on top of another, and an encapsulation resin layer made of encapsulation resin. Among the plurality of semiconductor chips, a first semiconductor chip as an uppermost semiconductor chip is mounted with a surface thereof on which a circuit is formed facing toward the substrate, and the encapsulation resin layer is formed so that at least a surface of the first semiconductor chip opposite to the surface on which the circuit is formed and a part of side surfaces of the first semiconductor chip are exposed to the outside of the encapsulation resin layer.

Abstract: A semiconductor device having a wiring substrate, a semiconductor element mounted on the wiring substrate via a heat sink, a wire electrically connecting the wiring substrate and the semiconductor element, the wiring substrate having through holes each connected to the wire or the heat sink, and external electrodes formed on a back surface of the wiring substrate and connected to the through holes. An insulating layer is formed between the heat sink and the semiconductor element, and the heat sink is divided into at least two sections. Hence, the back surface of the semiconductor element maintains an electrically disconnected state irrespective of the potential of the heat sink, and the heat dissipation design is allowed greater flexibility. Thus, the external electrodes connected to the heat sink via the through holes are connected to the mounting substrate wirings having satisfactory heat dissipation efficiency, allowing the heat of the semiconductor element to escape efficiently.

Abstract: A semiconductor device and a manufacturing method for the same are provided wherein the reliability of connections of fine metal wires connecting a second semiconductor chip to a wiring board can be improved in the case wherein the second semiconductor chip, which is located above the lower, first semiconductor chip, is significantly larger than the first semiconductor chip in a configuration wherein two semiconductor chips are stacked and mounted on a wiring board. In this semiconductor device the rear surface of the first semiconductor chip and the rear surface of the second semiconductor chip are adhered to each other by means of adhesive and the side of the adhesive is inclined from the edge portions of the first semiconductor chip toward the portions of the second semiconductor chip extending from the side of the first semiconductor chip.

Abstract: A semiconductor device and a manufacturing method for the same are provided wherein the reliability of connections of fine metal wires connecting a second semiconductor chip to a wiring board can be improved in the case wherein the second semiconductor chip, which is located above the lower, first semiconductor chip, is significantly larger than the first semiconductor chip in a configuration wherein two semiconductor chips are stacked and mounted on a wiring board. In this semiconductor device the rear surface of the first semiconductor chip and the rear surface of the second semiconductor chip are adhered to each other by means of adhesive and the side of the adhesive is inclined from the edge portions of the first semiconductor chip toward the portions of the second semiconductor chip extending from the side of the first semiconductor chip.

Abstract: An controller detects a change in a load generation state of an accessory device that generates a load on the internal combustion engine during operation, and the controller in turn controls a variable valve mechanism to change at least one of an operation angle and a valve lift of an intake valve of the internal combustion engine, as well as changing an amount of an intake air drawn into the internal combustion engine, in response to the detected change in the load generation state of the accessory device.

Abstract: A semiconductor device includes: a wiring board; a first semiconductor chip, which has a circuitry side and a non-circuitry side that face each other vertically and which is electrically connected to the wiring board via a raised electrode, the circuitry side of the first chip facing the principal surface of the wiring board; and a second semiconductor chip, which has a circuitry side and a non-circuitry side that face each other vertically and which includes an external electrode on the circuitry side thereof. The non-circuitry sides of the first and second semiconductor chips are secured to each other. The external electrode of the second semiconductor chip is connected to the wiring board via a metal fine wire. The external and raised electrodes are so disposed as not to overlap each other as viewed vertically downward from over the principal surface of the wiring board.

Abstract: A semiconductor device has a substrate having electrode pads, a first semiconductor chip mounted on the substrate with a first adhesion layer interposed therebetween, a second semiconductor chip mounted on the first semiconductor chip with a second adhesion layer interposed therebetween and having electrode pads on the upper surface thereof, wires for bonding the electrode pads of the substrate and the electrode pads of the second semiconductor chip to each other, and a mold resin sealing therein the first and second semiconductor chips and the wires. The peripheral edge portion of the first adhesion layer is protruding outwardly from the first semiconductor chip and the peripheral edge portion of the second semiconductor chip is protruding outwardly beyond the peripheral edge portion of the first semiconductor chip.

Abstract: A semiconductor device and a manufacturing method for the same are provided wherein the reliability of connections of fine metal wires connecting a second semiconductor chip to a wiring board can be improved in the case wherein the second semiconductor chip, which is located above the lower, first semiconductor chip, is significantly larger than the first semiconductor chip in a configuration wherein two semiconductor chips are stacked and mounted on a wiring board. In this semiconductor device the rear surface of the first semiconductor chip and the rear surface of the second semiconductor chip are adhered to each other by means of adhesive and the side of the adhesive is inclined from the edge portions of the first semiconductor chip toward the portions of the second semiconductor chip extending from the side of the first semiconductor chip.

Abstract: A semiconductor device has a substrate having electrode pads, a first semiconductor chip mounted on the substrate with a first adhesion layer interposed therebetween, a second semiconductor chip mounted on the first semiconductor chip with a second adhesion layer interposed therebetween and having electrode pads on the upper surface thereof, wires for bonding the electrode pads of the substrate and the electrode pads of the second semiconductor chip to each other, and a mold resin sealing therein the first and second semiconductor chips and the wires. The peripheral edge portion of the first adhesion layer is protruding outwardly from the first semiconductor chip and the peripheral edge portion of the second semiconductor chip is protruding outwardly beyond the peripheral edge portion of the first semiconductor chip.