Patents by Inventor Takasuke Hashimoto

Takasuke Hashimoto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20030001235
    Abstract: A semiconductor device includes a SiGe base bipolar transistor. The SiGe base bipolar transistor includes an emitter layer, a collector layer and a SiGe base layer formed of silicon containing germanium. A Ge concentration of the SiGe base layer is increased from 0% to 10% from a side of the emitter layer towards a side of the collector layer.
    Type: Application
    Filed: August 29, 2002
    Publication date: January 2, 2003
    Applicant: NEC CORPORATION
    Inventor: Takasuke Hashimoto
  • Patent number: 6337251
    Abstract: In a method of manufacturing a semiconductor device, a first insulating film is formed on a semiconductor substrate, a first conductive film is formed on the first insulating film, and a second insulating film is formed on the first conductive film. An opening is formed to the semiconductor substrate through the second insulting film, the first conductive film and the first insulting film to expose a portion of a surface of the semiconductor substrate and a portion of a surface of the first conductive film. The exposed surface portion of the first conductive film is covered by a covering film. Thermal treatment is carried out to clean the exposed surface portion of the semiconductor substrate. A spacer film is formed in the opening on the exposed surface portion of the semiconductor substrate, and then the covering film is removed. Subsequently, an electrode film is formed on the spacer film.
    Type: Grant
    Filed: March 29, 2000
    Date of Patent: January 8, 2002
    Assignee: NEC Corporation
    Inventor: Takasuke Hashimoto
  • Publication number: 20010052634
    Abstract: A semiconductor device includes a SiGe base bipolar transistor. The SiGe base bipolar transistor includes an emitter layer, a collector layer and a SiGe base layer formed of silicon containing germanium. A Ge concentration of the SiGe base layer is increased from 0% to 10% from a side of the emitter layer towards a side of the collector layer.
    Type: Application
    Filed: May 25, 2001
    Publication date: December 20, 2001
    Applicant: NEC CORPORATION
    Inventor: Takasuke Hashimoto
  • Patent number: 6087675
    Abstract: The present invention relates to a contact window structure having an insulation layer extending over an electrically conductive region. The insulation layer further has a plurality of contact windows which are filled with electrically conductive layers so that the electrically conductive layers are made into contact with the electrically conductive region so as to allow a contact portion of a probe to contact with at least one of the electrically conductive layers within the contact windows, wherein adjacent two of the contact windows are distanced from each other by a distance which is substantially equal to or narrower than a diameter of the contact portion of the probe, whereby the contact portion of the probe is necessarily made into contact with at least any one of the electrically conductive layers within the contact windows. There is no possibility that the contact portion of the probe is not made into contact with any electrically conductive layers.
    Type: Grant
    Filed: April 30, 1998
    Date of Patent: July 11, 2000
    Assignee: NEC Corporation
    Inventor: Takasuke Hashimoto
  • Patent number: 6028344
    Abstract: A bipolar transistor formed on a SOI substrate has a buried collector layer underlying an emitter region and a collector contact region for connection thereof, both of which are made of a doped polysilicon film deposited in a removed portion of an oxide film etched by wet etching and a collector contact groove, respectively. By reducing the area of the buried collector layer, the bipolar transistor has excellent frequency characteristics in a high-frequency range.
    Type: Grant
    Filed: February 26, 1998
    Date of Patent: February 22, 2000
    Assignee: NEC Corporation
    Inventor: Takasuke Hashimoto
  • Patent number: 6001711
    Abstract: Phosphorous ion is implanted into an SOI substrate under the conditions that the concentration is maximized in the upper silicon layer of the SOI substrate so as to forming a heavily-doped damaged layer, and the heavily-doped damaged layer is partially cured through a lamp annealing so as to concurrently form a heavily-doped buried layer and a gettering site layer.
    Type: Grant
    Filed: March 9, 1998
    Date of Patent: December 14, 1999
    Assignee: NEC Corporation
    Inventor: Takasuke Hashimoto
  • Patent number: 5856702
    Abstract: The invention relates to a polysilicon resistor made by forming a film of polysilicon doped with an impurity on a dielectric film on a semiconductor substrate and patterning the polysilicon film. An object of the invention is to provide a polysilicon resistor which has a low resistance value and occupies a small area. A slot is formed in the dielectric film and is filled with the polysilicon film. The dielectric film and the patterned polysilicon film are overlaid with a second dielectric film, and a pair of contact windows are opened in the second dielectric film such that each contact window is partly over an end section of the slot. A plurality of parallel slots can be formed in the first dielectric film to further lower the resistance value or to further reduce the area of the patterned polysilicon film. As an alternative, at least one slot is formed in the substrate and is filled with a polysilicon film after depositing a dielectric film on the substrate surface including the surfaces in the slot(s).
    Type: Grant
    Filed: April 18, 1997
    Date of Patent: January 5, 1999
    Assignee: NEC Corporation
    Inventor: Takasuke Hashimoto
  • Patent number: 5557118
    Abstract: A hetero-junction type bipolar transistor has an SiGe layer as a base layer and an SiC layer as an emitter layer. Between the SiGe layer and the SiC layer of the hetero-junction bipolar transistor, a monocrystalline layer having a lattice constant between the lattice constant of SiGe and that of SiC.
    Type: Grant
    Filed: November 30, 1994
    Date of Patent: September 17, 1996
    Assignee: NEC Corporation
    Inventor: Takasuke Hashimoto
  • Patent number: 5523614
    Abstract: A semiconductor device includes an n-type low-resistance region (2) formed on a p-type monocrystalline semiconductor substrate (1), an n-type epitaxial layer (3) formed on the n-type low-resistance region (2), an insulating film (5) formed on the n-type epitaxial layer (3) and having a first opening selectively formed therein, and an n-type polysilicon film (8) having an overhung portion extending from the entire peripheral portion of the opening to the inside of the opening. An n-type polysilicon film (9) is formed downward from the bottom surface of the overhung portion, and a p-type monocrystalline silicon film (6) serving as a base is formed on the surface of the n-type epitaxial layer in the first opening. The base (6) is in contact with the n-type polysilicon films (8, 9), and the n-type emitter (10) is formed immediately below the n-type emitter polysilicon films (8, 9) to have an annular shape.
    Type: Grant
    Filed: December 13, 1994
    Date of Patent: June 4, 1996
    Assignee: NEC Corporation
    Inventor: Takasuke Hashimoto
  • Patent number: 5475257
    Abstract: The invention is a semiconductor device having a metal-semiconductor contact structure. The device includes a metal region having such a high conductivity as to serve as a contact plug. The device also includes a first semiconductor region having a first band gap and being so doped with one conductive type dopant as to exhibit a high conductivity. The device also includes a semiconductor film having a second band gap wider than the first band gap. The semiconductor film is in contact at its opposite surfaces with a part of the metal region and a part of the first semiconductor region respectively. The semiconductor film is doped with the one conductive type dopant so heavily as to suppress electrical current flow between the part of the metal region and the part of the first semiconductor region through the semiconductor film. The semiconductor film comprises amorphous silicon or poly-crystalline silicon.
    Type: Grant
    Filed: October 27, 1994
    Date of Patent: December 12, 1995
    Assignee: NEC Corporation
    Inventors: Takasuke Hashimoto, Tsutomu Tashiro
  • Patent number: 5438014
    Abstract: A polycrystalline silicon film pattern 3 having a thickness of below 120 nm is formed on a silicon oxide film 2 provided on the principal surface of a silicon substrate 1. The polycrystalline silicon film pattern 3 is covered with a boron silicate glass film 4. By heat treatment, boron is diffused from the boron silicate glass film 4 to the polycrystalline silicon film pattern 3 to form a polycrystalline silicon resistance element 5 containing boron at a density of above 1.times.10.sup.19 atoms/cm.sup.3. As a result, the temperature coefficient of the resistance element 5 comprising the polycrystalline film can be reduced.
    Type: Grant
    Filed: December 14, 1994
    Date of Patent: August 1, 1995
    Assignee: NEC Corporation
    Inventor: Takasuke Hashimoto