Abstract: According to one embodiment, a semiconductor storage device includes a first memory cell capable of storing n-bit data (n is a natural number not less than 4). When receiving first data, including first and second bits of the n-bit data, from a controller, the semiconductor storage device writes the received first data to the first memory cell. After receiving the first data, when the semiconductor storage device receives second data including third and fourth bits of the n-bit data, the semiconductor storage device reads the first and second bits from the first memory cell and writes the n-bit data to the first memory cell based on the read first and second bits and the received second data.

Abstract: According to one embodiment, a semiconductor storage device includes a first memory cell capable of storing n-bit data (n is a natural number not less than 4). When receiving first data, including first and second bits of the n-bit data, from a controller, the semiconductor storage device writes the received first data to the first memory cell. After receiving the first data, when the semiconductor storage device receives second data including third and fourth bits of the n-bit data, the semiconductor storage device reads the first and second bits from the first memory cell and writes the n-bit data to the first memory cell based on the read first and second bits and the received second data.

Abstract: According to one embodiment, a semiconductor storage device includes a first memory cell capable of storing n-bit data (n is a natural number not less than 4). When receiving first data, including first and second bits of the n-bit data, from a controller, the semiconductor storage device writes the received first data to the first memory cell. After receiving the first data, when the semiconductor storage device receives second data including third and fourth bits of the n-bit data, the semiconductor storage device reads the first and second bits from the first memory cell and writes the n-bit data to the first memory cell based on the read first and second bits and the received second data.

Abstract: According to one embodiment, a semiconductor storage device includes a first memory cell capable of storing n-bit data (n is a natural number not less than 4). When receiving first data, including first and second bits of the n-bit data, from a controller, the semiconductor storage device writes the received first data to the first memory cell. After receiving the first data, when the semiconductor storage device receives second data including third and fourth bits of the n-bit data, the semiconductor storage device reads the first and second bits from the first memory cell and writes the n-bit data to the first memory cell based on the read first and second bits and the received second data.

Abstract: Provided is a formulation that can improve all of transdermal absorbability of an active ingredient, immediate effect in transdermal absorption, and reduction of skin irritation, to high levels. A formulation containing: a base; and a core-shell structure having a core portion containing an active ingredient and a shell portion containing a surfactant; in which the core portion is a solid, the surfactant contains a compound having two or more fatty acid bonds and a compound having one fatty acid bond, and a proportion of the compound having two or more fatty acid bonds in the surfactant is 5% by weight or more and 75% by weight or less.

Abstract: Provided is a core-shell structure that can achieve both improvement in transdermal absorption of an active ingredient and reduction in skin irritation at a high level. A core-shell structure 10 includes: a core portion 11 containing an active ingredient, the core portion being solid; and a shell portion 12 containing both a first surfactant having a melting point of less than 35° C. and a second surfactant having a melting point of 35° C. or more, the first surfactant and the second surfactant each having an HLB value of 4 to 14, the first surfactant and the second surfactant each containing at least one selected from the group consisting of sorbitan fatty acid esters, glycerin fatty acid esters, propylene glycol fatty acid esters, and fatty acid alkanolamides.

Abstract: A memory system of an embodiment includes a memory device including a first set of cell transistors and a second set of cell transistors; and a controller configured to transmit to the memory device a first instruction and transmit to the memory device a second instruction after reception of a first request without receiving the first request again. The first instruction instructs parallel reads from the first and second sets of cell transistors, and the second instruction instructs a read from the first set of cell transistors.

Abstract: According to one embodiment, a semiconductor storage device includes a first memory cell capable of storing n-bit data (n is a natural number not less than 4). When receiving first data, including first and second bits of the n-bit data, from a controller, the semiconductor storage device writes the received first data to the first memory cell. After receiving the first data, when the semiconductor storage device receives second data including third and fourth bits of the n-bit data, the semiconductor storage device reads the first and second bits from the first memory cell and writes the n-bit data to the first memory cell based on the read first and second bits and the received second data.

Abstract: According to one embodiment, a semiconductor storage device includes a first memory cell capable of storing n-bit data (n is a natural number not less than 4). When receiving first data, including first and second bits of the n-bit data, from a controller, the semiconductor storage device writes the received first data to the first memory cell. After receiving the first data, when the semiconductor storage device receives second data including third and fourth bits of the n-bit data, the semiconductor storage device reads the first and second bits from the first memory cell and writes the n-bit data to the first memory cell based on the read first and second bits and the received second data.

Abstract: Provided is an adhesive composition capable of improving both the transdermal absorbability of the active ingredient and adhesive properties such as holding power. An adhesive composition containing: a core-shell structure including a core portion containing an active ingredient, and a shell portion covering at least part of a surface of the core portion and containing a surfactant; a first elastomer; and a second elastomer different from the first elastomer, the adhesive composition having a difference between the SP value of the first elastomer and the SP value of the second elastomer of 0.1 or more and 3.0 or less.

Abstract: Provided is an external skin preparation capable of enhancing permeability of an active ingredient into parts of the epidermis located below the stratum corneum and the dermis even when a poorly water-soluble active ingredient is used. There is provided an external skin preparation containing a core-shell structure, comprising a core portion containing a poorly water-soluble active ingredient and a solubilizing agent, and a shell portion containing a surfactant. The solubilizing agent is at least one selected from the group consisting of cyclodextrin, methyl-cyclodextrin, dimethyl-cyclodextrin, 2-hydroxypropyl-cyclodextrin, hydroxyethyl-cyclodextrin, sulfobutyl ether-cyclodextrin, glucosyl-cyclodextrin, maltosyl-cyclodextrin and cluster dextrin. The surfactant is at least one selected from the group consisting of glycerol fatty acid esters, sorbitan fatty acid esters, propylene glycol fatty acid esters and fatty acid alkanolamides.

Abstract: A memory system of an embodiment includes a memory device including a first set of cell transistors and a second set of cell transistors; and a controller configured to transmit to the memory device a first instruction and transmit to the memory device a second instruction after reception of a first request without receiving the first request again. The first instruction instructs parallel reads from the first and second sets of cell transistors, and the second instruction instructs a read from the first set of cell transistors.

Abstract: A memory system of an embodiment includes a memory device including a first set of cell transistors and a second set of cell transistors; and a controller configured to transmit to the memory device a first instruction and transmit to the memory device a second instruction after reception of a first request without receiving the first request again. The first instruction instructs parallel reads from the first and second sets of cell transistors, and the second instruction instructs a read from the first set of cell transistors.

Abstract: Provided is a core-shell structure having an excellent immediate effect in transdermal absorption of an active ingredient. A core-shell structure comprising a core portion containing an active ingredient, and a shell portion containing a surfactant having an HLB value of 4 to 14, the core portion being solid, and the surfactant containing a saturated hydrocarbon group having 7 to 15 carbon atoms or an unsaturated hydrocarbon group having 7 to 17 carbon atoms.

Abstract: Provided is an external skin preparation capable of enhancing permeability of an active ingredient into parts of the epidermis located below the stratum corneum and the dermis even when a poorly water-soluble active ingredient is used. There is provided an external skin preparation comprising a poorly water-soluble active ingredient and a solubilizing agent, wherein the solubilizing agent is at least one selected from the group consisting of water-soluble polymers, water-soluble saccharides, water-soluble surfactants and aromatic carboxylic acids.

Abstract: A particle comprising a first fraction containing an active ingredient and a second fraction containing a surfactant, and having a number average particle diameter of from 1 to 100 nm.

Abstract: According to one embodiment, a semiconductor storage device includes a first memory cell capable of storing n-bit data (n is a natural number not less than 4). When receiving first data, including first and second bits of the n-bit data, from a controller, the semiconductor storage device writes the received first data to the first memory cell. After receiving the first data, when the semiconductor storage device receives second data including third and fourth bits of the n-bit data, the semiconductor storage device reads the first and second bits from the first memory cell and writes the n-bit data to the first memory cell based on the read first and second bits and the received second data.

Abstract: According to one embodiment, a semiconductor storage device includes a first memory cell capable of storing n-bit data (n is a natural number not less than 4). When receiving first data, including first and second bits of the n-bit data, from a controller, the semiconductor storage device writes the received first data to the first memory cell. After receiving the first data, when the semiconductor storage device receives second data including third and fourth bits of the n-bit data, the semiconductor storage device reads the first and second bits from the first memory cell and writes the n-bit data to the first memory cell based on the read first and second bits and the received second data.

Abstract: The present invention provides a core-shell structure having high skin permeability. The core-shell structure includes a core portion containing a hydrophilic drug having a molecular weight of 400 or more; and a shell portion containing a surfactant, and the core portion is a solid, the hydrophilic drug has a water-octanol partition coefficient of ?3 or more and 6 or less, the surfactant has an alkyl group or an alkenyl group having 10 to 20 carbon atoms, and a mass ratio between the hydrophilic drug and the surfactant (hydrophilic drug:surfactant) is 1:5 to 1:20.

Abstract: Problem to be Solved There is provided a formulation including a particle containing an active ingredient and a surfactant, wherein morphological stability is excellent. Solution A particle containing an active ingredient, a surfactant and a pH adjuster.