Patents by Inventor Takayuki Igarashi

Takayuki Igarashi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240128248
    Abstract: A semiconductor device includes an insulating substrate and an upper inductor that is formed on the insulating substrate and is a component of a transformer that performs contactless communication between different potentials. Here, the upper inductor is configured to be applied with a first potential. The upper inductor is formed so as to be magnetically coupled to a lower inductor that is configured to be applied with a second potential different from the first potential.
    Type: Application
    Filed: August 4, 2023
    Publication date: April 18, 2024
    Inventors: Yasutaka NAKASHIBA, Hiroshi MIYAKI, Takayuki IGARASHI
  • Publication number: 20240105761
    Abstract: A semiconductor chip includes a transformer that performs contactless communication between different potentials. The semiconductor chip includes a semiconductor substrate, a semiconductor region formed in an upper surface of the semiconductor substrate, and the transformer formed over the semiconductor substrate. Here, the transformer includes a lower inductor, a lead wiring portion electrically connected to the lower inductor, and an upper inductor 100 magnetically coupled to the lower inductor, and the lead wiring portion has a wiring facing the semiconductor region.
    Type: Application
    Filed: July 25, 2023
    Publication date: March 28, 2024
    Inventors: Takayuki IGARASHI, Yasutaka NAKASHIBA
  • Publication number: 20240096788
    Abstract: A semiconductor chip includes a lower wiring layer, a multilayer wiring layer formed on the lower wiring layer, and an upper wiring layer formed on the multilayer wiring layer. Here, a thickness of a wiring provided in the lower wiring layer is larger than a thickness of each of a plurality of wirings provided in the multilayer wiring layer, and a thickness of a wiring provided in the upper wiring layer is larger than the thickness of each of the plurality of wirings provided in the multilayer wiring layer. A lower inductor which is a component of a transformer is provided in the lower wiring layer, and an upper inductor which is a component of the transformer is provided in the upper wiring layer.
    Type: Application
    Filed: June 29, 2023
    Publication date: March 21, 2024
    Inventors: Takayuki IGARASHI, Tatsuo KASAOKA, Yasutaka NAKASHIBA
  • Publication number: 20240088332
    Abstract: A light emitting device includes: a substrate; a light emitting element; a wavelength conversion layer; and a wall surrounding the wavelength conversion layer, having an opening portion exposing at least a part of a top surface of the wavelength conversion layer, and containing a light reflective material. The surface of the wall includes a top surface provided at a higher position than the top surface of the wavelength conversion layer, and an inner surface forming the opening portion. The wall includes a first portion surrounding the wavelength conversion layer, and a second portion provided over the first portion and surrounding the first portion. The opening portion is hollow. An angle of a corner portion between the top surface and the inner surface of the wall is in a range of 90 degrees or greater and less than 180 degrees.
    Type: Application
    Filed: November 16, 2023
    Publication date: March 14, 2024
    Inventors: Hiroshi MIYAIRI, Yoshimi KATSUMOTO, Takayuki IGARASHI, Yoshifumi HODONO, Shinya ENDO
  • Patent number: 11926323
    Abstract: A vehicle controller includes: an engine controller configured to perform an IS control upon satisfaction of a predetermined stop condition and an engine restart control upon satisfaction of a predetermined restart condition; an HDC controller configured to perform, when the vehicle is traveling on a downhill road and a deceleration request according to an HDC control occurs, a target vehicle speed-based deceleration irrespective of brake operations by the driver; and an information acquisition part configured to acquire progress status information related to the engine restart control and including information on initiation and completion thereof.
    Type: Grant
    Filed: December 1, 2021
    Date of Patent: March 12, 2024
    Assignee: HONDA MOTOR CO., LTD.
    Inventors: Takahito Yoshida, Yoshinari Sugita, Rei Okubo, Hidetoshi Kobori, Shumpei Tahara, Shun Igarashi, Takuya Sato, Takayuki Matsuyoshi
  • Publication number: 20240014067
    Abstract: A semiconductor device having a semiconductor substrate, a BOX film on the semiconductor substrate, a semiconductor layer on the BOX film, a first trench penetrated through the semiconductor layer and reached to the first insulating film, a first insulating film covering a side surface of the first trench and in contact with an upper surface of the BOX film at a bottom of the first trench, a second trench formed at the bottom of the first trench such that the second trench penetrates through the first insulating film and reached in the BOX film, a second insulating film filled in the first trench and the second trench. A bottom surface of the second trench is located in the BOX film below an interface between the semiconductor layer and the BOX film, and a void is located in the second insulating film at the same height the interface.
    Type: Application
    Filed: May 17, 2023
    Publication date: January 11, 2024
    Inventors: Hiroyuki ARIE, Takayuki IGARASHI
  • Patent number: 11862760
    Abstract: A light emitting device includes: a substrate; a light emitting element; a wavelength conversion layer; and a wall surrounding the wavelength conversion layer, having an opening portion exposing at least a part of a top surface of the wavelength conversion layer, and containing a light reflective material. The surface of the wall includes a top surface provided at a higher position than the top surface of the wavelength conversion layer, and an inner surface forming the opening portion. The wall includes a first portion surrounding the wavelength conversion layer, and a second portion provided over the first portion and surrounding the first portion. The opening portion is hollow. An angle of a corner portion between the top surface and the inner surface of the wall is in a range of 90 degrees or greater and less than 180 degrees.
    Type: Grant
    Filed: January 21, 2021
    Date of Patent: January 2, 2024
    Assignee: NICHIA CORPORATION
    Inventors: Hiroshi Miyairi, Yoshimi Katsumoto, Takayuki Igarashi, Yoshifumi Hodono, Shinya Endo
  • Publication number: 20230335487
    Abstract: An inductor to which a first potential is applied is surrounded by a first wiring connected with the inductor, and a pad connected with a second wiring, to which a second potential different from the first potential is applied, is disposed outside the second wiring such that the first wiring is surrounded by the second wiring.
    Type: Application
    Filed: February 27, 2023
    Publication date: October 19, 2023
    Inventors: Yasutaka NAKASHIBA, Takayuki IGARASHI
  • Publication number: 20230228671
    Abstract: A rectangular cell is a bottomed rectangular cell mounted in a photometric analyzer, and has an opening at a top end face for accommodating a test sample to be analyzed. The rectangular cell has a low flat area that is lower than an upper flat area on an inner face on a lower side of an outer face of a wall surface through which a measurement light from the analyzer is transmitted when the rectangular cell is mounted in the analyzer. This low area extends substantially over the entire width in the horizontal direction. When the rectangular cell is mounted in a recess in the photometric analyzer, an area through which the measurement light passes in the rectangular cell is not damaged by dust, even if fine hard dust adheres to the side surface of the recess. Further, the low region can have a mirror-finished surface by polishing.
    Type: Application
    Filed: October 15, 2019
    Publication date: July 20, 2023
    Inventors: Kenji YUASA, Takayuki IGARASHI
  • Patent number: 11670743
    Abstract: A light emitting device includes: a substrate; a plurality of light emitting elements mounted on the substrate; a covering member disposed on the substrate between adjacent ones of the light emitting elements such that an upper surface of the covering member is substantially coplanar with upper surfaces of the light emitting elements, wherein the covering member is a molded body containing an inorganic material powder and a binder; and a light transmissive member disposed on or above the plurality of light emitting elements.
    Type: Grant
    Filed: August 7, 2020
    Date of Patent: June 6, 2023
    Assignee: NICHIA CORPORATION
    Inventor: Takayuki Igarashi
  • Publication number: 20230072941
    Abstract: A light-emitting device includes a substrate, a light-emitting element provided on the substrate, the light-emitting element being configured to emit a first light, a wavelength conversion layer provided on the light-emitting element and containing a plurality of wavelength conversion particles configured to convert a wavelength of a part of the first light and to emit a second light, a light-transmissive plate provided above the wavelength conversion layer, and a wall including a light-reflective material, the wall surrounding the wavelength conversion layer and the light-transmissive plate and being in contact with a lateral surface of the light-transmissive plate at an inner surface of the wall. An upper portion of the wavelength conversion layer includes protrusions and recesses defined by the plurality of wavelength conversion particles. The wavelength conversion layer and the light-transmissive plate define an air layer therebetween.
    Type: Application
    Filed: February 5, 2021
    Publication date: March 9, 2023
    Inventors: Hiroshi MIYAIRI, Takayuki IGARASHI, Shinya ENDO, Yoshifumi HODONO, Yoshimi KATSUMOTO
  • Patent number: 11562989
    Abstract: A light-emitting device includes: a substrate; a plurality of light-emitting elements mounted to the substrate; and a phosphor layer provided on the plurality of light-emitting elements, the phosphor layer including: a plurality of phosphor particles, and a glass layer covering surfaces of the phosphor particles, wherein the phosphor particles are bonded to each other by the glass layer, and an air layer is formed between the phosphor particles.
    Type: Grant
    Filed: September 24, 2019
    Date of Patent: January 24, 2023
    Assignee: NICHIA CORPORATION
    Inventor: Takayuki Igarashi
  • Publication number: 20230010383
    Abstract: A semiconductor device including an element isolation in a trench formed in an upper surface of a semiconductor substrate, a trench isolation including a void in a trench directly under the element isolation, and a Cu wire with Cu ball connected to a pad on the semiconductor substrate, is formed. The semiconductor device has a circular trench isolation arrangement prohibition region that overlaps the end portion of the Cu ball in plan view, and the trench isolation is separated from the trench isolation arrangement prohibition region in plan view.
    Type: Application
    Filed: June 8, 2022
    Publication date: January 12, 2023
    Inventors: Takayuki IGARASHI, Hirokazu SAYAMA
  • Publication number: 20210265536
    Abstract: A light emitting device includes: a substrate; a light emitting element; a wavelength conversion layer; and a wall surrounding the wavelength conversion layer, having an opening portion exposing at least a part of a top surface of the wavelength conversion layer, and containing a light reflective material. The surface of the wall includes a top surface provided at a higher position than the top surface of the wavelength conversion layer, and an inner surface forming the opening portion. The wall includes a first portion surrounding the wavelength conversion layer, and a second portion provided over the first portion and surrounding the first portion. The opening portion is hollow. An angle of a corner portion between the top surface and the inner surface of the wall is in a range of 90 degrees or greater and less than 180 degrees.
    Type: Application
    Filed: January 21, 2021
    Publication date: August 26, 2021
    Inventors: Hiroshi MIYAIRI, Yoshimi KATSUMOTO, Takayuki IGARASHI, Yoshifumi HODONO, Shinya ENDO
  • Publication number: 20210043810
    Abstract: A light emitting device includes: a substrate; a plurality of light emitting elements mounted on the substrate; a covering member disposed on the substrate between adjacent ones of the light emitting elements such that an upper surface of the covering member is substantially coplanar with upper surfaces of the light emitting elements, wherein the covering member is a molded body containing an inorganic material powder and a binder; and a light transmissive member disposed on or above the plurality of light emitting elements.
    Type: Application
    Filed: August 7, 2020
    Publication date: February 11, 2021
    Applicant: NICHIA CORPORATION
    Inventor: Takayuki IGARASHI
  • Patent number: 10916500
    Abstract: Reliability of a semiconductor device is improved. The semiconductor device includes a silicon pattern for a fuse element, a metal silicide layer formed on an upper surface and a side surface of the silicon pattern, a gate electrode for MISFET, and a metal silicide layer formed on an upper surface of the gate electrode. The height from the lower surface of the silicon pattern to the lower end of the metal silicide layer is lower than the height from the lower surface of the gate electrode to the lower end of the metal silicide layer.
    Type: Grant
    Filed: July 26, 2019
    Date of Patent: February 9, 2021
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventors: Tomohiko Aika, Takayuki Igarashi, Takehiro Ochi
  • Publication number: 20200098733
    Abstract: A light-emitting device includes: a substrate; a plurality of light-emitting elements mounted to the substrate; and a phosphor layer provided on the plurality of light-emitting elements, the phosphor layer including: a plurality of phosphor particles, and a glass layer covering surfaces of the phosphor particles, wherein the phosphor particles are bonded to each other by the glass layer, and an air layer is formed between the phosphor particles.
    Type: Application
    Filed: September 24, 2019
    Publication date: March 26, 2020
    Applicant: NICHIA CORPORATION
    Inventor: Takayuki IGARASHI
  • Publication number: 20200051913
    Abstract: Reliability of a semiconductor device is improved. The semiconductor device includes a silicon pattern for a fuse element, a metal silicide layer formed on an upper surface and a side surface of the silicon pattern, a gate electrode for MISFET, and a metal silicide layer formed on an upper surface of the gate electrode. The height from the lower surface of the silicon pattern to the lower end of the metal silicide layer is lower than the height from the lower surface of the gate electrode to the lower end of the metal silicide layer.
    Type: Application
    Filed: July 26, 2019
    Publication date: February 13, 2020
    Inventors: Tomohiko AIKA, Takayuki IGARASHI, Takehiro OCHI
  • Patent number: 10483199
    Abstract: Characteristics of a semiconductor device are improved. A semiconductor device includes a coil CL1 and a wiring M2 formed on an interlayer insulator IL2, a wiring M3 formed on an interlayer insulator IL3, and a coil CL2 and a wiring M4 formed on the interlayer insulator IL4. Moreover, a distance DM4 between the coil CL2 and the wiring M4 is longer than a distance DM3 between the coil CL2 and the wiring M3 (DM4>DM3). Furthermore, the distance DM3 between the coil CL2 and the wiring M3 is set to be longer than a sum of a film thickness of the interlayer insulator IL3 and a film thickness of the interlayer insulator IL4, which are positioned between the coil CL1 and the coil CL2. In this manner, it is possible to improve an insulation withstand voltage between the coil CL2 and the wiring M4 or the like, where a high voltage difference tend to occur.
    Type: Grant
    Filed: July 30, 2018
    Date of Patent: November 19, 2019
    Assignee: Renesas Electronics Corporation
    Inventors: Takayuki Igarashi, Takuo Funaya
  • Patent number: 10176985
    Abstract: The method includes the steps of: storing slurry containing optical matter particles into a slurry tank; stirring the slurry inside the slurry tank by causing a bubble producing unit arranged below a liquid surface of the slurry to produce bubbles; and spraying the slurry onto a coating target including a light emitting element from a nozzle arranged above the coating target.
    Type: Grant
    Filed: December 26, 2017
    Date of Patent: January 8, 2019
    Assignees: NICHIA CORPORATION, MTEK-SMART CORPORATION
    Inventors: Takayuki Igarashi, Masafumi Matsunaga