Patents by Inventor Takayuki Igarashi
Takayuki Igarashi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20180337124Abstract: Characteristics of a semiconductor device are improved. A semiconductor device includes a coil CL1 and a wiring M2 formed on an interlayer insulator IL2, a wiring M3 formed on an interlayer insulator IL3, and a coil CL2 and a wiring M4 formed on the interlayer insulator IL4. Moreover, a distance DM4 between the coil CL2 and the wiring M4 is longer than a distance DM3 between the coil CL2 and the wiring M3 (DM4>DM3). Furthermore, the distance DM3 between the coil CL2 and the wiring M3 is set to be longer than a sum of a film thickness of the interlayer insulator IL3 and a film thickness of the interlayer insulator IL4, which are positioned between the coil CL1 and the coil CL2. In this manner, it is possible to improve an insulation withstand voltage between the coil CL2 and the wiring M4 or the like, where a high voltage difference tend to occur.Type: ApplicationFiled: July 30, 2018Publication date: November 22, 2018Inventors: Takayuki IGARASHI, Takuo FUNAYA
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Patent number: 10128125Abstract: A semiconductor device including: a semiconductor substrate; a first coil formed on the semiconductor substrate via a first insulation film; a second insulation film formed on the semiconductor substrate so as to cover the first insulation film and the first coil; a first pad formed on the second insulation film and disposed at a position not overlapped with the first coil in a planar view; a laminated insulation film formed on the second insulation film, the laminated insulation film having a first opening from which the first pad is exposed; a second coil formed on the laminated insulation film and disposed above the first coil; and a first wiring formed on the laminated insulation film including an upper portion of the first pad exposed from the first opening, the first wiring being electrically connected to the first pad.Type: GrantFiled: October 20, 2017Date of Patent: November 13, 2018Assignee: RENESAS ELECTRONICS CORPORATIONInventors: Takuo Funaya, Takayuki Igarashi
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Patent number: 10062642Abstract: Characteristics of a semiconductor device are improved. A semiconductor device includes a coil CL1 and a wiring M2 formed on an interlayer insulator IL2, a wiring M3 formed on an interlayer insulator IL3, and a coil CL2 and a wiring M4 formed on the interlayer insulator IL4. Moreover, a distance DM4 between the coil CL2 and the wiring M4 is longer than a distance DM3 between the coil CL2 and the wiring M3 (DM4>DM3). Furthermore, the distance DM3 between the coil CL2 and the wiring M3 is set to be longer than a sum of a film thickness of the interlayer insulator IL3 and a film thickness of the interlayer insulator IL4, which are positioned between the coil CL1 and the coil CL2. In this manner, it is possible to improve an insulation withstand voltage between the coil CL2 and the wiring M4 or the like, where a high voltage difference tend to occur.Type: GrantFiled: June 7, 2017Date of Patent: August 28, 2018Assignee: Renesas Electronics CorporationInventors: Takayuki Igarashi, Takuo Funaya
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Publication number: 20180182937Abstract: The method includes the steps of: storing slurry containing optical matter particles into a slurry tank; stirring the slurry inside the slurry tank by causing a bubble producing unit arranged below a liquid surface of the slurry to produce bubbles; and spraying the slurry onto a coating target including a light emitting element from a nozzle arranged above the coating target.Type: ApplicationFiled: December 26, 2017Publication date: June 28, 2018Applicants: NICHIA CORPORATION, Mtek-smart CorporationInventors: Takayuki IGARASHI, Masafumi MATSUNAGA
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Publication number: 20180174900Abstract: A semiconductor device, in which an increase in the size of a product can be suppressed and a withstand voltage between wiring layers can be improved, and a manufacturing method thereof are provided. A discontinued part, in which the interface between an interlayer insulating film and a passivation film is discontinued, is formed between a first wiring layer and a second wiring layer that are adjacent to each other with a space therebetween. Both the interlayer insulating film and the passivation film face an air gap in the discontinued part.Type: ApplicationFiled: February 15, 2018Publication date: June 21, 2018Applicant: Renesas Electronics CorporationInventors: Yoshikazu TSUNEMINE, Takayuki IGARASHI
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Patent number: 9929042Abstract: A semiconductor device, in which an increase in the size of a product can be suppressed and a withstand voltage between wiring layers can be improved, and a manufacturing method thereof are provided. A discontinued part, in which the interface between an interlayer insulating film and a passivation film is discontinued, is formed between a first wiring layer and a second wiring layer that are adjacent to each other with a space therebetween. Both the interlayer insulating film and the passivation film face an air gap in the discontinued part.Type: GrantFiled: May 10, 2016Date of Patent: March 27, 2018Assignee: Renesas Electronics CorporationInventors: Yoshikazu Tsunemine, Takayuki Igarashi
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Publication number: 20180061662Abstract: A semiconductor device including: a semiconductor substrate; a first coil formed on the semiconductor substrate via a first insulation film; a second insulation film formed on the semiconductor substrate so as to cover the first insulation film and the first coil; a first pad formed on the second insulation film and disposed at a position not overlapped with the first coil in a planar view; a laminated insulation film formed on the second insulation film, the laminated insulation film having a first opening from which the first pad is exposed; a second coil formed on the laminated insulation film and disposed above the first coil; and a first wiring formed on the laminated insulation film including an upper portion of the first pad exposed from the first opening, the first wiring being electrically connected to the first pad.Type: ApplicationFiled: October 20, 2017Publication date: March 1, 2018Inventors: Takuo FUNAYA, Takayuki Igarashi
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Publication number: 20170317024Abstract: Characteristics of a semiconductor device are improved. A semiconductor device includes a coil CL1 and a wiring M2 formed on an interlayer insulator IL2, a wiring M3 formed on an interlayer insulator IL3, and a coil CL2 and a wiring M4 formed on the interlayer insulator IL4. Moreover, a distance DM4 between the coil CL2 and the wiring M4 is longer than a distance DM3 between the coil CL2 and the wiring M3 (DM4>DM3). Furthermore, the distance DM3 between the coil CL2 and the wiring M3 is set to be longer than a sum of a film thickness of the interlayer insulator IL3 and a film thickness of the interlayer insulator IL4, which are positioned between the coil CL1 and the coil CL2. In this manner, it is possible to improve an insulation withstand voltage between the coil CL2 and the wiring M4 or the like, where a high voltage difference tend to occur.Type: ApplicationFiled: June 7, 2017Publication date: November 2, 2017Inventors: Takayuki IGARASHI, Takuo FUNAYA
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Patent number: 9805950Abstract: A method of manufacturing a semiconductor device including: (a) forming a first insulation film on a semiconductor substrate; (b) forming a first coil on the first insulation film; (c) forming a second insulation film on the first insulation film so as to cover the first coil; (d) forming a first pad on the second insulation film at a position not overlapped with the first coil in a planar view; (e) forming a laminated insulation film on the second insulation film, the laminated insulation film having a first opening from which the first pad is exposed; and (f) forming a second coil and a first wiring on the laminated insulation film, wherein the second coil is disposed above the first coil, the first coil and the second coil are not connected by a conductor but magnetically coupled to each other, the first wiring is formed from an upper portion of the first pad to an upper portion of the laminated insulation film and is electrically connected to the first pad, and the laminated insulation film includes a silType: GrantFiled: March 17, 2017Date of Patent: October 31, 2017Assignee: Renesas Electronics CorporationInventors: Takuo Funaya, Takayuki Igarashi
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Patent number: 9711451Abstract: Characteristics of a semiconductor device are improved. A semiconductor device includes a coil CL1 and a wiring M2 formed on an interlayer insulator IL2, a wiring M3 formed on an interlayer insulator IL3, and a coil CL2 and a wiring M4 formed on the interlayer insulator IL4. Moreover, a distance DM4 between the coil CL2 and the wiring M4 is longer than a distance DM3 between the coil CL2 and the wiring M3 (DM4>DM3). Furthermore, the distance DM3 between the coil CL2 and the wiring M3 is set to be longer than a sum of a film thickness of the interlayer insulator IL3 and a film thickness of the interlayer insulator IL4, which are positioned between the coil CL1 and the coil CL2. In this manner, it is possible to improve an insulation withstand voltage between the coil CL2 and the wiring M4 or the like, where a high voltage difference tend to occur.Type: GrantFiled: January 29, 2014Date of Patent: July 18, 2017Assignee: Renesas Electronics CorporationInventors: Takayuki Igarashi, Takuo Funaya
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Publication number: 20170194164Abstract: A method of manufacturing a semiconductor device including: (a) forming a first insulation film on a semiconductor substrate; (b) forming a first coil on the first insulation film; (c) forming a second insulation film on the first insulation film so as to cover the first coil; (d) forming a first pad on the second insulation film at a position not overlapped with the first coil in a planar view; (e) forming a laminated insulation film on the second insulation film, the laminated insulation film having a first opening from which the first pad is exposed; and (f) forming a second coil and a first wiring on the laminated insulation film, wherein the second coil is disposed above the first coil, the first coil and the second coil are not connected by a conductor but magnetically coupled to each other, the first wiring is formed from an upper portion of the first pad to an upper portion of the laminated insulation film and is electrically connected to the first pad, and the laminated insulation film includes a silType: ApplicationFiled: March 17, 2017Publication date: July 6, 2017Inventors: Takuo FUNAYA, Takayuki IGARASHI
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Patent number: 9653396Abstract: A coil CL1 is formed on a semiconductor substrate SB via a first insulation film, a second insulation film is formed so as to cover the first insulation film and the coil CL1, and a pad PD1 is formed on the second insulation film. A laminated film LF having an opening OP1 from which the pad PD1 is partially exposed is formed on the second insulation film, and a coil CL2 is formed on the laminated insulation film. The coil CL2 is disposed above the coil CL1, and the coil CL2 and the coil CL1 are magnetically coupled to each other. The laminated film LF is composed of a silicon oxide film LF1, a silicon nitride film LF2 thereon, and a resin film LF3 thereon.Type: GrantFiled: March 25, 2013Date of Patent: May 16, 2017Assignee: Renesas Electronics CorporationInventors: Takuo Funaya, Takayuki Igarashi
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Patent number: 9631797Abstract: A light emitting device has a plurality of light emitting elements, a heat spreading member on which the plurality of light emitting elements are mounted, and having a bottom face, an insulating member having a recess that includes side walls and a bottom wall, a top face of the bottom wall being in contact with the bottom face of the heat spreading member, and a circuit board having a circuit that is provided on the heat spreading member and supplies power to the plurality of light emitting elements.Type: GrantFiled: November 18, 2014Date of Patent: April 25, 2017Assignee: NICHIA CORPORATIONInventors: Hiroshi Miyairi, Takayuki Igarashi, Masato Fujitomo, Satoshi Shirahama
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Publication number: 20160372419Abstract: A semiconductor device, in which an increase in the size of a product can be suppressed and a withstand voltage between wiring layers can be improved, and a manufacturing method thereof are provided. A discontinued part, in which the interface between an interlayer insulating film and a passivation film is discontinued, is formed between a first wiring layer and a second wiring layer that are adjacent to each other with a space therebetween. Both the interlayer insulating film and the passivation film face an air gap in the discontinued part.Type: ApplicationFiled: May 10, 2016Publication date: December 22, 2016Applicant: Renesas Electronics CorporationInventors: Yoshikazu TSUNEMINE, Takayuki IGARASHI
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Patent number: 9502489Abstract: Provided is a semiconductor device having improved reliability. Over a semiconductor substrate, a first coil is formed via a first insulating film. A second insulating film is formed so as to cover the first insulating film and the first coil. Over the second insulating film, a pad is formed. Over the second insulating film, a multi-layer film having an opening exposing a part of the pad is formed. Over the multi-layer insulating film, a second coil is formed. The second coil is placed over the first coil. The second and first coils are magnetically coupled to each other. The multi-layer film includes a silicon dioxide film, a silicon nitride film over the silicon dioxide film, and a resin film over the silicon nitride film.Type: GrantFiled: January 9, 2015Date of Patent: November 22, 2016Assignee: RENESAS ELECTRONICS CORPORATIONInventors: Takuo Funaya, Takayuki Igarashi
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Publication number: 20160035672Abstract: A coil CL1 is formed on a semiconductor substrate SB via a first insulation film, a second insulation film is formed so as to cover the first insulation film and the coil CL1, and a pad PD1 is formed on the second insulation film. A laminated film LF having an opening OP1 from which the pad PD1 is partially exposed is formed on the second insulation film, and a coil CL2 is formed on the laminated insulation film. The coil CL2 is disposed above the coil CL1, and the coil CL2 and the coil CL1 are magnetically coupled to each other. The laminated film LF is composed of a silicon oxide film LF1, a silicon nitride film LF2 thereon, and a resin film LF3 thereon.Type: ApplicationFiled: March 25, 2013Publication date: February 4, 2016Inventors: Takuo FUNAYA, Takayuki IGARASHI
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Publication number: 20160027732Abstract: Characteristics of a semiconductor device are improved. A semiconductor device includes a coil CL1 and a wiring M2 formed on an interlayer insulator IL2, a wiring M3 formed on an interlayer insulator IL3, and a coil CL2 and a wiring M4 formed on the interlayer insulator IL4. Moreover, a distance DM4 between the coil CL2 and the wiring M4 is longer than a distance DM3 between the coil CL2 and the wiring M3 (DM4>DM3). Furthermore, the distance DM3 between the coil CL2 and the wiring M3 is set to be longer than a sum of a film thickness of the interlayer insulator IL3 and a film thickness of the interlayer insulator IL4, which are positioned between the coil CL1 and the coil CL2. In this manner, it is possible to improve an insulation withstand voltage between the coil CL2 and the wiring M4 or the like, where a high voltage difference tend to occur.Type: ApplicationFiled: January 29, 2014Publication date: January 28, 2016Inventors: Takayuki Igarashi, Takuo Funaya
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Patent number: 9172007Abstract: A method of manufacturing a light emitting device, using a spray coating method, a fluorescent material can be easily adhered on corner portions and side surfaces of an LED chip, a lens-shaped light transmissive resin member surface, an optical lens surface, etc., and a spray coating machine used in the method. The method includes mounting an LED chip on a substrate member, applying a spray coating to a coating object including the LED chip by spraying a powder-containing solution. The applying a spray coating is performed such that a powder-containing solution is sprayed through a solution nozzle arranged above the coating object, as a spray direction of the powder-containing solution indicating a central axis, while using at least one gas nozzle arranged in a surrounding relationship to the central axis, spraying a gas toward the central axis to alter the direction of the spray made of the powder-containing solution.Type: GrantFiled: December 23, 2013Date of Patent: October 27, 2015Assignee: NICHIA CORPORATIONInventors: Takayuki Igarashi, Satoshi Shirahama
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Publication number: 20150206934Abstract: Provided is a semiconductor device having improved reliability. Over a semiconductor substrate, a first coil is formed via a first insulating film. A second insulating film is formed so as to cover the first insulating film and the first coil. Over the second insulating film, a pad is formed. Over the second insulating film, a multi-layer film having an opening exposing a part of the pad is formed. Over the multi-layer insulating film, a second coil is formed. The second coil is placed over the first coil. The second and first coils are magnetically coupled to each other. The multi-layer film includes a silicon dioxide film, a silicon nitride film over the silicon dioxide film, and a resin film over the silicon nitride film.Type: ApplicationFiled: January 9, 2015Publication date: July 23, 2015Inventors: Takuo Funaya, Takayuki Igarashi
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Patent number: D743918Type: GrantFiled: July 11, 2014Date of Patent: November 24, 2015Assignee: Nichia CorporationInventors: Takayuki Igarashi, Ryo Oishi