Patents by Inventor Takayuki Ikeda

Takayuki Ikeda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220352865
    Abstract: An amplifier is formed in a wiring layer. A semiconductor device includes a second layer over a first layer with a metal oxide therebetween. The first layer includes a first transistor including a first semiconductor layer containing silicon. The second layer includes an impedance matching circuit, and the impedance matching circuit includes a second transistor including a second semiconductor layer containing gallium. The first transistor forms first coupling capacitance between the first transistor and the metal oxide, and the impedance matching circuit forms second coupling capacitance between the impedance matching circuit and the metal oxide. The impedance matching circuit is electrically connected to the metal oxide through the second coupling capacitance. The metal oxide inhibits the influence of first radiation noise emitted from the impedance matching circuit on the operation of the first transistor.
    Type: Application
    Filed: October 5, 2020
    Publication date: November 3, 2022
    Inventors: Kazuaki OHSHIMA, Hitoshi KUNITAKE, Yuto YAKUBO, Takayuki IKEDA
  • Publication number: 20220345095
    Abstract: A semiconductor device is provided in which power consumption is reduced and an increase in circuit area is inhibited. The semiconductor device includes a high frequency amplifier circuit, an envelope detection circuit, and a power supply circuit. The power supply circuit has a function of supplying a power supply potential to the high frequency amplifier circuit, an output of the high frequency amplifier circuit is connected to the envelope detection circuit, and an output of the envelope detection circuit is connected to the power supply circuit. The power supply circuit can reduce the power consumption by changing the power supply potential in accordance with the output of the high frequency amplifier circuit. The use of an OS transistor in the envelope detection circuit can inhibit an increase in circuit area.
    Type: Application
    Filed: June 16, 2020
    Publication date: October 27, 2022
    Inventors: Hitoshi KUNITAKE, Takayuki IKEDA, Kiyoshi KATO, Yuichi YANAGISAWA, Shota MIZUKAMI, Kazuki TSUDA
  • Patent number: 11482146
    Abstract: An object is to provide a display system with a novel structure and a vehicle. The display system includes a display and a control IC. The control IC includes a frame memory, an arithmetic circuit, and a memory circuit. The display has a curved display surface. The frame memory has a function of holding first image data dedicated to displaying an image on a flat surface. The memory circuit has a function of storing shape data on the display. The arithmetic circuit has a function of converting first coordinates of the curved display surface into second coordinates of the flat surface included in the first image data, by performing arithmetic operation in accordance with the shape data. The arithmetic circuit has a function of outputting the first image data stored in the frame memory to the display as second image data on the basis of the second coordinates.
    Type: Grant
    Filed: May 4, 2020
    Date of Patent: October 25, 2022
    Assignee: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Shunpei Yamazaki, Takayuki Ikeda
  • Patent number: 11473218
    Abstract: A modified ethylene-vinyl alcohol copolymer fiber includes an ethylene-vinyl alcohol copolymer containing 0.1 to 10 mol % of a modified component and 5 to 55 mol % of ethylene, and has a crystallinity of 25% to 50%.
    Type: Grant
    Filed: December 20, 2018
    Date of Patent: October 18, 2022
    Assignee: KURARAY CO., LTD.
    Inventors: Shoji Onogi, Hitoshi Nakatsuka, Shinya Kawakado, Takayuki Ikeda
  • Publication number: 20220310148
    Abstract: To provide a semiconductor device with a novel structure. The semiconductor device includes a plurality of constant current circuits each given a digital signal. The constant current circuits each include a first transistor to a third transistor. The first transistor has a function of making a first current corresponding to set analog potential flow therethrough. The second transistor has a function of controlling the first current flowing between a source and a drain of the first transistor, in response to the digital signal. The third transistor has a function of holding the analog potential supplied to a gate of the first transistor, by being turned off. The first transistor to the third transistor each include a semiconductor layer including an oxide semiconductor in a channel formation region.
    Type: Application
    Filed: June 30, 2020
    Publication date: September 29, 2022
    Inventors: Takayuki IKEDA, Hitoshi KUNITAKE
  • Publication number: 20220302880
    Abstract: A semiconductor device including an amplifier with improved accuracy is provided. The semiconductor device includes a switch, a capacitor, a chopping circuit, and the amplifier. The amplifier includes a non-inverting input terminal, an inverting input terminal, an inverting output terminal, and a non-inverting output terminal. The semiconductor device, with use of the switch and the capacitor, has a function of sampling and holding a first potential and a second potential input in a first period. The chopping circuit is provided on each of the input terminal side and the output terminal side of the amplifier, and the first potential and the second potential are each input to either one of the non-inverting input terminal and the inverting input terminal in a second period. In a third period, the first potential and the second potential are each input to either one of the non-inverting input terminal and the inverted input terminal, which is different from the second period.
    Type: Application
    Filed: August 20, 2020
    Publication date: September 22, 2022
    Inventors: Kei TAKAHASHI, Takayuki IKEDA
  • Patent number: 11450709
    Abstract: A novel functional panel that is highly convenient or highly reliable is provided. The functional panel includes a first pixel. The first pixel includes a first element, a color conversion layer, and a first functional layer. The first functional layer is positioned between the first element and the color conversion layer. The first element has a function of emitting light and contains gallium nitride. The color conversion layer has a function of converting the color of light emitted from the first element into a different color. The first functional layer includes a first insulating film and a pixel circuit. The first insulating film includes a region positioned between the pixel circuit and the first element, and has an opening. The pixel circuit includes a first transistor. The first transistor includes a first oxide semiconductor film and is electrically connected to the first element through the opening.
    Type: Grant
    Filed: November 10, 2020
    Date of Patent: September 20, 2022
    Assignee: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Shunpei Yamazaki, Takayuki Ikeda
  • Publication number: 20220294402
    Abstract: A novel comparison circuit, a novel amplifier circuit, a novel battery control circuit, a novel battery protection circuit, a power storage device, a semiconductor device, an electric device, and the like are provided. In a semiconductor device, one of a source and a drain of a first transistor is electrically connected to one of a source and a drain of a second transistor and one of a source and a drain of a third transistor; the other of the source and the drain of the third transistor is electrically connected to a first output terminal; and the other of the source and the drain of the second transistor is electrically connected to a second output terminal.
    Type: Application
    Filed: August 11, 2020
    Publication date: September 15, 2022
    Inventors: Kei TAKAHASHI, Takeshi AOKI, Munehiro KOZUMA, Takayuki IKEDA
  • Publication number: 20220293603
    Abstract: A semiconductor device that occupies a small area is provided. The semiconductor device includes a first transistor including a first oxide semiconductor; a second transistor including a second oxide semiconductor; a capacitor element; a first insulator; and a first conductor in contact with a source or a drain of the second transistor. The capacitor element includes a second conductor, a third conductor, and a second insulator. The first transistor, the second transistor, and the first conductor are placed to be embedded in the first insulator. The second conductor is placed in contact with a top surface of the first conductor and a top surface of a gate of the first transistor. The second insulator is placed over the second conductor and the first insulator. The third conductor is placed to cover the second conductor with the second insulator therebetween.
    Type: Application
    Filed: August 26, 2020
    Publication date: September 15, 2022
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Hitoshi Kunitake, Tatsuya ONUKI, Hajime KIMURA, Takayuki IKEDA, Shunpei YAMAZAKI
  • Publication number: 20220286090
    Abstract: A semiconductor device with a novel structure is provided. The semiconductor device includes a mixer circuit including a digital-analog converter circuit, a control circuit for controlling the digital-analog converter circuit, a power source control switch, and a plurality of Gilbert circuits. The plurality of Gilbert circuits each include an analog potential holding circuit for holding an analog potential output from the digital-analog converter circuit. The control circuit has a function of outputting a signal for controlling the analog potential holding circuit and the digital-analog converter circuit. The power source control switch has a function of stopping supply of a power source voltage to the control circuit in a period during which the analog potential held in the analog potential holding circuit is not updated. The analog potential holding circuit includes a first transistor. The first transistor includes a semiconductor layer including an oxide semiconductor in a channel formation region.
    Type: Application
    Filed: April 27, 2020
    Publication date: September 8, 2022
    Inventors: Kiyotaka KIMURA, Takeya HIROSE, Hidetomo KOBAYASHI, Takayuki IKEDA
  • Publication number: 20220278187
    Abstract: A display device with high design flexibility that can be designed easily is provided. One embodiment of the present invention includes a first substrate (101) provided with a driver circuit including first and second pulse output circuits (91_1, 91_2), a second substrate (103) provided with a display unit (92) including a first pixel circuit including a first source wiring (SL_1) and a first contact portion (SC_1) and a second pixel circuit including a second source wiring (SL_2) adjacent to the first source wiring and a second contact portion (SC_2) electrically connected to the second source wiring, and a connection unit where the first and second substrates are electrically connected to each other.
    Type: Application
    Filed: July 21, 2020
    Publication date: September 1, 2022
    Inventors: Hidetomo KOBAYASHI, Takayuki IKEDA, Shunpei YAMAZAKI
  • Publication number: 20220278139
    Abstract: A display device with a novel structure is provided. The display device includes a first substrate provided with a plurality of pixels including a display element, and a second substrate including a first conductive layer provided with a plurality of first openings. The first conductive layer has a function of an antenna capable of transmitting and receiving a radio signal. The pixel and the first opening include a region where the pixel and the first opening overlap with each other. The second substrate includes an element layer. The element layer includes a transistor. The transistor has a function of an amplifier capable of amplifying the radio signal. The transistor each includes a semiconductor layer including a metal oxide in a channel formation region. The metal oxide contains In, Ga, and Zn.
    Type: Application
    Filed: July 10, 2020
    Publication date: September 1, 2022
    Inventors: Takayuki IKEDA, Hitoshi KUNITAKE, Koji KUSUNOKI, Yoshiaki OIKAWA, Shunpei YAMAZAKI
  • Publication number: 20220276839
    Abstract: A semiconductor device includes a CPU and an accelerator that includes a first memory circuit, a driver circuit, and a product-sum operation circuit. The first memory circuit includes a first data retention portion, a second data retention portion, and a data reading portion. The first data retention portion, the second data retention portion, and the data reading portion each include a first transistor. The first transistor contains a metal oxide in a channel formation region. First data stored in the first data retention portion and second data stored in the second data retention portion are each weight data input to the product-sum operation circuit. The product-sum operation circuit has a function of performing product-sum operation of the weight data and input data input through the driver circuit. The product-sum operation circuit and the driver circuit each include a second transistor. The second transistor contains silicon in a channel formation region.
    Type: Application
    Filed: September 18, 2020
    Publication date: September 1, 2022
    Inventors: Takahiko ISHIZU, Takeshi AOKI, Kazuma FURUTANI, Takayuki IKEDA, Shunpei YAMAZAKI
  • Patent number: 11430820
    Abstract: An object is to provide a pixel structure of a display device including a photosensor which prevents changes in an output of the photosensor and a decrease in imaging quality. The display device has a pixel layout structure in which a shielding wire is disposed between an FD and an imaging signal line (a PR line, a TX line, or an SE line) or between the FD and an image-display signal line in order to reduce or eliminate parasitic capacitance between the FD and a signal line for the purpose of suppressing changes in the potential of the FD. An imaging power supply line, image-display power supply line, a GND line, a common line, or the like whose potential is fixed, such as a common potential line, is used as a shielding wire.
    Type: Grant
    Filed: April 6, 2021
    Date of Patent: August 30, 2022
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Takeshi Aoki, Yoshiyuki Kurokawa, Takayuki Ikeda, Hikaru Tamura
  • Publication number: 20220267598
    Abstract: Provided is a polyamide fiber having excellent color developability, as well as a method for producing such a polyamide fiber, and a fiber structure. The polyamide fiber comprises a polyamide resin composition comprising a polyamide resin and an amino group-containing color enhancer, the polyamide fiber having terminal amino groups at a concentration of from 5.0 ?eq/g to 40.0 ?eq/g. Such a fiber can be produced by a production method at least comprising: melt-kneading a polyamide resin composition including a polyamide resin and an amino group-containing color enhancer to give a melt-kneaded product having a predetermined melt viscosity; and spinning the melt-kneaded product to give fibers.
    Type: Application
    Filed: May 12, 2022
    Publication date: August 25, 2022
    Applicant: KURARAY CO., LTD.
    Inventors: Daisuke OHGA, Hitoshi NAKATSUKA, Shinya KAWAKADO, Takayuki IKEDA, Shoji ONOGI, Kohei YAMASAKI
  • Publication number: 20220271669
    Abstract: A semiconductor device in which an increase in circuit area is inhibited is provided. The semiconductor device includes a first circuit layer and a second circuit layer over the first circuit layer; the first circuit layer includes a first transistor; the second circuit layer includes a second transistor; a gate of the second transistor is electrically connected to one of a source and a drain of the first transistor; a source and a drain of the second transistor are electrically connected to the other of the source and the drain of the first transistor; and a semiconductor layer of the second transistor contains a metal oxide.
    Type: Application
    Filed: May 19, 2020
    Publication date: August 25, 2022
    Inventors: Yuto YAKUBO, Hitoshi KUNITAKE, Takayuki IKEDA
  • Patent number: 11423844
    Abstract: A high-definition display device is provided. A small display device is provided. In the display device, a first layer and a second layer are stacked and provided. The first layer includes a gate driver circuit and a source driver circuit, and the second layer includes a display portion. The gate driver circuit and the source driver circuit are provided to include a region overlapping with the display portion. The gate driver circuit and the source driver circuit have an overlap region where they are not strictly separated from each other. Five or more gate driver circuits and five or more source driver circuits can be provided.
    Type: Grant
    Filed: May 9, 2019
    Date of Patent: August 23, 2022
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Takayuki Ikeda, Hidetomo Kobayashi, Hideaki Shishido, Kiyotaka Kimura, Takashi Nakagawa, Kosei Nei
  • Publication number: 20220255511
    Abstract: A communication device that can transmit and receive a signal with a large amplitude is provided. The communication device includes an amplifier circuit including first to fourth transistors, first to fourth bias transistors, first to fourth loads, and first to fourth terminals. The drains of the first to fourth transistors are electrically connected to the sources of the first to fourth bias transistors. The sources of the first to fourth transistors are electrically connected to power supply lines. The gates of the first and second bias transistors are electrically connected to a first wiring, and the gates of the third and fourth bias transistors are electrically connected to a second wiring. The first to fourth terminals are electrically connected to the gates of the first to fourth transistors, the drains of the third, fourth, first, and second bias transistors, and the first to fourth loads.
    Type: Application
    Filed: May 19, 2020
    Publication date: August 11, 2022
    Inventors: Hajime KIMURA, Takayuki IKEDA
  • Publication number: 20220255579
    Abstract: A communication device capable of transmitting and receiving high-potential signals is provided. The communication device includes a duplexer including first to fourth transistors, a transmission terminal, a reception terminal, an antenna terminal, and first and second control terminals. The transmission terminal is electrically connected to one of a source and a drain of each of the first and second transistors. The reception terminal is electrically connected to one of a source and a drain of each of the third and fourth transistors. The antenna terminal is electrically connected to the other of the source and the drain of each of the second and fourth transistors. The first control terminal is electrically connected to gates of the second and third transistors. The second control terminal is electrically connected to gates of the first and fourth transistors. A semiconductor of each of the first to fourth transistors contains a metal oxide.
    Type: Application
    Filed: June 3, 2020
    Publication date: August 11, 2022
    Inventors: Takayuki IKEDA, Hitoshi KUNITAKE
  • Patent number: 11401871
    Abstract: An engine system including: an engine configured to output shaft power by burning fuel, and a system main portion configured to operate using the shaft power of the engine. The engine system further includes: an operation controlling unit, and a power source unit configured to convert commercial power to operating power and supply the operating power to the operation controlling unit. The power source unit includes: a system main portion-side power source unit configured to supply operating power for controlling the operation of the system main portion, and an engine-side power source unit configured to supply operating power for controlling the operation of the engine. The system main portion-side power source unit and the engine-side power source unit are provided individually and separately from each other.
    Type: Grant
    Filed: February 19, 2018
    Date of Patent: August 2, 2022
    Assignee: YANMAR POWER TECHNOLOGY CO., LTD.
    Inventors: Tomoko Nobuhara, Takayuki Ikeda