Patents by Inventor Takayuki Ikeda

Takayuki Ikeda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11848697
    Abstract: A communication device capable of transmitting and receiving high-potential signals is provided. The communication device includes a duplexer including first to fourth transistors, a transmission terminal, a reception terminal, an antenna terminal, and first and second control terminals. The transmission terminal is electrically connected to one of a source and a drain of each of the first and second transistors. The reception terminal is electrically connected to one of a source and a drain of each of the third and fourth transistors. The antenna terminal is electrically connected to the other of the source and the drain of each of the second and fourth transistors. The first control terminal is electrically connected to gates of the second and third transistors. The second control terminal is electrically connected to gates of the first and fourth transistors. A semiconductor of each of the first to fourth transistors contains a metal oxide.
    Type: Grant
    Filed: June 3, 2020
    Date of Patent: December 19, 2023
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Takayuki Ikeda, Hitoshi Kunitake
  • Publication number: 20230402602
    Abstract: One embodiment of the present invention further improves thermal safety of a lithium-ion secondary battery for stable power supply from the lithium-ion secondary battery. To improve thermal safety, fluorine is contained in a positive electrode active material or adsorbed on a surface portion of the positive electrode active material so that overheating or ignition of the lithium-ion secondary battery is inhibited. When fluorine is adsorbed on the surface of the positive electrode active material, the adsorbed fluorine can react with its vicinity electrolyte solution or the like, leading to inhibition of thermal decomposition or the like of the electrolyte solution.
    Type: Application
    Filed: June 2, 2023
    Publication date: December 14, 2023
    Inventors: Shunpei YAMAZAKI, Shotaro MURATSUBAKI, Takayuki IKEDA
  • Publication number: 20230402601
    Abstract: To provide a high-safety battery. The battery includes a positive electrode including a positive electrode active material, a negative electrode including a negative electrode active material, and an electrolyte solution. The positive electrode active material includes a first region and a second region. The first region contains cobalt, magnesium, fluorine, and oxygen. The second region contains cobalt and oxygen. The first region is closer to a surface of the positive electrode active material than the second region is. The negative electrode active material contains graphite. The electrolyte solution contains a mixed organic solvent. When the battery in a fully charged state undergoes a nail penetration test in which the nail diameter is 3 mm and the nail penetration speed is 5 mm/sec, the voltage of the battery decreases from a first voltage Vb to a second voltage Vc and then exceeds the second voltage Vc.
    Type: Application
    Filed: May 31, 2023
    Publication date: December 14, 2023
    Inventors: Shunpei YAMAZAKI, Shotaro MURATSUBAKI, Takayuki IKEDA
  • Patent number: 11842002
    Abstract: To provide an inexpensive display device. The display device includes a pixel and an IC chip. The pixel includes a first pixel circuit including a display element and a second pixel circuit including a light-receiving device. The one IC chip includes a control circuit, a data driver circuit, and a read circuit. The first and second pixel circuits are electrically connected to the read circuit. The control circuit has a function of controlling driving of the data driver circuit and the read circuit. The data driver circuit has a function of supplying image data to the first pixel circuit. The read circuit has a function of outputting a monitor signal corresponding to a monitor current when the monitor current flows through the first pixel circuit. The read circuit also has a function of outputting an imaging signal corresponding to imaging data acquired by the second pixel circuit.
    Type: Grant
    Filed: September 22, 2020
    Date of Patent: December 12, 2023
    Assignee: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Kei Takahashi, Hidetomo Kobayashi, Hajime Kimura, Takeshi Osada, Hideaki Shishido, Kiyotaka Kimura, Shuichi Katsui, Takeya Hirose, Takayuki Ikeda
  • Publication number: 20230397437
    Abstract: A semiconductor device that has a novel structure and includes a memory cell including a ferroelectric capacitor includes a first transistor (500A), a second transistor (500B), a first capacitor (600A), a second capacitor (600B), and a wiring (401). The first transistor is electrically connected to the first capacitor. The second transistor is electrically connected to the second capacitor. The wiring is positioned below the first transistor and the second transistor and is electrically connected to the first transistor or the second transistor. The first capacitor and the second capacitor each include a ferroelectric layer (630). The first capacitor and the second capacitor are placed on the same plane. The first capacitor and the second capacitor may include a region where they overlap with each other. Each of the first transistor and the second transistor preferably includes an oxide semiconductor in a channel.
    Type: Application
    Filed: October 8, 2021
    Publication date: December 7, 2023
    Inventors: Shunpei YAMAZAKI, Takayuki IKEDA, Hitoshi KUNITAKE, Tatsuya ONUKI
  • Publication number: 20230387147
    Abstract: An imaging device capable of image processing is provided. The imaging device can retain analog data (image data) obtained by an image-capturing operation in a pixel and perform a product-sum operation of the analog data and a predetermined weight coefficient in the pixel to convert the data into binary data. When the binary data is taken in a neural network or the like, processing such as image recognition can be performed. Since enormous volumes of image data can be retained in pixels in the state of analog data, processing can be performed efficiently.
    Type: Application
    Filed: August 9, 2023
    Publication date: November 30, 2023
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Takayuki IKEDA, Yoshiyuki KUROKAWA, Shintaro HARADA, Hidetomo KOBAYASHI, Roh YAMAMOTO, Kiyotaka KIMURA, Takashi NAKAGAWA, Yusuke NEGORO
  • Publication number: 20230389262
    Abstract: A semiconductor device with a large storage capacity per unit area is provided. A semiconductor device includes a memory cell. The memory cell includes a first conductor; a first insulator over the first conductor; a first oxide over the first insulator and including a first region, a second region, and a third region positioned between the first region and the second region; a second insulator over the first oxide; a second conductor over the second insulator; a third insulator positioned in contact with a side surface of the first region; and a second oxide positioned on the side surface of the first region, with the third insulator therebetween. The first region includes a region overlapping the first conductor. The third region includes a region overlapped by the second conductor. The first region and the second region have a lower resistance than the third region.
    Type: Application
    Filed: August 11, 2023
    Publication date: November 30, 2023
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei YAMAZAKI, Hajime KIMURA, Takayuki IKEDA, Kiyoshi KATO, Yuta ENDO, Junpei SUGAO
  • Publication number: 20230386383
    Abstract: A display device with a narrower frame can be provided. In the display device, a first layer, a second layer, and a third layer are provided to be stacked. The first layer includes a gate driver circuit and a data driver circuit, the second layer includes a demultiplexer circuit, and the third layer includes a display portion. In the display portion, pixels are arranged in a matrix, an input terminal of the demultiplexer circuit is electrically connected to the data driver circuit, and an output terminal of the demultiplexer circuit is electrically connected to some of the pixels. The gate driver circuit and the data driver circuit are provided to include a region overlapping some of the pixels. The gate driver circuit and the data driver circuit have a region where they are not strictly separated from each other and overlap each other. Five or more gate driver circuits and five or more data driver circuits can be provided.
    Type: Application
    Filed: April 6, 2023
    Publication date: November 30, 2023
    Inventors: Takashi NAKAGAWA, Takayuki IKEDA, Hidetomo KOBAYASHI, Hideaki SHISHIDO, Shuichi KATSUI, Kiyotaka KIMURA
  • Publication number: 20230380175
    Abstract: A semiconductor device that has lower power consumption and is capable of non-destructive reading is provided. The semiconductor device includes first to fourth transistors and first and second FTJ elements. The first FTJ element and the second FTJ element each include an input terminal, a tunnel insulating film, a dielectric, and an output terminal. One of a source and a drain of the first transistor is electrically connected to one of a source and a drain of the third transistor, a gate of the fourth transistor, and the output terminal of the first FTJ element. One of a source and a drain of the second transistor is electrically connected to one of a source and a drain of the fourth transistor, a gate of the third transistor, and the output terminal of the second FTJ element.
    Type: Application
    Filed: October 7, 2021
    Publication date: November 23, 2023
    Inventors: Shunpei YAMAZAKI, Hajime KIMURA, Takayuki IKEDA
  • Patent number: 11823036
    Abstract: An arithmetic device and an electronic device having small power consumption is provided. An arithmetic device and an electronic device capable of high-speed operation is provided. An arithmetic device and an electronic device capable of suppressing heat generation is provided. The arithmetic device includes a first arithmetic portion and a second arithmetic portion. The first arithmetic portion includes a first CPU core and a second CPU core. The second arithmetic portion includes a first GPU core and a second GPU core. The CPU cores each have a power gating function and each include a first data retention circuit electrically connected to a flip-flop. The first GPU core includes a second data retention circuit capable of retaining an analog value and reading out the analog value as digital data of two or more bits. The second GPU core includes a third data retention circuit capable of retaining a digital value and reading out the digital value as digital data of one bit.
    Type: Grant
    Filed: January 31, 2022
    Date of Patent: November 21, 2023
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Takahiko Ishizu, Takayuki Ikeda, Atsuo Isobe, Atsushi Miyaguchi, Shunpei Yamazaki
  • Publication number: 20230369381
    Abstract: One embodiment of the present invention is a display device including a first insulating layer, a second insulating layer, a first transistor, a second transistor, a first light-emitting diode, a second light-emitting diode, and a color conversion layer. The first insulating layer is over the first transistor and the second transistor. The first light-emitting diode and the second light-emitting diode are over the first insulating layer. The color conversion layer is over the second light-emitting diode. The color conversion layer is configured to convert light emitted from the second light-emitting diode into a light having a longer wavelength. The first transistor and the second transistor each include a metal oxide layer and a gate electrode. The metal oxide layer includes a channel formation region. A top surface of the gate electrode is level or substantially level with a top surface of the second insulating layer.
    Type: Application
    Filed: July 20, 2023
    Publication date: November 16, 2023
    Inventors: Koji KUSUNOKI, Shingo EGUCHI, Takayuki IKEDA
  • Publication number: 20230366132
    Abstract: Provided are a sea-island type composite multifilament which includes a thermoplastic elastomer resin as an island component, and an ultrafine multifilament prepared from such a sea-island type composite multifilament. The sea-island type composite multifilament includes an island component and a sea component. The island component includes a thermoplastic elastomer resin (A) having at least one of a Shore A hardness of 90 or less, a Shore D hardness of 60 or less, or a Rockwell hardness (R scale) of 70 or less. The sea component includes a water-soluble or easily alkali-soluble thermoplastic resin (B). The sea-island type composite multifilament has an average single island diameter of 8000 nm or less.
    Type: Application
    Filed: July 11, 2023
    Publication date: November 16, 2023
    Applicant: KURARAY TRADING CO., LTD.
    Inventors: Takayuki IKEDA, Hitoshi Nakatsuka, Shinya Kawakado, Kohei Yamasaki
  • Patent number: 11814126
    Abstract: To provide a driver alert system capable of improving the safety. A bicycle includes a first transmission circuit transmitting a first ultrasonic wave, a first receiving circuit receiving a second ultrasonic wave, an arithmetic circuit detecting the presence or absence of an object from the second ultrasonic wave, and a second transmission circuit transmitting a third ultrasonic wave. A driver wears a second housing including a second receiving circuit receiving the third ultrasonic wave. The arithmetic circuit includes a first selection circuit selecting a potential based on the second ultrasonic wave at a different timing, a plurality of signal retention circuits retaining a potential based on the second ultrasonic wave, a second selection circuit selecting any one of the plurality of signal retention circuits, and a signal processing circuit to which a signal selected in and output from the second selection circuit is input.
    Type: Grant
    Filed: October 1, 2019
    Date of Patent: November 14, 2023
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shuichi Katsui, Takayuki Ikeda
  • Publication number: 20230352502
    Abstract: In a CMOS image sensor in which a plurality of pixels is arranged in a matrix, a transistor in which a channel formation region includes an oxide semiconductor is used for each of a charge accumulation control transistor and a reset transistor which are in a pixel portion. After a reset operation of the signal charge accumulation portion is performed in all the pixels arranged in the matrix, a charge accumulation operation by the photodiode is performed in all the pixels, and a read operation of a signal from the pixel is performed per row. Accordingly, an image can be taken without a distortion.
    Type: Application
    Filed: July 13, 2023
    Publication date: November 2, 2023
    Inventors: Yoshiyuki KUROKAWA, Takayuki IKEDA, Hikaru TAMURA, Munehiro KOZUMA, Masataka IKEDA, Takeshi AOKI
  • Publication number: 20230353110
    Abstract: A small semiconductor device is provided. A semiconductor device with low power consumption is provided. A semiconductor device with a high degree of integration is provided.
    Type: Application
    Filed: March 16, 2021
    Publication date: November 2, 2023
    Inventors: Kei TAKAHASHI, Takayuki IKEDA, Shuji FUKAI, Shunpei YAMAZAKI
  • Publication number: 20230347902
    Abstract: A novel data processing device is provided. The data processing device includes a conversation data generation unit, an image processing unit, a display device, an imaging device, an operation unit, a biosensor, a speaker, and a microphone. The conversation data generation unit includes a classifier that has learned preference information of a user, and the biosensor detects the biological information of the user who wears the data processing device. The imaging device captures a first image. When a designated first object is detected in the first image, the operation unit generates a second image where a second object overlaps with part of the first object. The image processing unit displays the second image on the display device. The conversation data generation unit generates first conversation data based on the biological information and the preference information, and outputs the first conversation data from the speaker.
    Type: Application
    Filed: January 12, 2021
    Publication date: November 2, 2023
    Inventors: Shunpei YAMAZAKI, Takayuki IKEDA
  • Publication number: 20230352477
    Abstract: A semiconductor device with a novel structure is provided. The semiconductor device includes a digital calculator, an analog calculator, a first memory circuit, and a second memory circuit. The analog calculator, the first memory circuit, and the second memory circuit each include a transistor including an oxide semiconductor in a channel formation region. The first memory circuit has a function of supplying first weight data to the digital calculator as digital data. The digital calculator has a function of performing product-sum operation using the first weight data. The second memory circuit has a function of supplying second weight data to the analog calculator as analog data. The analog calculator has a function of performing product-sum operation using the second weight data.
    Type: Application
    Filed: July 26, 2021
    Publication date: November 2, 2023
    Inventors: Takanori MATSUZAKI, Tatsuya ONUKI, Munehiro KOZUMA, Takeshi AOKI, Yuki OKAMOTO, Takayuki IKEDA
  • Patent number: 11798491
    Abstract: A high-definition display device is provided. A small display device is provided. In the display device, a first layer and a second layer are stacked and provided. The first layer includes a gate driver circuit and a source driver circuit, and the second layer includes a display portion. The gate driver circuit and the source driver circuit are provided to include a region overlapping with the display portion. The gate driver circuit and the source driver circuit have an overlap region where they are not strictly separated from each other. Five or more gate driver circuits and five or more source driver circuits can be provided.
    Type: Grant
    Filed: August 15, 2022
    Date of Patent: October 24, 2023
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Takayuki Ikeda, Hidetomo Kobayashi, Hideaki Shishido, Kiyotaka Kimura, Takashi Nakagawa, Kosei Nei
  • Patent number: 11794679
    Abstract: An occupant protection device which can protect an occupant without delay is provided. An image taken by an imaging device is analyzed to judge whether there is an object approaching the subject car. In the case where a collision between the object and the subject car is judged to be inevitable, an airbag device is activated before the collision, whereby the occupant can be protected without delay. By using selenium for a light-receiving element of the imaging device, an accurate image can be obtained even under low illuminance. Imaging in a global shutter system leads to an accurate image with little distortion. This enables more accurate image analysis.
    Type: Grant
    Filed: June 3, 2021
    Date of Patent: October 24, 2023
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Takayuki Ikeda, Yoshiyuki Kurokawa
  • Patent number: 11799430
    Abstract: A novel comparison circuit, a novel amplifier circuit, a novel battery control circuit, a novel battery protection circuit, a power storage device, a semiconductor device, an electric device, and the like are provided. In a semiconductor device, one of a source and a drain of a first transistor is electrically connected to one of a source and a drain of a second transistor and one of a source and a drain of a third transistor; the other of the source and the drain of the third transistor is electrically connected to a first output terminal; and the other of the source and the drain of the second transistor is electrically connected to a second output terminal.
    Type: Grant
    Filed: August 11, 2020
    Date of Patent: October 24, 2023
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Kei Takahashi, Takeshi Aoki, Munehiro Kozuma, Takayuki Ikeda