Abstract: An optical signal emitting direction control method of a present embodiment includes arranging a transparent member to extend over an underwater space and an in-air space, causing an optical signal to enter the transparent member from the underwater space via a surface of an underwater portion of the transparent member immersed in the underwater space, and causing the optical signal entered the transparent member to be emitted into the in-air space via a surface of an in-air portion of the transparent member exposed to the in-air space.

Abstract: This disc brake includes a first shim that has a first flat plate portion and claw portions curved from an outer edge side of the first flat plate portion and attached to an outer circumferential surface of a rear plate; and a second shim that has a second flat plate portion disposed in a manner of being sandwiched between the first flat plate portion and the rear plate, and a bent portion curved from an outer edge side of the second flat plate portion to the first flat plate portion side. Relative movement of the second shim with respect to the first shim on a plane parallel to the second flat plate portion is restricted. A leading end portion of the bent portion of the second shim is disposed within a projection plane of a largest flat surface portion of the rear plate in a disc axial direction.

Abstract: This caliper body includes a cylinder portion (26) that has a piston disposed therein and is internally provided with a liquid pressure chamber, a bleeder boss portion (29) that communicates with the liquid pressure chamber and includes a bleeder hole configured to discharge air from the liquid pressure chamber, and a plurality of identifiers (112 and 116). At least one identifier (112) of the identifier (112 and 116) is formed in a region hidden by a bleeder plug (131) attached to the bleeder boss portion (29).

Abstract: This caliper body includes a cylinder portion (26) that has a piston disposed therein and is internally provided with a liquid pressure chamber, a bleeder boss portion (29) that communicates with the liquid pressure chamber and includes a bleeder hole configured to discharge air from the liquid pressure chamber, and a plurality of identifiers (112 and 116). At least one identifier (112) of the identifier (112 and 116) is formed in a region hidden by a bleeder plug (131) attached to the bleeder boss portion (29).

Abstract: An error check apparatus including, a packet protocol error check processing circuit configure to detect a protocol error of a packet, a retry control circuit configured to receive the protocol error of the packet from the packet protocol error check processing circuit, and to perform request for retry for data of the packet if the received protocol error has not been detected from a packet retransmitted by retry request, and an error notification circuit configured to notify of the protocol error of the packet to a processing unit in a higher-level layer if the protocol error is not a first protocol error for the packet.

Abstract: Storing data in a hard disk drive may include determining a percentage of storage usage (SU %) of the data tracks. If the SU % is less than a first threshold percentage (TP1), the method may include storing data to Nth data tracks. If the SU % is greater than or equal to TP1, but less than a second threshold percentage (TP2), the method may include storing data to about N/2 data tracks between said Nth data tracks. If the SU % is greater than or equal to TP2, the method may include storing data to data tracks between said N/2 data tracks and said Nth data tracks.

Abstract: An arbitration method includes a first process to perform a path control to transfer data from physically plural input ports logically having plural virtual channels to an arbitrary one of the plural output ports, wherein only one channel is selectable at one input port at an arbitrary point in time, by performing an arbitration among the channels of each of the plural input ports according to an arbitrary arbitration algorithm other than a time-division algorithm, and a second process to perform an arbitration among the plural input ports according to the arbitrary arbitration algorithm. The arbitrary arbitration algorithm used in the first and second processes is switched to the time-division algorithm for a predetermined time in response to a trigger.

Abstract: Each chip arranged in each crossbar switch creates and issues, if a packet is input, a log collection packet for collecting a log of the packet. Each chip collects a log related to a transfer of the input packet. Each chip embeds, in the issued log collection packet or a log collection packet transferred from a crossbar switch in a previous stage, the collected log. If a transfer destination of the packet is other than the crossbar switches, each chip stores, in a storage space, the log embedded in the log collection packet and then transfers, to the transfer destination, only an original packet in which the log is deleted. In contrast, if the transfer destination is a crossbar switch, each chip transfers the log collection packet to a crossbar switch in a next stage.

Abstract: Storing data in a hard disk drive may include determining a percentage of storage usage (SU %) of the data tracks. If the SU % is less than a first threshold percentage (TP1), the method may include storing data to Nth data tracks. If the SU % is greater than or equal to TP1, but less than a second threshold percentage (TP2), the method may include storing data to about N/2 data tracks between said Nth data tracks. If the SU % is greater than or equal to TP2, the method may include storing data to data tracks between said N/2 data tracks and said Nth data tracks.

Abstract: A linkup state generating method for generating a state in which linkup is completed in first and second information processing apparatuses, the first and second information processing apparatuses each including a linkup function of, with parameter exchange, comparing parameters included in the first and second information processing apparatuses and adjusting specifications of the parameters so that the specifications of the parameters match each other, the linkup state generating method including setting, from the outside, a parameter in the first information processing apparatus so that a specification of the parameter included in the first information processing apparatus matches a specification of a parameter included in the second information processing apparatus, and sending, from the first information processing apparatus, a signal received from the second information processing apparatus to the second information processing apparatus in a manner that the second information processing apparatus recogni

Abstract: In an information processing apparatus that includes a first and second semiconductor devices that are connected to each other and also includes a system control device that is connected to the first and second semiconductor devices, the timers that are mounted on the semiconductor devices are all synchronized by successively performing a timer correction process between a semiconductor device in which the timer is synchronized and a semiconductor device, adjacent to the semiconductor device, in which the timer is not synchronized, and, when an error occurs in the information processing device, the value in the synchronized timer and the error information are stored in a predetermined register.

Abstract: A master cylinder includes a bottomed cylindrical cylinder body, a piston formed into a bottomed cylindrical shape by a forging method and slidably disposed in the cylinder body, and a spring assembly including a spring urging the piston toward an opening side of the cylinder body. A length of a spring of the spring assembly is determined by a retainer which can abut against an inner bottom portion of the piston. An annular groove is formed on the outermost side of the inner bottom portion of the piston by the forging method.

Abstract: In a master cylinder, a supply passage for supplying operating liquid from a reservoir (2) to a pressure chamber (6) is provided in a cylinder body (3) coupled with the reservoir. A bypass passage (37) for bypassing the supply passage and connecting the reservoir and the pressure chamber is further provided, and a check valve (34) adapted to open when a pressure in the pressure chamber is lower than that in the reservoir is disposed in the bypass passage. A valve case (38) containing a valve body (41) of the check valve includes a valve seat (40) and a cylindrical wall (45) for slidably guiding the valve body which are integrally formed as a single member.

Abstract: An arbitration device including: a first measuring circuit to measure a first period; a second measuring circuit to measure a second period; a second selection circuit to select and output the first period or the second period according to a first selection signal; a first control circuit to output the first selection signal according to the first period and the second period; a third selection circuit to select a third data or either the first data or the second data according to a second selection signal; a third measuring circuit to measure a third period; a fourth measuring circuit to measure a fourth period; and a second control circuit to output the second selection signal according to either the selected first period or the selected second period and the third period and the fourth period.

Abstract: An arbitration method includes a first process to perform a path control to transfer data from physically plural input ports logically having plural virtual channels to an arbitrary one of the plural output ports, wherein only one channel is selectable at one input port at an arbitrary point in time, by performing an arbitration among the channels of each of the plural input ports according to an arbitrary arbitration algorithm other than a time-division algorithm, and a second process to perform an arbitration among the plural input ports according to the arbitrary arbitration algorithm. The arbitrary arbitration algorithm used in the first and second processes is switched to the time-division algorithm for a predetermined time in response to a trigger.

Abstract: An error check apparatus including, a packet protocol error check processing circuit configure to detect a protocol error of a packet, a retry control circuit configured to receive the protocol error of the packet from the packet protocol error check processing circuit, and to perform request for retry for data of the packet if the received protocol error has not been detected from a packet retransmitted by retry request, and an error notification circuit configured to notify of the protocol error of the packet to a processing unit in a higher-level layer if the protocol error is not a first protocol error for the packet.

Abstract: An arbitration device including: a first measuring circuit to measure a first period; a second measuring circuit to measure a second period; a second selection circuit to select and output the first period or the second period according to a first selection signal; a first control circuit to output the first selection signal according to the first period and the second period; a third selection circuit to select a third data or either the first data or the second data according to a second selection signal; a third measuring circuit to measure a third period; a fourth measuring circuit to measure a fourth period; and a second control circuit to output the second selection signal according to either the selected first period or the selected second period and the third period and the fourth period.

Abstract: A scan control method for a circuit device connected with a first bus and having a test access port controller, including setting information indicating a register to be scanned in the circuit device, a number of scan shifts and a scan start via a second bus different from the first bus, and generating based on the information set, by using a sequencer, a signal replacing a test mode signal and a test reset signal transferred via the first bus during testing of the circuit device, and supplying the signal to the test access port controller.

Abstract: A scan control method of a circuit device including setting information indicating scan mode in a register is provided. The scan control method includes cutting an output of scan-out data to a test access port controller and an input of scan-in data from a data register based on information set in the register, and controlling a connection between a scan register and a data register. Each data/scan register includes data registers for the same number of chains to be scanned at the same time. Data set in one data register may be kept in all the data registers in parallel and scanned in all the scan chains in a scan-in process in the broadcast mode. The data set in the data register may be kept in the data register corresponding to the scan register and scanned in the corresponding scan chain, in a scan-in process in the parallel mode.

Abstract: In an information processing apparatus that includes a first and second semiconductor devices that are connected to each other and also includes a system control device that is connected to the first and second semiconductor devices, the timers that are mounted on the semiconductor devices are all synchronized by successively performing a timer correction process between a semiconductor device in which the timer is synchronized and a semiconductor device, adjacent to the semiconductor device, in which the timer is not synchronized, and, when an error occurs in the information processing device, the value in the synchronized timer and the error information are stored in a predetermined register.