Patents by Inventor Takayuki Kinoshita
Takayuki Kinoshita has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20110069717Abstract: A data transfer device includes a plurality of input queues, a plurality of arbitration control units provided for the respective input queues, and an input queue selecting unit that selects any one of the input queues based on a priority set for each input queue, and outputs data from the selected input queue. Each arbitration control unit includes a register that stores therein a predetermined upper limit, a counter that counts the amount of data output from a corresponding input queue, and a control circuit that, when a value of the counter becomes equal to or greater than the upper limit stored in the register, causes the input queue selecting unit to update the priority and resets the value of the counter.Type: ApplicationFiled: November 22, 2010Publication date: March 24, 2011Applicant: Fujitsu LimitedInventors: Hidekazu Osano, Takayuki Kinoshita, Yoshikazu Iwami, Makoto Hataida
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Patent number: 7913028Abstract: When a new data relaying device that has yet to have configuration information set therein is incorporated, the configuration information of an existing data relaying device is copied to the new data relaying device.Type: GrantFiled: April 20, 2007Date of Patent: March 22, 2011Assignee: Fujitsu LimitedInventors: Takayuki Kinoshita, Junji Ichimiya, Shintaro Itozawa, Koichi Odahara
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Publication number: 20110038374Abstract: Each chip arranged in each crossbar switch creates and issues, if a packet is input, a log collection packet for collecting a log of the packet. Each chip collects a log related to a transfer of the input packet. Each chip embeds, in the issued log collection packet or a log collection packet transferred from a crossbar switch in a previous stage, the collected log. If a transfer destination of the packet is other than the crossbar switches, each chip stores, in a storage space, the log embedded in the log collection packet and then transfers, to the transfer destination, only an original packet in which the log is deleted. In contrast, if the transfer destination is a crossbar switch, each chip transfers the log collection packet to a crossbar switch in a next stage.Type: ApplicationFiled: October 21, 2010Publication date: February 17, 2011Applicant: Fujitsu LimitedInventors: Seiji Satta, Akira Okamoto, Takayuki Kinoshita, Makoto Hataida
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Patent number: 7830902Abstract: A plurality of units (processing units) connected to a crossbar are divided into a plurality of groups and one is selected from requests selected for each group according to priority among the groups that changes at prescribed time intervals. Thus, the number of times per unit time requests issued from units belonging to a group whose priority is improved at the prescribed time intervals can be maintained over a certain value regardless of a request state.Type: GrantFiled: April 26, 2007Date of Patent: November 9, 2010Assignee: Fujitsu LimitedInventors: Junji Ichimiya, Takayuki Kinoshita, Shintarou Itozawa
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Patent number: 7823027Abstract: A configuration is such as to change a mode setup of other crossbars influenced by an error occurring in one of plural crossbars from a first mode to a second mode for operating each of them independently (i.e., in a singularization mode) in the case of placing plural crossbars (i.e., crossbar units) for connecting incorporated units (i.e., processing units) and operating the plural crossbars in the first mode (i.e., a dualized mode) for dualizing them, thereby continuing an operation of a system by using a normally operable part when an error occurs in a part of the system.Type: GrantFiled: April 30, 2007Date of Patent: October 26, 2010Assignee: Fujitsu LimitedInventors: Shintarou Itozawa, Takayuki Kinoshita, Junji Ichimiya
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Patent number: 7802041Abstract: According to an aspect of an embodiment, an apparatus has a pair of first system boards, each of the first system boards including a processor and being adapted for sending duplicate requests, in parallel, respectively, a second system board including a processor and being adapted for sending requests, a first transfer device for transferring requests, having a first arbiter for selecting and outputting one of the duplicate requests sent from each of the first system boards, and a second arbiter for selecting and outputting one of the requests sent from the second system board and a second transfer device for transferring requests, having a third arbiter for selecting one of the duplicate requests sent from each of the first system boards and outputting the selected request in synchronization with the selected request outputted by the first arbiter, the second transfer device having a forth arbiter.Type: GrantFiled: July 24, 2008Date of Patent: September 21, 2010Assignee: Fujitsu LimitedInventors: Takayuki Kinoshita, Junji Ichimiya
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Publication number: 20100228869Abstract: A linkup state generating method for generating a state in which linkup is completed in first and second information processing apparatuses, the first and second information processing apparatuses each including a linkup function of, with parameter exchange, comparing parameters included in the first and second information processing apparatuses and adjusting specifications of the parameters so that the specifications of the parameters match each other, the linkup state generating method including setting, from the outside, a parameter in the first information processing apparatus so that a specification of the parameter included in the first information processing apparatus matches a specification of a parameter included in the second information processing apparatus, and sending, from the first information processing apparatus, a signal received from the second information processing apparatus to the second information processing apparatus in a manner that the second information processing apparatus recogniType: ApplicationFiled: December 3, 2009Publication date: September 9, 2010Applicant: FUJITSU LIMITEDInventors: Yoshikazu IWAMI, Hidekazu Osano, Takayuki Kinoshita
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Patent number: 7787748Abstract: A head position estimator estimates the present position of a head relative to a recording medium, an LBA calculator for calculating positions of a data block to be read next and other data blocks existing before and after the data block, and a moving destination determiner for determining a data block at which the time required to move the head is the shortest, as a data block to be read next, on the basis of the present position of the head, which has been estimated by the head position estimator, and the positions of the respective data blocks, which have been calculated by the LBA calculator.Type: GrantFiled: December 1, 2003Date of Patent: August 31, 2010Assignee: Hitachi Global Storage Technologies Netherlands B.V.Inventors: Takayuki Kinoshita, Hiroshi Oshikawa, Tetsuya Tamura, Hiroshi Uchida
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Patent number: 7694517Abstract: A master cylinder designed to facilitate an operation of assembling and adjusting a check valve is provided. A supply passage for supplying operating fluid from a reservoir 2 to a pressure chamber 6 is formed in a cylinder body 3 connected to the reservoir 2. A bypass 37 for bypassing the supply passage connecting the reservoir 2 and the pressure chamber 6 is formed and provided with a check valve system 34 adapted to open when a pressure in the pressure chamber 6 is lower than that in the reservoir 2. A valve case 38 and a covering member 32 constitute a cartridge 39, which accommodates a valve body 41 and an urging spring 42, so as to form a check valve system 34. The cartridge 39 is placed in a valve chamber 33 of the bypass 37.Type: GrantFiled: August 28, 2007Date of Patent: April 13, 2010Assignee: Hitachi, Ltd.Inventors: Takato Ogiwara, Takayuki Kinoshita, Naganori Koshimizu, Tomonori Mouri
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Publication number: 20090249143Abstract: A scan control method for a circuit device connected with a first bus and having a test access port controller, including setting information indicating a register to be scanned in the circuit device, a number of scan shifts and a scan start via a second bus different from the first bus, and generating based on the information set, by using a sequencer, a signal replacing a test mode signal and a test reset signal transferred via the first bus during testing of the circuit device, and supplying the signal to the test access port controller.Type: ApplicationFiled: March 3, 2009Publication date: October 1, 2009Applicant: FUJITSU LIMITEDInventors: Yoshikazu Iwami, Takayuki Kinoshita, Hidekazu Osano
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Publication number: 20090249145Abstract: A scan control method of a circuit device including setting information indicating scan mode in a register is provided. The scan control method includes cutting an output of scan-out data to a test access port controller and an input of scan-in data from a data register based on information set in the register, and controlling a connection between a scan register and a data register. Each data/scan register includes data registers for the same number of chains to be scanned at the same time. Data set in one data register may be kept in all the data registers in parallel and scanned in all the scan chains in a scan-in process in the broadcast mode. The data set in the data register may be kept in the data register corresponding to the scan register and scanned in the corresponding scan chain, in a scan-in process in the parallel mode.Type: ApplicationFiled: February 12, 2009Publication date: October 1, 2009Applicant: Fujitsu LimitedInventors: Yoshikazu IWAMI, Takayuki KINOSHITA, Hidekazu OSANO
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Publication number: 20090241768Abstract: A master cylinder comprises a bottomed cylindrical cylinder body, a piston formed into a bottomed cylindrical shape by the forging method and slidably disposed in the cylinder body, and a spring assembly comprising a spring urging the piston toward an opening side of the cylinder body. A length of a spring of the spring assembly is determined by a retainer which can abut against an inner bottom portion of the piston. An annular groove is formed on the most outer side of the inner bottom portion of the piston by the forging method.Type: ApplicationFiled: March 23, 2009Publication date: October 1, 2009Inventors: Takato Ogiwara, Takayuki Kinoshita
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Publication number: 20090025385Abstract: An object of the present invention is to make it possible to easily improve precision with which the valve body is seated on the valve seat of the check valve, and provide a master cylinder which can be easily manufactured and in which high precision is realized. In a master cylinder, a supply passage for supplying operating liquid from a reservoir 2 to a pressure chamber 6 is provided in a cylinder body 3 coupled with the reservoir 2. A bypass passage 37 for bypassing the supply passage and connecting the reservoir 2 and the pressure chamber 6 is further provided, and a check valve 34 adapted to open when a pressure in the pressure chamber 6 is lower than that in the reservoir 2 is disposed in the bypass passage 37. A valve case 38 containing a valve body 41 of the check valve 34 comprises a valve seat 40 which the valve body 41 is seated on and moves away from, and a cylindrical wall 45 for slidably guiding the valve body 41 which are integrally formed as a single member.Type: ApplicationFiled: July 25, 2008Publication date: January 29, 2009Inventors: Takato Ogiwara, Takayuki Kinoshita
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Publication number: 20090031064Abstract: According to an aspect of an embodiment, an apparatus has a pair of first system boards, each of the first system boards including a processor and being adapted for sending duplicate requests, in parallel, respectively, a second system board including a processor and being adapted for sending requests, a first transfer device for transferring requests, having a first arbiter for selecting and outputting one of the duplicate requests sent from each of the first system boards, and a second arbiter for selecting and outputting one of the requests sent from the second system board and a second transfer device for transferring requests, having a third arbiter for selecting one of the duplicate requests sent from each of the first system boards and outputting the selected request in synchronization with the selected request outputted by the first arbiter, the second transfer device having a forth arbiter.Type: ApplicationFiled: July 24, 2008Publication date: January 29, 2009Applicant: FUJITSU LIMITEDInventors: Takayuki Kinoshita, Junji Ichimiya
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Publication number: 20080173015Abstract: A master cylinder designed to facilitate an operation of assembling and adjusting a check valve is provided. A supply passage for supplying operating fluid from a reservoir 2 to a pressure chamber 6 is formed in a cylinder body 3 connected to the reservoir 2. A bypass 37 for bypassing the supply passage connecting the reservoir 2 and the pressure chamber 6 is formed and provided with a check valve system 34 adapted to open when a pressure in the pressure chamber 6 is lower than that in the reservoir 2. A valve case 38 and a covering member 32 constitute a cartridge 39, which accommodates a valve body 41 and an urging spring 42, so as to form a check valve system 34. The cartridge 39 is placed in a valve chamber 33 of the bypass 37.Type: ApplicationFiled: August 28, 2007Publication date: July 24, 2008Inventors: Takato Ogiwara, Takayuki Kinoshita, Naganori Koshimizu, Tomonori Mouri
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Publication number: 20080043767Abstract: A plurality of units (processing units) connected to a crossbar are divided into a plurality of groups and one is selected from requests selected for each group according to priority among the groups that changes at prescribed time intervals. Thus, the number of times per unit time requests issued from units belonging to a group whose priority is improved at the prescribed time intervals can be maintained over a certain value regardless of a request state.Type: ApplicationFiled: April 26, 2007Publication date: February 21, 2008Applicant: FUJITSU LIMITEDInventors: Junji Ichimiya, Takayuki Kinoshita, Shintarou Itozawa
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Publication number: 20080046622Abstract: An address crossbar switch temporarily buffers received requests while monitoring the requests, and counts requests of a predetermined type (for example, long-packet address requests). When a counter value exceeds a predetermined threshold value (for example, when a long-packet counter value exceeds 100), the address crossbar switch suspends broadcasting the address requests for a predetermined time period. After the predetermined time period has elapsed, the address crossbar switch restarts broadcasting the address requests in the order in which they were received.Type: ApplicationFiled: April 17, 2007Publication date: February 21, 2008Applicant: FUJITSU LIMITEDInventors: Takayuki Kinoshita, Junji Ichimiya, Shintarou Itozawa
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Publication number: 20080046629Abstract: A configuration is such as to change a mode setup of other crossbars influenced by an error occurring in one of plural crossbars from a first mode to a second mode for operating each of them independently (i.e., in a singularization mode) in the case of placing plural crossbars (i.e., crossbar units) for connecting incorporated units (i.e., processing units) and operating the plural crossbars in the first mode (i.e., a dualized mode) for dualizing them, thereby continuing an operation of a system by using a normally operable part when an error occurs in a part of the system.Type: ApplicationFiled: April 30, 2007Publication date: February 21, 2008Applicant: FUJITSU LIMITEDInventors: Shintarou Itozawa, Takayuki Kinoshita, Junji Ichimiya
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Publication number: 20080043734Abstract: When a new data relaying device that has yet to have configuration information set therein is incorporated, the configuration information of an existing data relaying device is copied to the new data relaying device.Type: ApplicationFiled: April 20, 2007Publication date: February 21, 2008Applicant: FUJITSU LIMITEDInventors: Takayuki Kinoshita, Junji Ichimiya, Shintaro Itozawa, Koichi Odahara
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Publication number: 20060212749Abstract: A communication method for detecting failure and for performing immediate stop processing is provided. It is a failure communication method of a computer, comprising a plurality of units A, separated by partitions, and a unit B interconnecting the units A, in which the unit B broadcasts identical information, generated based on information transferred from the units A to the unit B, to the units A, wherein when failure occurs in a unit A, the unit B is notified of failure information, receives the failure information, generates identical failure information based on the failure information and notifies the units A in normal conditions of the identical failure information, and the units A receive the identical failure information, if it is from a unit A belonging to the same partition, operation of the units A belonging to the same partition is s topped immediately, and otherwise operation of the units A is continued.Type: ApplicationFiled: September 29, 2005Publication date: September 21, 2006Applicant: FUJITSU LIMITEDInventors: Shigeru Kawahara, Takayuki Kinoshita, Shintaro Itozawa, Koji Hosoe, Sakutaro Sato