Patents by Inventor Takayuki Komiya

Takayuki Komiya has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6573191
    Abstract: Both of a first insulating film and a second insulating film are formed by a spin coating method. Accordingly, the formation of the first insulating film and the second insulating film can be performed in the same SOD processing system. Moreover, the aforesaid formation of both of the first insulating film and the second insulating film by the spin coating method can provide favorable low dielectric constant properties and good adhesion of the first insulating film and the second insulating film.
    Type: Grant
    Filed: September 20, 2000
    Date of Patent: June 3, 2003
    Assignee: Tokyo Electron Limited
    Inventors: Takayuki Komiya, Shinji Nagashima, Shigeyoshi Kojima
  • Patent number: 6515945
    Abstract: Locking claw engages a recording medium to be transferred, and a determination is made as to which of a plurality of predetermined points a current position of the locking member corresponds to. Current position of the recording medium can be determined indirectly on the basis of the thus-determined predetermined point corresponding to the current position of the locking member. If any recording medium is not properly settled in a predetermined rest position at power-ON, then the recording medium is automatically transferred to be settled in the predetermined rest position. Simplified detection of the position of the locking claw is made in absolute or quasi-absolute form, by a picker position detector unit that is provided in association with a rotating drive shaft of the locking member and employs a simply-constructed mechanism capable of generating detection pulses responsive to predetermined rotational angles of two shafts rotating at different rates.
    Type: Grant
    Filed: March 10, 1999
    Date of Patent: February 4, 2003
    Assignee: Hitachi Electronics Engineering Co., Ltd.
    Inventors: Hiroyuki Suzuki, Takayuki Komiya, Katsumasa Yokoyama, Hitoshi Kimura
  • Publication number: 20020176328
    Abstract: Locking claw engages a recording medium to be transferred, and a determination is made as to which of a plurality of predetermined points a current position of the locking member corresponds to. Current position of the recording medium can be determined indirectly on the basis of the thus-determined predetermined point corresponding to the current position of the locking member. If any recording medium is not properly settled in a predetermined rest position at power-ON, then the recording medium is automatically transferred to be settled in the predetermined rest position. Simplified detection of the position of the locking claw is made in absolute or quasi-absolute form, by a picker position detector unit that is provided in association with a rotating drive shaft of the locking member and employs a simply-constructed mechanism capable of generating detection pulses responsive to predetermined rotational angles of two shafts rotating at different rates.
    Type: Application
    Filed: March 10, 1999
    Publication date: November 28, 2002
    Inventors: HIROYUKI SUZUKI, TAKAYUKI KOMIYA, KATSUMASA YOKOYAMA, HITOSHI KIMURA
  • Patent number: 6001729
    Abstract: A semiconductor device with a contact structure includes a silicon substrate, a diffusion region formed in a surface of the silicon substrate, a silicide film of a high melting point metal deposited on the diffusion region, an insulating film formed on the silicon substrate, a contact hole formed in the insulating film such that the silicide film is exposed at a bottom of the contact hole, an anti-diffusion film formed on at least the exposed surface of the silicide film at the bottom of the contact film, a plug formed in the contact hole by selective Al-CVD, and a metal wiring formed on the insulating film. The metal wiring is electrically connected to the diffusion region by the plug, the anti-diffusion film and the silicide film. The anti-diffusion film is formed by nitriding the surface of the silicide film such that only the grain boundaries of the grains of the silicide film are nitrided.
    Type: Grant
    Filed: August 14, 1998
    Date of Patent: December 14, 1999
    Assignee: Kawasaki Steel Corporation
    Inventors: Hiroshi Shinriki, Takayuki Komiya, Hiroshi Yamamoto
  • Patent number: 5904557
    Abstract: A method for forming a multilevel interconnection of a semiconductor device of the present invention includes the steps of forming a first wiring layer by depositing a metallic film containing aluminum on an insulating film of a substrate and patterning the metallic film, forming an interlayer insulating film on the entire surface of the substrate to cover the wiring layer from the upper side, forming a connection hole reaching to the first wiring layer at a predetermined position of the interlayer insulating film, selectively depositing aluminum onto an interior of the connection hole at a volume fraction of 100% or more by CVD to fill the interior of the connection hole, flattening the entire upper surface of the interlayer insulating film including the connection hole filled with aluminum by a polishing process, washing the entire surface flattened by the polishing process, and depositing the metallic film containing aluminum at a predetermined position of the upper surface of the flattened and washed inte
    Type: Grant
    Filed: February 4, 1997
    Date of Patent: May 18, 1999
    Assignee: Tokyo Electron Limited
    Inventors: Takayuki Komiya, Yumiko Kawano
  • Patent number: 5834846
    Abstract: A semiconductor device with a contact structure includes a silicon substrate, a diffusion region formed in a surface of the silicon substrate, a silicide film of a high melting point metal deposited on the diffusion region, an insulating film formed on the silicon substrate, a contact hole formed in the insulating film such that the silicide film is exposed at a bottom of the contact hole, an anti-diffusion film formed on at least the exposed surface of the silicide film at the bottom of the contact film, a plug formed in the contact hole by selective Al--CVD, and a metal wiring formed on the insulating film. The metal wiring is electrically connected to the diffusion region by the plug, the anti-diffusion film and the silicide film. The anti-diffusion film is formed by nitriding the surface of the silicide film such that only the grain boundaries of the grains of the silicide film are nitrided.
    Type: Grant
    Filed: August 23, 1995
    Date of Patent: November 10, 1998
    Assignee: Kawasaki Steel Corporation
    Inventors: Hiroshi Shinriki, Takayuki Komiya, Hiroshi Yamamoto
  • Patent number: 5830280
    Abstract: A polishing treatment called CMP (chemical mechanical polishing) is utilized for filling a contact hole formed in a silicon oxide film with a metallic layer in a manufacturing process of a semiconductor device. After a CMP treatment, a target surface, on which the silicon oxide film and the metallic layer are exposed, is washed with a washing liquid so as to remove residues due to the CMP treatment. The washing liquid comprises a fluorine compound for providing an etchant for the silicon oxide film and the metallic layer, and a protective agent which can be adhered onto a surface of the metallic layer so as to form a protective film. The ratio between the fluorine compound and the protective agent is set such that etching rates of the silicon oxide film and the metallic layer to be effected by the washing liquid fall within ranges of from 0.5 nm/min to 5 nm/min and from 0.5 nm/min to 6 nm/min, respectively, and a ratio between these etching rates falls within a range of from "2:1" to "1:3".
    Type: Grant
    Filed: March 14, 1997
    Date of Patent: November 3, 1998
    Assignee: Tokyo Electron Limited
    Inventors: Yoshihide Sato, Takayuki Komiya, Hiroki Ohno
  • Patent number: 5652180
    Abstract: A semiconductor device with a contact structure includes a silicon substrate, a diffusion region formed in a surface of the silicon substrate, a silicide film of high melting point metal deposited on the diffusion region, an insulating film formed on the silicon substrate, a contact hole formed in the insulating film such that the silicide film is exposed at a bottom of the contact hole, an anti-diffusion film formed on the exposed surface of the silicide film at the bottom of the contact film, a plug formed in the contact hole by a selective Al CVD, and a metal wiring formed on the insulating film such that the metal wiring is electrically connected to the diffusion region by means of the plug, anti-diffusion film and silicide film. The anti-diffusion film may be formed by nitriding the surface of the silicide film.
    Type: Grant
    Filed: June 24, 1994
    Date of Patent: July 29, 1997
    Assignee: Kawasaki Steel Corporation
    Inventors: Hiroshi Shinriki, Hiroshi Yamamoto, Nobuyuki Takeyasu, Takayuki Komiya, Tomohiro Ohta