Patents by Inventor Takayuki Shibasaki

Takayuki Shibasaki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11837323
    Abstract: A device including: defining unit to define lattice space that is collection of lattices compound groups are sequentially arranged; limiting unit to, in the case where any of the compound groups is arranged in any of the lattices of lattice space followed by arranging next compound group in the lattice space, generate limited lattice space created by eliminating, from the lattice space, undesirable regions for the next compound group to be arranged; and assigning unit to assign bit to each of lattice points, to which the compound groups can be arranged, in the limited lattice space; and an arithmetic unit configured to perform ground state search on Ising model obtained through conversion based on restriction conditions related to each lattice point according to simulated annealing, to calculate minimum energy of the Ising model, wherein the device is for searching compound in which the compound groups are linked with one another.
    Type: Grant
    Filed: August 7, 2019
    Date of Patent: December 5, 2023
    Assignee: FUJITSU LIMITED
    Inventors: Taiki Uemura, Takayuki Shibasaki
  • Publication number: 20230131088
    Abstract: In an optimization apparatus, a computing unit searches for the ground state of an Ising model generated by converting an optimization problem to be solved, based on Ising model information representing the Ising model and a temperature parameter. A control unit determines the minimum value of the temperature parameter, based on a resolution in energy of the computing unit for the Ising model and a first reference value indicating an acceptance probability of state transition in the Ising model at the minimum value, determines a maximum amount of change in energy, based on the Ising model information, determines the maximum value of the temperature parameter, based on the determined maximum amount of change in energy and a second reference value that is greater than the first reference value and indicates the acceptance probability at the maximum value, and sends the minimum and maximum values to the computing unit.
    Type: Application
    Filed: December 23, 2022
    Publication date: April 27, 2023
    Applicant: FUJITSU LIMITED
    Inventor: Takayuki SHIBASAKI
  • Patent number: 11599073
    Abstract: A problem is inputted into an operation unit. A computation unit searches for a ground state of an Ising model. A management unit converts the problem inputted from the operation unit to the Ising model, inputs the Ising model produced by conversion and initial operating conditions into the computation unit, and has the computation unit search for the ground state using overall operating conditions produced by changing the initial operating conditions based on a result of the computation unit searching for the ground state using the initial operating conditions.
    Type: Grant
    Filed: February 25, 2019
    Date of Patent: March 7, 2023
    Assignee: FUJITSU LIMITED
    Inventors: Jumpei Koyama, Kazuya Takemoto, Motomu Takatsu, Satoshi Matsubara, Takayuki Shibasaki, Noboru Yoneoka, Toshiyuki Miyazawa, Akihiko Ohwada, Sanroku Tsukamoto
  • Patent number: 11568204
    Abstract: In an optimization apparatus, a computing unit searches for the ground state of an Ising model generated by converting an optimization problem to be solved, based on Ising model information representing the Ising model and a temperature parameter. A control unit determines the minimum value of the temperature parameter, based on a resolution in energy of the computing unit for the Ising model and a first reference value indicating an acceptance probability of state transition in the Ising model at the minimum value, determines a maximum amount of change in energy, based on the Ising model information, determines the maximum value of the temperature parameter, based on the determined maximum amount of change in energy and a second reference value that is greater than the first reference value and indicates the acceptance probability at the maximum value, and sends the minimum and maximum values to the computing unit.
    Type: Grant
    Filed: July 29, 2019
    Date of Patent: January 31, 2023
    Assignee: FIJITSU LIMITED
    Inventor: Takayuki Shibasaki
  • Patent number: 11551062
    Abstract: A transition control unit detects, when stochastically determining based on a temperature, energy changes, and a random number whether to accept any of a plurality of state transitions according to a relative relationship between the energy changes and thermal excitation energy, a minimum value among the energy changes. The transition control unit then subtracts, when the minimum value is positive, an offset obtained by multiplying the minimum value by a value M that is greater than 0 and less than or equal to 1 from each of the energy changes corresponding to the plurality of state transitions.
    Type: Grant
    Filed: January 7, 2019
    Date of Patent: January 10, 2023
    Assignee: FUJITSU LIMITED
    Inventors: Takayuki Shibasaki, Hirotaka Tamura
  • Patent number: 11537916
    Abstract: An optimization apparatus includes a memory; and a processor coupled to the memory and the processor configured to: compute a local solution for a combinatorial optimization problem based on a first evaluation function representing the combinatorial optimization problem, select a state variable group targeted by partial problems from the plurality of state variables based on a first state variable whose value at the local solution is a predetermined value among the plurality of state variables included in the first evaluation function, a weight coefficient representing a magnitude of an interaction between the plurality of state variables held in a storage unit, and input selection region information, search a ground state for a second evaluation function representing the partial problems for the selected state variable group, and generate a whole solution by updating the local solution based on the partial solutions acquired by the ground state search.
    Type: Grant
    Filed: June 11, 2020
    Date of Patent: December 27, 2022
    Assignee: FUJITSU LIMITED
    Inventors: Toshiyuki Miyazawa, Takayuki Shibasaki, Taiki Uemura
  • Publication number: 20210382960
    Abstract: An apparatus includes: a communication circuit configured to communicate with a search circuit configured to search for a solution minimizing a value of an objective function; and a processing circuit configured to: cause the search circuit to execute the search by using each of a first state and a second state as a starting point, the search being configured to change a value of a predetermined external parameter affecting an increase or decrease in the value of the objective function in a direction of promoting an increase in the value of the objective function; acquire a first state group obtained using the first state and a second state group obtained using the second state; determine a third state among unsearched states by using the first state group and the second state group; and cause the search circuit to execute the search by using the third state as the starting point.
    Type: Application
    Filed: March 2, 2021
    Publication date: December 9, 2021
    Applicant: FUJITSU LIMITED
    Inventors: Matthieu Parizy, Takayuki Shibasaki
  • Publication number: 20210256356
    Abstract: An information processing method includes generating a second state variable, based on fixed portion information indicating a first state variable among a plurality of state variables included in a first evaluation function representative of energy of an Ising model, generating a second evaluation function by adding, to the first evaluation function, a function that includes the first state variable and the second state variable, becomes a constant value when the first state variable changes from a first initial value, and becomes 0 when the first state variable does not change from the first initial value, and outputting information on the second evaluation function, the first initial value, and a second initial value of the second state variable.
    Type: Application
    Filed: December 15, 2020
    Publication date: August 19, 2021
    Applicant: FUJITSU LIMITED
    Inventor: Takayuki Shibasaki
  • Publication number: 20210248186
    Abstract: An optimization apparatus, includes a memory; and a processor coupled to the memory and configured to: extract a set of variables satisfying a part of constraint conditions of a combinatorial optimization problem based on problem data indicating the combinatorial optimization problem, generate an evaluation function with the reduced constraint conditions based on the problem data and the extracted set of variables, and execute a search for a ground state for the generated evaluation function.
    Type: Application
    Filed: February 3, 2021
    Publication date: August 12, 2021
    Applicant: FUJITSU LIMITED
    Inventors: Toshiyuki Miyazawa, Takayuki Shibasaki
  • Publication number: 20200410372
    Abstract: An optimization apparatus includes a memory; and a processor coupled to the memory and the processor configured to: compute a local solution for a combinatorial optimization problem based on a first evaluation function representing the combinatorial optimization problem, select a state variable group targeted by partial problems from the plurality of state variables based on a first state variable whose value at the local solution is a predetermined value among the plurality of state variables included in the first evaluation function, a weight coefficient representing a magnitude of an interaction between the plurality of state variables held in a storage unit, and input selection region information, search a ground state for a second evaluation function representing the partial problems for the selected state variable group, and generate a whole solution by updating the local solution based on the partial solutions acquired by the ground state search.
    Type: Application
    Filed: June 11, 2020
    Publication date: December 31, 2020
    Applicant: FUJITSU LIMITED
    Inventors: Toshiyuki Miyazawa, Takayuki Shibasaki, Taiki Uemura
  • Publication number: 20200135295
    Abstract: A device including: a defining unit to define lattice space that is collection of lattices where compound groups are sequentially arranged; a limiting unit; an assigning unit; an arithmetic unit; a judging unit; and a controlling unit to cause the limiting unit to execute expansion of the limited lattice space, the assigning unit to execute assignment of the bits to the lattice points included in the limited lattice space after the expansion, and the arithmetic unit to execute calculation of the minimum energy, in case where the judging unit judges any of the compound groups assigned to the lattice points is arranged on the outermost edge, wherein the device is device for searching the compound, in which the compound groups are linked with one another.
    Type: Application
    Filed: September 11, 2019
    Publication date: April 30, 2020
    Applicant: FUJITSU LIMITED
    Inventors: Takayuki Shibasaki, Taiki Uemura
  • Publication number: 20200090026
    Abstract: In an optimization apparatus, a computing unit searches for the ground state of an Ising model generated by converting an optimization problem to be solved, based on Ising model information representing the Ising model and a temperature parameter. A control unit determines the minimum value of the temperature parameter, based on a resolution in energy of the computing unit for the Ising model and a first reference value indicating an acceptance probability of state transition in the Ising model at the minimum value, determines a maximum amount of change in energy, based on the Ising model information, determines the maximum value of the temperature parameter, based on the determined maximum amount of change in energy and a second reference value that is greater than the first reference value and indicates the acceptance probability at the maximum value, and sends the minimum and maximum values to the computing unit.
    Type: Application
    Filed: July 29, 2019
    Publication date: March 19, 2020
    Applicant: FUJITSU LIMITED
    Inventor: Takayuki SHIBASAKI
  • Publication number: 20200082904
    Abstract: A device including: defining unit to define lattice space that is collection of lattices compound groups are sequentially arranged; limiting unit to, in the case where any of the compound groups is arranged in any of the lattices of lattice space followed by arranging next compound group in the lattice space, generate limited lattice space created by eliminating, from the lattice space, undesirable regions for the next compound group to be arranged; and assigning unit to assign bit to each of lattice points, to which the compound groups can be arranged, in the limited lattice space; and an arithmetic unit configured to perform ground state search on Ising model obtained through conversion based on restriction conditions related to each lattice point according to simulated annealing, to calculate minimum energy of the Ising model, wherein the device is for searching compound in which the compound groups are linked with one another.
    Type: Application
    Filed: August 7, 2019
    Publication date: March 12, 2020
    Applicant: FUJITSU LIMITED
    Inventors: Taiki Uemura, Takayuki Shibasaki
  • Publication number: 20190286077
    Abstract: A problem is inputted into an operation unit. A computation unit searches for a ground state of an Ising model. A management unit converts the problem inputted from the operation unit to the Ising model, inputs the Ising model produced by conversion and initial operating conditions into the computation unit, and has the computation unit search for the ground state using overall operating conditions produced by changing the initial operating conditions based on a result of the computation unit searching for the ground state using the initial operating conditions.
    Type: Application
    Filed: February 25, 2019
    Publication date: September 19, 2019
    Applicant: FUJITSU LIMITED
    Inventors: Jumpei KOYAMA, Kazuya TAKEMOTO, Motomu TAKATSU, Satoshi MATSUBARA, Takayuki SHIBASAKI, Noboru YONEOKA, Toshiyuki MIYAZAWA, Akihiko OHWADA, Sanroku TSUKAMOTO
  • Publication number: 20190220732
    Abstract: A transition control unit detects, when stochastically determining based on a temperature, energy changes, and a random number whether to accept any of a plurality of state transitions according to a relative relationship between the energy changes and thermal excitation energy, a minimum value among the energy changes. The transition control unit then subtracts, when the minimum value is positive, an offset obtained by multiplying the minimum value by a value M that is greater than 0 and less than or equal to 1 from each of the energy changes corresponding to the plurality of state transitions.
    Type: Application
    Filed: January 7, 2019
    Publication date: July 18, 2019
    Applicant: FUJITSU LIMITED
    Inventors: Takayuki Shibasaki, Hirotaka TAMURA
  • Patent number: 10326582
    Abstract: An optical transmitter includes: an optical modulator, a phase adjustment circuit, first and second synchronization circuits, and first and second drive circuits. The optical modulator includes a first modulation area and a second modulation area that is provided at output side of the first modulation area. The phase adjustment circuit adjusts a phase of a first clock signal so as to generate a second clock signal. The first and second synchronization circuits respectively output first and second electric signals in synchronization with the first and second clock signals. The first and second drive circuits respectively drive the first and second modulation areas with the first and second electric signals.
    Type: Grant
    Filed: March 16, 2018
    Date of Patent: June 18, 2019
    Assignee: FUJITSU LIMITED
    Inventors: Yasufumi Sakai, Takayuki Shibasaki
  • Patent number: 10225069
    Abstract: A CDR circuit includes: a comparison circuit that receives data signal on which a first clock signal is superimposed, and outputs a comparison result obtained by comparing the data signal with three different threshold values at a timing synchronized with a second clock signal; a data pattern detection circuit that detects an occurrence of a data pattern, based on the comparison result; a frequency detection circuit that outputs, when an occurrence of the data pattern is detected, a detection result indicating whether a second frequency of the second clock signal is higher than a first frequency of the first clock signal; an adjustment circuit that outputs, based on the detection result, an adjustment signal for adjusting a phase of the second clock signal and the second frequency; and an oscillator circuit that outputs the second clock signal with the phase and the second frequency adjusted, based on the adjustment signal.
    Type: Grant
    Filed: January 29, 2018
    Date of Patent: March 5, 2019
    Assignee: FUJITSU LIMITED
    Inventors: Wahid Rahman, Ali Sheikholeslami, Takayuki Shibasaki, Hirotaka Tamura
  • Publication number: 20180316483
    Abstract: An optical transmitter includes: an optical modulator, a phase adjustment circuit, first and second synchronization circuits, and first and second drive circuits. The optical modulator includes a first modulation area and a second modulation area that is provided at output side of the first modulation area. The phase adjustment circuit adjusts a phase of a first clock signal so as to generate a second clock signal. The first and second synchronization circuits respectively output first and second electric signals in synchronization with the first and second clock signals. The first and second drive circuits respectively drive the first and second modulation areas with the first and second electric signals.
    Type: Application
    Filed: March 16, 2018
    Publication date: November 1, 2018
    Applicant: FUJITSU LIMITED
    Inventors: Yasufumi Sakai, Takayuki Shibasaki
  • Patent number: 10103911
    Abstract: A comparator circuit outputs a comparison result obtained by comparing a data signal with a threshold whose magnitude is adjusted based on a first offset value at a timing synchronized with a second clock signal whose phase is adjusted based on a difference in phase between the data signal and a first clock signal and a second offset value. An eye monitor circuit thins comparison results obtained in a clock data recovery (CDR) circuit for individual symbols of the data signal by comparing the data signal with a threshold, selects a comparison result corresponding to a symbol for which the comparison result is obtained by the comparator circuit, determines, by comparing the selected comparison result with the comparison result obtained by the comparator circuit, whether or not an error has occurred due to the first or second offset value, and outputs the number of times the error has occurred.
    Type: Grant
    Filed: March 6, 2018
    Date of Patent: October 16, 2018
    Assignee: FUJITSU LIMITED
    Inventor: Takayuki Shibasaki
  • Patent number: 10103870
    Abstract: A CDR circuit includes a data-determination-circuit to determine a value of a data-signal, based on a first comparison-result of comparing the data-signal with first threshold-values at a timing of a clock-signal, a comparison-circuit to compare the data-signal with a second threshold-value at the timing to generate a second comparison-result, a phase-detection-circuit to detect data-patterns in which first to third symbols are temporally consecutive, based on a determination-result, the data-patterns forming that a value of the second symbol is larger than the first symbol and smaller than the third symbol, or the in value of the second symbol is smaller than the first symbol and larger than the third symbol, wherein the phase-detection-circuit generates a phase-difference-signal for controlling a phase of the clock-signal to advance or delay, based on the second comparison-result at the second symbol, and a phase-adjustment-circuit to adjust the phase of the clock-signal based on the phase-difference-signal
    Type: Grant
    Filed: February 6, 2018
    Date of Patent: October 16, 2018
    Assignee: FUJITSU LIMITED
    Inventor: Takayuki Shibasaki