Patents by Inventor Takema Adachi

Takema Adachi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20170018494
    Abstract: An interposer includes an insulating plate including insulating layers and having first, second, third and fourth surfaces such that the second surface is on the opposite side of the first surface, the third surface is perpendicular to the first surface, the fourth surface is on the opposite side of the third surface, and the insulating layers are laminated on the third surface, and conductor layers formed in the insulating plate such that each conductor layer is interposed between adjacent insulating layers and includes straight conductors having first electrodes exposed from the first surface and second electrodes exposed from the second surface, respectively.
    Type: Application
    Filed: July 15, 2016
    Publication date: January 19, 2017
    Applicant: IBIDEN CO., LTD.
    Inventors: Kota NODA, Takema ADACHI
  • Publication number: 20160316558
    Abstract: A printed wiring board includes a resin insulating layer, a wiring conductor layer embedded in the insulating layer such that the wiring layer has first surface exposed from the insulating layer, and a conductor post formed in the insulating layer and on second surface of the wiring layer on the opposite side with respect to the first surface of the wiring layer such that the conductor post has side surface covered by the insulating layer and end surface exposed from the insulating layer on the opposite side with respect to the wiring layer. The conductor post is formed such that the side surface of the conductor post is a roughened side surface having surface roughness of first roughness R1, the end surface of the conductor post is a roughened end surface having surface roughness of second roughness R2, and the first and second roughnesses R1, R2 satisfy R1>R2.
    Type: Application
    Filed: March 30, 2016
    Publication date: October 27, 2016
    Applicant: IBIDEN CO., LTD.
    Inventors: Shunsuke SAKAI, Toshiki FURUTANI, Kosuke IKEDA, Takema ADACHI, Takayuki KATSUNO
  • Publication number: 20160295692
    Abstract: A printed wiring board includes a core substrate, and a first build-up wiring layer formed on the core substrate and including a wiring layer such that the wiring layer includes a resin insulating layer and a conductor layer laminated on the resin insulating layer. The first build-up wiring layer is formed on a first surface of the core substrate such that the first build-up wiring layer forms a high-rise region and a low-rise region with respect to a lamination direction, the first build-up wiring layer includes electrodes positioned to connect an electronic component to the first build-up wiring layer, and the first build-up wiring layer is formed such that the low-rise region is extending in two or more directions from the high-rise region to edges of the core substrate.
    Type: Application
    Filed: March 29, 2016
    Publication date: October 6, 2016
    Applicant: IBIDEN CO., LTD.
    Inventors: Koji ASANO, Takema Adachi
  • Publication number: 20160242285
    Abstract: A printed wiring board includes a resin insulating layer having recess portions formed on first surface, a first conductor layer formed in the recess portions and including pads positioned to mount an electronic component, conductive pillars formed on the pads, respectively, and formed to mount the electronic component onto the resin insulating layer, a second conductor layer formed on second surface of the resin insulating layer on the opposite side with respect to the first surface, and a via conductor formed in the resin insulating layer such that the via conductor is penetrating through the resin insulating layer and connecting the first and second conductor layers. The pillars is formed such that each of the pads has an exposed surface exposed from a respective one of the conductive pillars, and the pads are formed such that the exposed surface is recessed from the first surface of the resin insulating layer.
    Type: Application
    Filed: February 16, 2016
    Publication date: August 18, 2016
    Applicant: IBIDEN CO., LTD.
    Inventors: Takayuki Katsuno, Yuki Ito, Takeshi Furusawa, Takema Adachi
  • Patent number: 9420708
    Abstract: A method for manufacturing a printed wiring board includes preparing a core substrate having a metal layer having a first penetrating hole and insulation layers formed on the metal layer such that the metal layer is interposed between the insulation layers, forming in the core substrate a second penetrating hole having a first opening portion aligned with the first penetrating hole on a first-surface side of the core substrate and a second opening portion aligned with the first penetrating hole on a second-surface side of the core substrate, forming a first conductor on a first surface of the core substrate, forming a second conductor on a second surface of the core substrate on the opposite side of the first surface of the core substrate, and filling a conductive material in the second penetrating hole such that a through-hole conductor connecting the first conductor and the second conductor is formed.
    Type: Grant
    Filed: March 22, 2012
    Date of Patent: August 16, 2016
    Assignee: IBIDEN CO., LTD.
    Inventors: Toshiaki Hibino, Takema Adachi
  • Patent number: 9401320
    Abstract: A combined substrate includes a first substrate having multiple first metal posts, a second substrate having multiple second metal posts such that the second metal posts are positioned to oppose the first metal posts, respectively, and multiple solder structures interposed between the first metal posts and the second metal posts, respectively. The first metal posts and/or the second metal posts have recessed surfaces formed such that the solder structures are formed on the recessed surfaces, respectively.
    Type: Grant
    Filed: March 4, 2015
    Date of Patent: July 26, 2016
    Assignee: IBIDEN CO., LTD.
    Inventors: Tomoya Daizo, Takema Adachi, Takeshi Furusawa, Wataru Nakamura, Yuki Ito, Yuki Yoshikawa, Tomoyoshi Hirabayashi
  • Publication number: 20160014898
    Abstract: A printed wiring board includes a first circuit substrate having first pads and second pads such that the first pads are positioned to mount an electronic component on the first circuit substrate and that the second pads are positioned to electrically connect the first circuit substrate to a second circuit substrate, and metal posts including plating material and formed on the second pads respectively such that the metal posts are positioned to mount the second circuit substrate on the first circuit substrate. Each of the metal posts has a height h1 and a thickness b such that the metal posts have a value h1/b which is greater than 0.1 and smaller than 1.0 where the value h1/b is obtained by dividing the height h1 by the thickness b.
    Type: Application
    Filed: July 14, 2015
    Publication date: January 14, 2016
    Applicant: IBIDEN CO., LTD.
    Inventors: Takema Adachi, Wataru Nakamura, Tomoyoshi Hirabayashi
  • Patent number: 9185799
    Abstract: A printed wiring board includes a core substrate including an insulative substrate, a first conductive layer formed on first surface of the insulative substrate, and a second conductive layer formed on second surface of the insulative substrate, a first buildup laminated on first surface of the core and including an interlayer insulation layer, a conductive layer formed on the insulation layer, and a via conductor penetrating through the insulation layer and connected to the conductive layer, and a second buildup laminated on second surface of the core and including an interlayer insulation layer, a conductive layer formed on the interlayer insulation layer, and a via conductor penetrating through the insulation layer and connected to the conductive layer. The insulation layer of the first buildup has thermal expansion coefficient set higher than thermal expansion coefficient of the insulation layer of the second buildup.
    Type: Grant
    Filed: March 15, 2013
    Date of Patent: November 10, 2015
    Assignee: IBIDEN CO., LTD.
    Inventors: Naoto Ishida, Takema Adachi
  • Publication number: 20150271929
    Abstract: A method for manufacturing a wiring board having conductive posts includes preparing a wiring board including electronic circuit and a solder resist layer covering the electronic circuit and having first openings and second openings surrounding the first openings such that the first openings are exposing pad portions of the electronic circuit and that the second openings are exposing post connecting portions of the electronic circuit surrounding the pad portions, applying surface treatment to the pad portions, forming a plating resist layer on the wiring board after the surface treatment of the pad portions such that the plating resist layer has resist openings exposing the post connecting portions, applying electrolytic plating on the post connecting portions such that conductive posts rising from the post connecting portions are formed in the resist openings, and removing the plating resist layer from the wiring board after forming the conductive posts in the resist openings.
    Type: Application
    Filed: March 20, 2015
    Publication date: September 24, 2015
    Applicant: IBIDEN CO., LTD.
    Inventors: Kota NODA, Takema ADACHI, Wataru NAKAMURA
  • Publication number: 20150255433
    Abstract: A combined substrate includes a first substrate having multiple first metal posts, a second substrate having multiple second metal posts such that the second metal posts are positioned to oppose the first metal posts, respectively, and multiple solder structures interposed between the first metal posts and the second metal posts, respectively. The first metal posts and/or the second metal posts have recessed surfaces formed such that the solder structures are formed on the recessed surfaces, respectively.
    Type: Application
    Filed: March 4, 2015
    Publication date: September 10, 2015
    Applicant: IBIDEN CO., LTD.
    Inventors: Tomoya DAIZO, Takema Adachi, Takeshi Furusawa, Wataru Nakamura, Yuki Ito, Yuki Yoshikawa, Tomoyoshi Hirabayashi
  • Patent number: 9078366
    Abstract: A printed circuit board has a core substrate, a first conductive pattern on first surface of the substrate, a second conductive pattern on second surface of the substrate, and a through-hole conductor formed of plated material through the substrate such that the conductor is connecting the first and second patterns. The plated material is filling a through hole in the substrate, the substrate includes an insulation layer including inorganic fiber and resin, a first resin layer on one surface of the insulation layer and having the first surface of the substrate, and a second resin layer on the opposite surface of the insulation layer and having the second surface of the substrate, the first and second resin layers do not contain inorganic fiber material, and the sum of thicknesses of the first and second resin layers is set in the range of 20% or less of thickness of the substrate.
    Type: Grant
    Filed: September 30, 2013
    Date of Patent: July 7, 2015
    Assignee: IBIDEN CO., LTD.
    Inventor: Takema Adachi
  • Patent number: 9048229
    Abstract: A printed wiring board includes a core substrate, an electronic component accommodated in the substrate, a first buildup layer laminated on first surface of the substrate and including the outermost interlayer resin insulation layer and the outermost conductive layer formed on the outermost interlayer resin insulation layer of the first buildup layer, and a second buildup layer laminated on second surface of the substrate and including the outermost interlayer resin insulation layer and the outermost conductive layer formed on the outermost interlayer resin insulation layer of the second buildup layer. The outermost interlayer resin insulation layer of the first buildup layer has thermal expansion coefficient which is set lower than thermal expansion coefficient of the outermost interlayer resin insulation layer of the second buildup layer.
    Type: Grant
    Filed: May 14, 2014
    Date of Patent: June 2, 2015
    Assignee: IBIDEN CO., LTD.
    Inventors: Naoto Ishida, Takema Adachi
  • Publication number: 20150077963
    Abstract: A printed wiring board includes a wiring board, and multiple posts formed on the wiring board and positioned to mount a second printed wiring board onto the wiring board. Each of the metal posts has a first surface connected to the wiring board, a second surface formed to connect the second printed wiring board, and a side surface between the first surface and the second surface, and the side surface of each of the metal posts forms a curved surface.
    Type: Application
    Filed: September 19, 2014
    Publication date: March 19, 2015
    Applicant: IBIDEN CO., LTD.
    Inventors: Takema ADACHI, Yuzo KAIDA
  • Publication number: 20150062849
    Abstract: A wiring board includes a unit section including product portions, and a frame section formed along the periphery of the unit section. The frame section has a dummy pattern which includes conductive portions and connection lines such that the connection lines are formed in spaces between the conductive portions and linking the conductive portions.
    Type: Application
    Filed: August 28, 2014
    Publication date: March 5, 2015
    Applicant: IBIDEN CO., LTD.
    Inventors: Takema ADACHI, Satoshi Kondo
  • Patent number: 8931168
    Abstract: A method for manufacturing a printed wiring board includes preparing a core substrate having a first surface and a second surface on the opposite side of the first surface, forming on the first-surface side of the substrate a first opening portion tapering from the first toward second surface, forming on the second-surface side of the substrate a second opening portion tapering from the second toward first surface, forming a third opening portion such that a penetrating hole formed of the first opening portion, the second opening portion and the third opening portion connecting the first and second opening portions is formed in the substrate, forming a first conductor on the first surface of the substrate, forming a second conductor on the second surface of the substrate, and filling a conductive material in the penetrating hole such that a through-hole conductor connecting the first and second conductors is formed.
    Type: Grant
    Filed: March 26, 2012
    Date of Patent: January 13, 2015
    Assignee: Ibiden Co., Ltd.
    Inventors: Toshiaki Hibino, Takema Adachi
  • Publication number: 20140246765
    Abstract: A printed wiring board includes a core substrate, an electronic component accommodated in the substrate, a first buildup layer laminated on first surface of the substrate and including the outermost interlayer resin insulation layer and the outermost conductive layer formed on the outermost interlayer resin insulation layer of the first buildup layer, and a second buildup layer laminated on second surface of the substrate and including the outermost interlayer resin insulation layer and the outermost conductive layer formed on the outermost interlayer resin insulation layer of the second buildup layer. The outermost interlayer resin insulation layer of the first buildup layer has thermal expansion coefficient which is set lower than thermal expansion coefficient of the outermost interlayer resin insulation layer of the second buildup layer.
    Type: Application
    Filed: May 14, 2014
    Publication date: September 4, 2014
    Applicant: IBIDEN CO., LTD.
    Inventors: Naoto ISHIDA, Takema Adachi
  • Patent number: 8772646
    Abstract: A method for manufacturing a printed wiring board includes preparing a metal sheet having metal members and connectors joining the metal members, forming a structure having core substrates which are connected through the connectors and which have insulation structure portions covering the metal members, respectively, cutting the connectors in the structure such that an independent core substrate having a recessed portion is formed and a respective one of the connectors is removed from the independent core substrate, and covering the recess portion of the independent core substrate with a resin. The covering of the recess portion includes either forming an interlayer insulation layer on a surface of the independent core substrate or forming interlayer insulation layers on opposing surfaces of the independent core substrate.
    Type: Grant
    Filed: March 23, 2012
    Date of Patent: July 8, 2014
    Assignee: Ibiden Co., Ltd.
    Inventors: Kazuyuki Ueda, Takema Adachi, Kazuhiro Yoshikawa
  • Patent number: 8742553
    Abstract: A printed wiring board includes a core substrate, a first buildup layer laminated on a first surface of the core substrate and including the outermost interlayer resin insulation layer and the outermost conductive layer formed on the outermost interlayer resin insulation layer of the first buildup layer, and a second buildup layer laminated on a second surface of the core substrate and including the outermost interlayer resin insulation layer and the outermost conductive layer formed on the outermost interlayer resin insulation layer of the second buildup layer. The outermost conductive layer of the first buildup layer includes pads positioned to mount a semiconductor device on a surface of the first buildup layer, and the outermost interlayer resin insulation layer of the first buildup layer has a thermal expansion coefficient which is set lower than a thermal expansion coefficient of the outermost interlayer resin insulation layer of the second buildup layer.
    Type: Grant
    Filed: November 30, 2012
    Date of Patent: June 3, 2014
    Assignee: Ibiden Co., Ltd.
    Inventors: Naoto Ishida, Takema Adachi
  • Patent number: 8692129
    Abstract: A printed wiring board includes an interlayer insulation layer, first pads positioned to mount a semiconductor element and forming a first pad group on the insulation layer, second pads forming a second pad group on the insulation layer and positioned along a peripheral portion of the first group, a first solder-resist layer formed on the insulation layer and having first openings exposing the first pads, respectively, and second openings exposing the second pads, respectively, conductive posts formed on the second pads through the second openings of the first solder-resist layer, respectively, and a second solder-resist layer formed on the first solder-resist layer and having a third opening exposing the first pads and fourth openings exposing surfaces of the posts, respectively. The second openings have a diameter greater than a diameter of the posts, and the second solder-resist layer is filling gaps formed between the second openings and the posts.
    Type: Grant
    Filed: March 26, 2012
    Date of Patent: April 8, 2014
    Assignee: Ibiden Co., Ltd.
    Inventors: Toshiaki Kasai, Takema Adachi
  • Publication number: 20140090878
    Abstract: A printed circuit board has a core substrate, a first conductive pattern on first surface of the substrate, a second conductive pattern on second surface of the substrate, and a through-hole conductor formed of plated material through the substrate such that the conductor is connecting the first and second patterns. The plated material is filling a through hole in the substrate, the substrate includes an insulation layer including inorganic fiber and resin, a first resin layer on one surface of the insulation layer and having the first surface of the substrate, and a second resin layer on the opposite surface of the insulation layer and having the second surface of the substrate, the first and second resin layers do not contain inorganic fiber material, and the sum of thicknesses of the first and second resin layers is set in the range of 20% or less of thickness of the substrate.
    Type: Application
    Filed: September 30, 2013
    Publication date: April 3, 2014
    Applicant: Ibiden Co., Ltd.
    Inventor: Takema ADACHI