Patents by Inventor Takenobu Nakamura

Takenobu Nakamura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210161420
    Abstract: A magnetic field measuring apparatus is provided including: a magnetic sensor array configured so that a plurality of magnetic sensor cells including a plurality of magnetic sensors each having a magnetoresistive element and magnetic flux concentrators arranged on both ends of the magnetoresistive element are three-dimensionally arranged and capable of detecting a magnetic field in three axial directions; a magnetic field acquiring section configured to acquire measurement data measured by the magnetic sensor array; and a signal space separating section configured to perform signal separation on a spatial distribution of a magnetic field indicated by the measurement data, based on basis vectors calculated from orthonormal functions and a position and magnetic sensitivity of each magnetic sensor of the magnetic sensor array.
    Type: Application
    Filed: February 16, 2021
    Publication date: June 3, 2021
    Inventors: Takenobu NAKAMURA, Shigeki OKATAKE, Yoshitaka MORIYASU, Makoto KATAOKA
  • Patent number: 10983179
    Abstract: A magnetic field measuring device that can measure a weaker magnetic field is provided. A magnetic field measuring device is provided, the magnetic field measuring device including: a sensor unit that has at least one magnetoresistive element; a reference voltage generating unit that outputs a reference voltage; a magnetic field generating unit that generates a magnetic field to be applied to the sensor unit; a feedback current generating unit that supplies, according to a difference between an output voltage of the sensor unit and the reference voltage, the magnetic field generating unit with a feedback current that generates a feedback magnetic field to diminish an input magnetic field to the sensor unit; a magnetic field measuring unit that outputs a measurement value corresponding to the feedback current; and an adjusting unit that uses the output voltage of the sensor unit to adjust the reference voltage.
    Type: Grant
    Filed: July 1, 2019
    Date of Patent: April 20, 2021
    Assignee: Asahi Kasei Microdevices Corporation
    Inventors: Kazuhiro Ishida, Masanori Masuda, Takenobu Nakamura
  • Patent number: 10986729
    Abstract: A wiring substrate includes a core layer, first conductor layers including first inner, outer and intermediate conductor layers, second conductor layers including second inner, outer and intermediate conductor layers, and interlayer insulating layers interposed between the first conductor layers and between the second conductor layers. The first and/or second inner conductor layers has a first laminated structure including metal foil and plating film layers and includes first conductor pattern having a side surface curved toward inner side of the first pattern, the first and/or second outer conductor layers has the first laminated structure and includes the first conductor pattern having the side surface curved toward the inner side of the first pattern, and the first and/or second intermediate conductor layers has a second laminated structure including metal foil and plating film layers and includes second conductor pattern having a side surface curved toward outer side of the second pattern.
    Type: Grant
    Filed: March 25, 2020
    Date of Patent: April 20, 2021
    Assignee: IBIDEN CO., LTD.
    Inventors: Takenobu Nakamura, Takahiro Yamazaki, Takashi Yamauchi, Toshihide Makino
  • Patent number: 10976384
    Abstract: The present invention relates to a hall electromotive force signal detection circuit and a current sensor thereof each of which is able to achieve excellent wide-band characteristics and fast response as well as high accuracy. A difference calculation circuit samples a component synchronous with a chopper clock generated by a chopper clock generation circuit, out of an output voltage signal of a signal amplifier circuit, at a timing obtained from the chopper clock, so as to detect the component. An integrating circuit integrates an output from the difference calculation circuit in the time domain. An output voltage signal from the integrating circuit is fed back to a signal amplifier circuit via a third transconductance element.
    Type: Grant
    Filed: August 29, 2016
    Date of Patent: April 13, 2021
    Assignee: Asahi Kasei Microdevices Corporation
    Inventors: Shigeki Okatake, Takenobu Nakamura
  • Patent number: 10945334
    Abstract: A wiring substrate includes a core layer, first conductor layers including first inner, outer and intermediate conductor layers, second conductor layers including second inner, outer and intermediate conductor layers, and interlayer insulating layers interposed between the first conductor layers and between the second conductor layers. The first and/or second inner conductor layers has a first laminated structure including a metal foil layer and a plating film layer, the first and/or second outer conductor layers has the first laminated structure, the first and/or second intermediate conductor layers has a second laminated structure including a metal foil layer and a plating film layer, and the first and second laminated structures are formed such that a surface of the second laminated structure on a side away from the core layer has unevenness smaller than unevenness of a surface of the first laminated structure on a side away from the core layer.
    Type: Grant
    Filed: March 24, 2020
    Date of Patent: March 9, 2021
    Assignee: IBIDEN CO., LTD.
    Inventors: Takenobu Nakamura, Takahiro Yamazaki, Takashi Yamauchi, Toshihide Makino
  • Publication number: 20200315012
    Abstract: A wiring substrate includes a core layer, first conductor layers including first inner, outer and intermediate conductor layers, second conductor layers including second inner, outer and intermediate conductor layers, and interlayer insulating layers interposed between the first conductor layers and between the second conductor layers. The first and/or second inner conductor layers has a first laminated structure including a metal foil layer and a plating film layer, the first and/or second outer conductor layers has the first laminated structure, the first and/or second intermediate conductor layers has a second laminated structure including a metal foil layer and a plating film layer, and the first and second laminated structures are formed such that a surface of the second laminated structure on a side away from the core layer has unevenness smaller than unevenness of a surface of the first laminated structure on a side away from the core layer.
    Type: Application
    Filed: March 24, 2020
    Publication date: October 1, 2020
    Applicant: IBIDEN CO., LTD.
    Inventors: Takenobu NAKAMURA, Takahiro YAMAZAKI, Takashi YAMAUCHI, Toshihide MAKINO
  • Publication number: 20200315002
    Abstract: A wiring substrate includes a core layer, first conductor layers including first inner, outer and intermediate conductor layers, second conductor layers including second inner, outer and intermediate conductor layers, interlayer insulating layers interposed between the first conductor layers and between the second conductor layers, and via conductors formed in the core layer such that each via conductor decreases in diameter from one of the inner conductor layers toward the other one of the inner conductor layers and that the other one of the inner conductor layers has thickness greater than thickness of the one of the inner conductor layers. The first and/or second inner conductor layers includes a first laminated structure including metal foil and plating film layers, the first and/or second outer conductor layers includes the first laminated structure, and the first and/or second intermediate conductor layers includes a second laminated structure including metal foil and plating film layers.
    Type: Application
    Filed: March 27, 2020
    Publication date: October 1, 2020
    Applicant: IBIDEN CO., LTD.
    Inventors: Takenobu Nakamura, Takahiro Yamazaki, Takashi Yamauchi, Toshihide Makino
  • Publication number: 20200315009
    Abstract: A wiring substrate includes a core layer, first conductor layers including first inner, outer and intermediate layers, second conductor layers including second inner, outer and intermediate layers, interlayer insulating layers interposed between the first conductor layers and between the second conductor layers, and via conductors formed in the insulating layers such that each via conductor connects two conductor layers and is integrally formed with one of the conductor layers on side away from the core layer. The first and/or second inner conductor layers has a first conductor layer structure including metal foil and plating film layers, the first and/or second outer conductor layers has the first structure, the first and/or second intermediate conductor layers has a second conductor layer structure including metal foil and plating film layers, and the via conductors include a group integrally formed with the first structure and including constricted via conductors each having a constricted portion.
    Type: Application
    Filed: March 26, 2020
    Publication date: October 1, 2020
    Applicant: IBIDEN CO., LTD.
    Inventors: Takenobu NAKAMURA, Takahiro YAMAZAKI, Takashi YAMAUCHI, Toshihide MAKINO
  • Publication number: 20200315013
    Abstract: A wiring substrate includes a core layer, first conductor layers including first inner, outer and intermediate conductor layers, second conductor layers including second inner, outer and intermediate conductor layers, and interlayer insulating layers interposed between the first conductor layers and between the second conductor layers. The first and/or second inner conductor layers has a first laminated structure including metal foil and plating film layers and includes first conductor pattern having a side surface curved toward inner side of the first pattern, the first and/or second outer conductor layers has the first laminated structure and includes the first conductor pattern having the side surface curved toward the inner side of the first pattern, and the first and/or second intermediate conductor layers has a second laminated structure including metal foil and plating film layers and includes second conductor pattern having a side surface curved toward outer side of the second pattern.
    Type: Application
    Filed: March 25, 2020
    Publication date: October 1, 2020
    Applicant: IBIDEN CO., LTD.
    Inventors: Takenobu NAKAMURA, Takahiro YAMAZAKI, Takashi YAMAUCHI, Toshihide MAKINO
  • Publication number: 20200315011
    Abstract: A wiring substrate includes a core layer, first conductor layers including a first inner conductor layer, a first outer conductor layer and a first intermediate conductor layer, second conductor layers including a second inner conductor layer, a second outer conductor layer and a second intermediate conductor layer, and interlayer insulating layers interposed between the first conductor layers and between the second conductor layers. The first and/or second inner conductor layers has a first laminated structure including a metal foil layer and a plating film layer, the first and/or second outer conductor layers has the first laminated structure, and the first and/or second intermediate conductor layers has a second laminated structure including a metal foil layer and a plating film layer and includes a conductor pattern formed such that an upper surface of the conductor pattern has an edge portion forming an inclined portion inclined toward the core layer.
    Type: Application
    Filed: March 24, 2020
    Publication date: October 1, 2020
    Applicant: IBIDEN CO., LTD
    Inventors: Takenobu NAKAMURA, Takahiro YAMAZAKI, Takashi YAMAUCHI, Toshihide MAKINO
  • Publication number: 20200281490
    Abstract: A measurement apparatus is provided, which includes a magnetic sensor array formed by three-dimensionally arranging a plurality of magnetic sensor cells each including a magnetic sensor, and capable of detecting an input magnetic field in three axial directions; a measurement data acquiring section that acquires a plurality of measurement values based on the input magnetic field detected by the magnetic sensor array; a magnetic field calculating section that calculates the input magnetic field based on the measurement values; an error calculating section that calculates a detection error of the input magnetic field, based on the plurality of measurement values and a calculation result obtained by calculating the input magnetic field; and a measurement data selecting section that selects a plurality of measurement values to be used for calculating the input magnetic field by the magnetic field calculating section, from among the plurality of measurement values, based on the detection error.
    Type: Application
    Filed: March 4, 2020
    Publication date: September 10, 2020
    Inventors: Makoto KATAOKA, Takenobu NAKAMURA, Shigeki OKATAKE
  • Publication number: 20200003847
    Abstract: A magnetic field measuring device that can measure a weaker magnetic field is provided. A magnetic field measuring device is provided, the magnetic field measuring device including: a sensor unit that has at least one magnetoresistive element; a reference voltage generating unit that outputs a reference voltage; a magnetic field generating unit that generates a magnetic field to be applied to the sensor unit; a feedback current generating unit that supplies, according to a difference between an output voltage of the sensor unit and the reference voltage, the magnetic field generating unit with a feedback current that generates a feedback magnetic field to diminish an input magnetic field to the sensor unit; a magnetic field measuring unit that outputs a measurement value corresponding to the feedback current; and an adjusting unit that uses the output voltage of the sensor unit to adjust the reference voltage.
    Type: Application
    Filed: July 1, 2019
    Publication date: January 2, 2020
    Inventors: Kazuhiro ISHIDA, Masanori MASUDA, Takenobu NAKAMURA
  • Publication number: 20190377035
    Abstract: A magnetic field measurement apparatus including a magnetic sensor array having magnetic sensor cells capable of detecting magnetic fields in three axial directions arranged in three dimensions, each magnetic sensor cell including a plurality of magnetic sensors that each have a magnetoresistive element and a magnetic flux concentrator arranged at least at one of one end and another end of the magnetoresistive element; AD converters that respectively convert analog detection signals output by the magnetic sensors into digital measurement data; a magnetic field acquiring section that acquires the digital measurement data; a calibration computing section that calibrates the digital measurement data from the magnetic field acquiring section, using at least one of a main-axis sensitivity, cross-axis sensitivities, and an offset; and a gradient magnetic field computing section that calculates a gradient magnetic field using magnetic field measurement data resulting from the calibration of the digital measurement d
    Type: Application
    Filed: June 7, 2019
    Publication date: December 12, 2019
    Inventors: Takenobu NAKAMURA, Shigeki OKATAKE, Yoshitaka MORIYASU
  • Patent number: 10436856
    Abstract: A sensor apparatus adjusts output timings of a detection signal and a sensing signal for sensing an abnormality in the detection signal. Provided is a magnetic sensor apparatus comprising a magnetic sensor element, an amplifying section that amplifies and outputs an output of the magnetic sensor element, a plurality of comparing sections that compare the output of the magnetic sensor element or an output of the amplifying section to a threshold value, and a plurality of delaying sections that each delay and output a comparison result output by a corresponding comparing section among the plurality of comparing sections. Also provided is a current sensor apparatus including a current path through which a current serving as a measurement target flows and a magnetic sensor apparatus that is arranged corresponding to the current path and detects a magnetic field generated according to the current serving as the measurement target.
    Type: Grant
    Filed: December 21, 2016
    Date of Patent: October 8, 2019
    Assignee: Asahi Kasei Microdevices Corporation
    Inventors: Takenobu Nakamura, Yuusuke Aiba
  • Publication number: 20190298202
    Abstract: A highly precise, and simple and easy calibration function of a magnetocardiographic measurement apparatus is provided. A magnetocardiographic measurement apparatus includes: a magnetic sensor array; and a magnetic field acquiring unit acquiring environmental magnetic field measurement data measured by the array in response to the array being turned such that the array faces a plurality of directions in an environmental magnetic field; a calibration parameter calculating unit using the environmental magnetic field measurement data to calculate a calibration parameter for calibrating measurement data measured by the array in magnetocardiographic measurement of a subject; a calibration parameter storage unit storing the calibration parameter; a calibration calculating unit using the calibration parameter to calibrate the measurement data; and a data output unit outputting the measurement data.
    Type: Application
    Filed: March 27, 2019
    Publication date: October 3, 2019
    Inventors: Takenobu NAKAMURA, Shigeki OKATAKE, Yoshitaka MORIYASU
  • Patent number: 10337887
    Abstract: A magnetic sensor includes: a magnetic converging plate; Hall elements disposed on one surface side of the magnetic converging plate; wires connecting with the Hall elements; and a signal processing circuit that connects with these wires to receive a signal from the Hall element. Between the Hall element and the signal processing circuit, the two wires cross while being spaced apart from each other in a depth direction of a substrate, and forms a compensation loop between a cross of the two wires and the circuit, and in a planar view as seen in a depth direction, at least part of a region occupied by the compensation loop is covered by the magnetic converging plate. The compensation loop compensates an induced electromotive force caused to the closed loop formed by the wires including the Hall element.
    Type: Grant
    Filed: July 25, 2017
    Date of Patent: July 2, 2019
    Assignee: Asahi Kasei Microdevices Corporation
    Inventors: Ryuji Nobira, Takenobu Nakamura
  • Patent number: 10063121
    Abstract: A lid has a fixing surface to be fixed to a metal board so that a metal surface, equipped with no components, of the metal board is in contact with the fixing surface, a through bore provided in laterally close proximity to the fixing surface and exposing mating parts of an external connector with which harnesses are mated, a fixing edge provided around the through bore and fixed to a housing of the external connector; and fixing pedestals projecting from a circumference of the fixing surface and fixed to the control board. A direction of connecting power supply terminals of the external connector to the metal board is a direction being perpendicular to the metal board. A direction of connecting the control board to signal terminals of the external connector is identical to the direction of connecting the power supply terminals to the metal board.
    Type: Grant
    Filed: February 28, 2017
    Date of Patent: August 28, 2018
    Assignee: OMRON AUTOMOTIVE ELECTRONICS CO., LTD.
    Inventors: Takenobu Nakamura, Shinichi Togawa
  • Publication number: 20180115225
    Abstract: A circuit integrated motor includes: a motor accommodated in a motor housing; a heat sink adjacent to the motor housing in an axis axial direction; a substrate arranged in at least one of the heat sink and the motor housing; and a module mounted on the substrate, and in which a drive circuit for driving that drives the motor is housed. The module has a substantially rectangular cuboid including a bottom surface facing the substrate, and two opposing main side surfaces perpendicular to the bottom surface and having areas larger than an area of the bottom surface. The heat sink includes an insertion portion into which the module is inserted. An inner surface of the insertion unit portion is in direct or indirect contact with at least the two main side surfaces.
    Type: Application
    Filed: October 24, 2017
    Publication date: April 26, 2018
    Applicant: OMRON AUTOMOTIVE ELECTRONICS CO., LTD.
    Inventors: Shinichi Togawa, Takenobu Nakamura, Yoji Mori, Hiroyuki Ohnishi
  • Publication number: 20170322051
    Abstract: A magnetic sensor includes: a magnetic converging plate; Hall elements disposed on one surface side of the magnetic converging plate; wires connecting with the Hall elements; and a signal processing circuit that connects with these wires to receive a signal from the Hall element. Between the Hall element and the signal processing circuit, the two wires cross while being spaced apart from each other in a depth direction of a substrate, and forms a compensation loop between a cross of the two wires and the circuit, and in a planar view as seen in a depth direction, at least part of a region occupied by the compensation loop is covered by the magnetic converging plate. The compensation loop compensates an induced electromotive force caused to the closed loop formed by the wires including the Hall element.
    Type: Application
    Filed: July 25, 2017
    Publication date: November 9, 2017
    Inventors: Ryuji NOBIRA, Takenobu NAKAMURA
  • Patent number: 9814135
    Abstract: A wiring board includes a substrate, pads formed on an electronic-component mounting surface of the substrate, and a resin insulation layer covering the electronic-component mounting surface and having opening portions such that the opening portions are exposing the pads, respectively. The pads include a non-solder mask defined pad having a wiring portion and a non-solder mask defined pad having no wiring portion, and the opening portions are formed such that the non-solder mask defined pads have exposed conductor areas which have substantially same areas inside the opening portions.
    Type: Grant
    Filed: September 12, 2014
    Date of Patent: November 7, 2017
    Assignee: IBIDEN CO., LTD.
    Inventor: Takenobu Nakamura