Abstract: A processor has: a power table including a plurality of power control registers each rewritably storing power control information; a condition determiner for rewritably storing plurality of operating conditions (e.g., a comparison address to be compared with the program counter) and determining which one of the plurality of operating conditions is satisfied by a current operation of the processor so as to supply an index signal to select one of the plurality of power control registers based on the determination; and a voltage/clock controller for controlling the power consumption in a control object circuit block according to the power control information in one of the power control registers that is selected by the index signal.

Abstract: A processor has: a power table including a plurality of power control registers each rewritably storing power control information; a condition determiner for rewritably storing plurality of operating conditions (e.g., a comparison address to be compared with the program counter) and determining which one of the plurality of operating conditions is satisfied by a current operation of the processor so as to supply an index signal to select one of the plurality of power control registers based on the determination; and a voltage/clock controller for controlling the power consumption in a control object circuit block according to the power control information in one of the power control registers that is selected by the index signal.

Abstract: A processor has: a power table including a plurality of power control registers each rewritably storing power control information; a condition determiner for rewritably storing a plurality of operating conditions (e.g., a comparison address to be compared with the program counter) and determining which one of the plurality of operating conditions is satisfied by a current operation of the processor so as to supply an index signal to select one of the plurality of power control registers based on the determination; and a voltage/clock controller for controlling the power consumption in a control object circuit block according to the power control information in one of the power control registers that is selected by the index signal.

Abstract: A processor has: a power table including a plurality of power control registers each rewritably storing power control information; a condition determiner for rewritably storing a plurality of operating conditions (e.g., a comparison address to be compared with the program counter) and determining which one of the plurality of operating conditions is satisfied by a current operation of the processor so as to supply an index signal to select one of the plurality of power control registers based on the determination; and a voltage/clock controller for controlling the power consumption in a control object circuit block according to the power control information in one of the power control registers that is selected by the index signal.

Abstract: A processor has: a power table including a plurality of power control registers each rewritably storing power control information; a condition determiner for rewritably storing a plurality of operating conditions (e.g., a comparison address to be compared with the program counter) and determining which one of the plurality of operating conditions is satisfied by a current operation of the processor so as to supply an index signal to select one of the plurality of power control registers based on the determination; and a voltage/clock controller for controlling the power consumption in a control object circuit block according to the power control information in one of the power control registers that is selected by the index signal.

Abstract: Logical processors are grouped into logical processor groups. A power control device includes: a power state information determining unit which, when one of the logical processors assigned to the physical processor is replaced with another one of the logical processors, and based on power state information indicating power consumption of another physical processor to which the logical processors that belong to a target logical processor group are assigned, determines power state information to be used when the replacing logical processor is assigned to the physical processor, the target logical processor group being one of the logical processor groups and including the replacing logical processor; and a power state changing unit which changes power to be supplied to the physical processor based on the power state information determined by the power state information determining unit.

Abstract: A power controller (100) is for controlling power consumed in an information processor (1000) and includes a power context storing means (ZA105), a power context reference means (ZB101), and a power status changing means (ZA101). The power context storing means (ZA105) stores power control information for individual programs on a per program basis in storage regions distinguished with program identification information. The power context reference means (ZB101) references the power control information for the desired program in the power context storing means (ZA105). The power status changing means (ZA101) changes the status of the power consumed in the information processor (1000) based on the power control information referenced by the power context reference means (ZB101).

Abstract: A table information reception unit in an instructing device receives, from processing devices connected to a network, device names of the processing devices, function information indicating functions included in the processing devices, and power information indicating a reliability of power supply to the processing devices, and causes such information to be reflected in a table stored in a storage unit. Upon receiving a processing request from a user, an analysis unit analyzes the content thereof, transmits, to an execution control unit, requested function information indicating functions necessary to execute processing corresponding to the processing request. Based on the requested function information, the execution control unit judges whether cooperation with another processing device is necessary, and if necessary, selects, based on the table stored in the storage unit, a processing device expected to have a stable power supply to be a cooperating processing device.

Abstract: A power controller (100) is for controlling power consumed in an information processor (1000) and includes a power context storing means (ZA105), a power context reference means (ZB101), and a power status changing means (ZA101). The power context storing means (ZA105) stores power control information for individual programs on a per program basis in storage regions distinguished with program identification information. The power context reference means (ZB101) references the power control information for the desired program in the power context storing means (ZA105). The power status changing means (ZA101) changes the status of the power consumed in the information processor (1000) based on the power control information referenced by the power context reference means (ZB101).

Abstract: A processor has: a power table including a plurality of power control registers each rewritably storing power control information; a condition determiner for rewritably storing a plurality of operating conditions (e.g., a comparison address to be compared with the program counter) and determining which one of the plurality of operating conditions is satisfied by a current operation of the processor so as to supply an index signal to select one of the plurality of power control registers based on the determination; and a voltage/clock controller for controlling the power consumption in a control object circuit block according to the power control information in one of the power control registers that is selected by the index signal.

Abstract: A processor has: a power table including a plurality of power control registers each rewritably storing power control information; a condition determiner for rewritably storing a plurality of operating conditions (e.g., a comparison address to be compared with the program counter) and determining which one of the plurality of operating conditions is satisfied by a current operation of the processor so as to supply an index signal to select one of the plurality of power control registers based on the determination; and a voltage/clock controller for controlling the power consumption in a control object circuit block according to the power control information in one of the power control registers that is selected by the index signal.

Abstract: A processor simultaneously issues instructions to multiple threads in a same instruction execution cycle. An instruction issuer controls issuance of an instruction for each of the multiple threads. A detector detects, for each of the multiple threads, whether a loop processing is currently being executed. A unit causes the instruction issuer to increase a number of instructions to be issued when the detector detects that the loop processing is currently being executed.

Abstract: A processor simultaneously issues instructions to multiple threads in a same instruction execution cycle. An instruction issuer controls issuance of an instruction for each of the multiple threads. A detector detects, for each of the multiple threads, whether a loop processing is currently being executed. A unit causes the instruction issuer to increase a number of instructions to be issued when the detector detects that the loop processing is currently being executed.

Abstract: A program execution control device which controls execution of a program by a processor having a predicate function for conditional execution of an instruction, wherein the program includes a branch instruction to control iterations in loop processing, the branch instruction is further an instruction to generate an execute-or-not condition indicating whether or not the branch instruction is to be executed at an iteration in the loop processing after a current iteration, and to reflect the execute-or-not condition on a predicate flag used for conditional execution of the branch instruction, the program execution control device comprises a processor status changing unit configured to change, before an execution cycle of the branch instruction, a status of the processor in advance for execution of an instruction following the branch instruction, the status being changed based on the execute-or-not condition reflected on the predicate flag.

Abstract: The state control device for controlling an internal state of information processing equipment includes a scenario table, an information recorder, an information player and a state change controller. The information recorder acquires sync information and one item or a plurality of items of state information from the information processing equipment and records the acquired sync information and state information in association with each other in the scenario table. The information player, receiving sync information from the information processing equipment, acquires state information associated with sync information corresponding to the received sync information, among the sync information stored in the scenario table, from the scenario table, and supplies the acquired state information to the state change controller. The state change controller controls the inside of the information processing equipment based on the state information received from the information player.

Abstract: A table information reception unit (201) in an instructing device (200) receives, from processing devices connected to a network, device names of the processing devices, function information indicating functions included in the processing devices, and power information indicating a reliability of power supply to the processing devices, and causes such information to be reflected in a table stored in a storage unit (202). Upon receiving a processing request from a user, an analysis unit (204) analyzes the content thereof, transmits, to an execution control unit (205), requested function information indicating functions necessary to execute processing corresponding to the processing request. Based on the requested function information, the execution control unit 205 judges whether cooperation with another processing device is necessary, and if necessary, selects, based on the table stored in the storage unit (202), a processing device expected to have a stable power supply to be a cooperating processing device.

Abstract: A power controller (100) is for controlling power consumed in an information processor (1000) and includes a power context storing means (ZA105), a power context reference means (ZB101), and a power status changing means (ZA101). The power context storing means (ZA105) stores power control information for individual programs on a per program basis in storage regions distinguished with program identification information. The power context reference means (ZB101) references the power control information for the desired program in the power context storing means (ZA105). The power status changing means (ZA101) changes the status of the power consumed in the information processor (1000) based on the power control information referenced by the power context reference means (ZB101).

Abstract: A processor has: a power table including a plurality of power control registers each rewritably storing power control information; a condition determiner for rewritably storing a plurality of operating conditions (e.g., a comparison address to be compared with the program counter) and determining which one of the plurality of operating conditions is satisfied by a current operation of the processor so as to supply an index signal to select one of the plurality of power control registers based on the determination; and a voltage/clock controller for controlling the power consumption in a control object circuit block according to the power control information in one of the power control registers that is selected by the index signal.

Abstract: A processor has: a power table including a plurality of power control registers each rewritably storing power control information; a condition determiner for rewritably storing a plurality of operating conditions (e.g., a comparison address to be compared with the program counter) and determining which one of the plurality of operating conditions is satisfied by a current operation of the processor so as to supply an index signal to select one of the plurality of power control registers based on the determination; and a voltage/clock controller for controlling the power consumption in a control object circuit block according to the power control information in one of the power control registers that is selected by the index signal.

Abstract: A program execution control device which controls execution of a program by a processor having a predicate function for conditional execution of an instruction, wherein the program includes a branch instruction to control iterations in loop processing, the branch instruction is further an instruction to generate an execute-or-not condition indicating whether or not the branch instruction is to be executed at an iteration in the loop processing after a current iteration, and to reflect the execute-or-not condition on a predicate flag used for conditional execution of the branch instruction, the program execution control device comprises a processor status changing unit configured to change, before an execution cycle of the branch instruction, a status of the processor in advance for execution of an instruction following the branch instruction, the status being changed based on the execute-or-not condition reflected on the predicate flag.