Abstract: An image display device which includes a display pixel block and circuit blocks peripheral thereto. Each block has a circuit made of high-performance thin film transistors. The display pixel block and the peripheral circuit blocks including the four corners of the display device are formed on an image display device substrate of circuit-built-in type thin film transistors having a small circuit occupation surface area. A circuit including thin film transistors of a polycrystalline silicon film anisotropically crystal-grown and having crystal grains aligned in its longitudinal direction with a current direction is provided in the whole or partial surface of the display pixel block and circuit blocks. The longitudinal direction is aligned with a horizontal or vertical direction within the block, and blocks aligned in the horizontal and vertical directions can be arranged as mixed when viewed from an identical straight line.

Abstract: A thin film semiconductor device has a semiconductor thin film with a film thickness of 200 nm or less. The semiconductor thin film is formed over a dielectric substrate with a warping point of 600° C. or lower. The semiconductor thin film has a region in which a first semiconductor thin film region with the defect density of 1×1017 cm−3 or less and a second semiconductor thin film region with the defect density of 1×1017 cm−3 or more are disposed alternately in the form of stripes. The width of the first semiconductor thin film region is larger than the width of the semiconductor thin film region. The grain boundaries, grain size and orientation of crystals over the dielectric substrate are controlled, so that a high quality thin film semiconductor device is obtained.

Abstract: Inexpensive, unannealed glass is used as a substrate. The surface of a polycrystalline silicon film doped with boron (B) or phosphorus (P) is oxidized with ozone at a processing temperature of 500° C. or below to form a silicon oxide film of 4 to 20 nm thick on the surface of polycrystalline silicon. On account of this treatment, the level density at the interface between the gate-insulating layer and the channel layer can be made lower, and a thin-film transistor having less variations of characteristics can be formed on the unannealed glass substrate.

Abstract: A thin film made of silicon or another IV-group crystals (crystals and mixed crystals of C, Ge, Sn, and Pb) is twice scanned with a laser beam moving in two lateral directions in which crystal grains grow larger in order to form high-quality polycrystals in exact positions in the thin film, while defects uncontrollable by the prior arts are being reduced significantly, to realize a high-quality TFT device. The laser-scanning directions are defined by the crystallization face orientations.

Abstract: The invention provides an image display device that has an especially satisfactory display quality for animated images, and sufficiently suppresses the irregularities of display quality among pixels. The image display device includes a light emitting drive means that drives a light emitting means, based on an analog display signal inputted to the pixels, and a light emitting control switch for controlling a light-on or light-off of the light emitting means on one end of the light emitting drive means in each pixel.

Abstract: The present invention provides a process for producing a polycrystal silicon film which comprises a step of forming a polycrystal silicon film by light irradiation of a silicon film set on a substrate, and a step of selecting substrate samples having an average grain size in a plane of the sample of 500 nm or more. According to the present invention, stable production of a high-performance poly-silicon TFT liquid crystal display becomes possible.

Abstract: The present invention relates to a thin film transistor, in a low-temperature poly-Si thin film becoming an elemental material of the thin film transistor, an object of the invention is to provide the thin film transistor suitable for realizing an image display device having a high performance and a large area at low cost by realizing a poly-crystalline thin film having a crystal structure restraining current scattering in a grain boundary, lessening surface roughness, and capable of realizing high mobility even to a positive hole current.

Abstract: The present invention relates to a thin film transistor, in a low-temperature poly-Si thin film becoming an elemental material of the thin film transistor, an object of the invention is to provide the thin film transistor suitable for realizing an image display device having a high performance and a large area at low cost by realizing a poly-crystalline thin film having a crystal structure restraining current scattering in a grain boundary, lessening surface roughness, and capable of realizing high mobility even to a positive hole current.

Abstract: Inexpensive, unannealed glass is used as a substrate. The surface of a polycrystalline silicon film doped with boron (B) or phosphorus (P) is oxidized with ozone at a processing temperature of 500° C. or below to form a silicon oxide film of 4 to 20 nm thick on the surface of polycrystalline silicon. On account of this treatment, the level density at the interface between the gate-insulating layer and the channel layer can be made lower, and a thin-film transistor having less variations of characteristics can be formed on the unannealed glass substrate.

Abstract: The present invention provides a polycrystalline silicon conducting structure (e.g., a resistor) whose resistance value is controlled, and can be less variable and less dependent on temperature with respect to any resistant value, and a process of producing the same. Use is made of at least a two-layer structure including a first polycrystalline silicon layer of large crystal grain size and a second polycrystalline silicon layer of small crystal grain size, and the first polycrystalline silicon layer has a positive temperature dependence of resistances while the second polycrystalline layer has a negative temperature dependance of resistance, or vise versa. Moreover, the polycrystalline silicon layer of large grain size can be formed by high dose ion implantation and annealing, or by depositing the layers by chemical vapor deposition at different temperatures so as to form large-grain and small-grain layers.

Abstract: A high performance thin film transistor is provided containing polycrystalline Si-Ge alloy. The TFT has a crystal structure restraining both current scattering in a grain boundary and surface roughness by introduction of Ge into Si. This permits realizing an image display device having high performance and a large area at low cost.

Abstract: The present invention relates to a thin film transistor device, an object of the invention is to realize the thin film transistor device of high mobility by large-grain sizing (quasi single crystal) a low-temperature poly-Si thin film being an elemental material of the thin film transistor in a state trued up to a crystal orientation having the most stable lattice structure in consideration of strain at the interface with a substrate, and by controlling a crystal position.

Abstract: A thin film transistor of high reliability mounted on an insulator substrate, the transistor having a semiconductor thin film, a gate insulation film and a gate electrode in which the concentration profile of impurities in the semiconductor thin film is controlled so as to have a peak in a region other than the center of the depth for the semiconductor thin film to attain a long life for LCD.

Abstract: A first thin film is formed on one surface of an insulating base, and a second thin film having a thermal conductivity higher than the first thin film is formed on the first thin film. An amorphous semiconductor thin film having a higher thermal conductivity than the second thin film is formed on at least the second thin film. The amorphous semiconductor thin film is changed to a polycrystalline semiconductor thin film through laser annealing. The provision of the second thin film results in larger and uniform crystal grain diameters and less proturberances in the polycrystalline semiconductor thin film.

Abstract: The present invention relates to a thin film transistor, in a low-temperature poly-Si thin film becoming an elemental material of the thin film transistor, an object of the invention is to provide the thin film transistor suitable for realizing an image display device having a high performance and a large area at low cost by realizing a poly-crystalline thin film having a crystal structure restraining current scattering in a grain boundary, lessening surface roughness, and capable of realizing high mobility even to a positive hole current.

Abstract: The present invention relates to a thin film transistor device, an object of the invention is to realize the thin film transistor device of high mobility by large-grain sizing (quasi single crystal) a low-temperature poly-Si thin film being an elemental material of the thin film transistor in a state trued up to a crystal orientation having the most stable lattice structure in consideration of strain at the interface with a substrate, and by controlling a crystal position.

Abstract: A thin film transistor of high reliability mounted on an insulator substrate, the transistor having a semiconductor thin film, a gate insulation film and a gate electrode in which the concentration profile of impurities in the semiconductor thin film is controlled so as to have a peak in a region other than the center of the depth for the semiconductor thin film to attain a long life for LCD.

Abstract: The present invention provides a polycrystalline silicon conducting structure (e.g., a resistor) whose resistance value is controlled, and can be less variable and less dependent on temperature with respect to any resistant value, and a process of producing the same. Use is made of at least a two-layer structure including a first polycrystalline silicon layer of large crystal grain size and a second polycrystalline silicon layer of small crystal grain size, and the first polycrystalline silicon layer has a positive temperature dependence of resistance while the second polycrystalline layer has a negative temperature dependence of resistance, or vice versa. Moreover, the polycrystalline silicon layer of large grain size can be formed by high dose ion implantation and annealing, or by depositing the layers by chemical vapor deposition at different temperatures so as to form large-grain and small-grain layers.

Abstract: The present invention provides a polycrystalline silicon conducting structure (e.g., a resistor) whose resistance value is controlled, and can be less variable and less dependent on temperature with respect to any resistant value, and a process of producing the same. Use is made of at least a two-layer structure including a first polycrystalline silicon layer of large crystal grain size and a second polycrystalline silicon layer of small crystal grain size, and the first polycrystalline silicon layer has a positive temperature dependence of resistance while the second polycrystalline layer has a negative temperature dependence of resistance, or vice versa. Moreover, the polycrystalline silicon layer of large grain size can be formed by high dose ion implantation and annealing, or by depositing the layers by chemical vapor deposition at different temperatures so as to form large-grain and small-grain layers.

Abstract: A method of manufacturing an improved bipolar transistor or BiCMOS having a phosphorus-doped polysilicon emitter electrode is disclosed. The method comprises forming an emitter electrode wherein a phosphorus-doped amorphous silicon film is deposited at temperature not higher than 540.degree. C. and then subjected to low temperature annealing treatment at a temperature of 600.degree. C. to 750.degree. C., under which the amorphous silicon is converted to a polysilicon and the phosphorus present in the amorphous silicon film is diffused into a base region to form an emitter region, followed by high temperature/short time annealing treatment at a temperature of 900.degree. C. to 950.degree. C. so that an activation rate of an impurity in a boron-doped polysilicon base electrode or source-drain regions of MOS.cndot.FET is improved.