Abstract: A gate insulating film and gate electrodes are formed on a substrate containing N-type impurities such as P or As. Under the gate insulating film is a gate region on both sides of which are a first and a second source drain region. The gate region is furnished in its central part with a high-concentration channel injection region containing N-type impurities at a concentration higher than that of the substrate. Between the high-concentration channel injection region on the one hand and the first and the second source drain region and on the other hand, there are formed a first and a second low-concentration channel injection region and having substantially the same impurity concentration as that of the substrate.

Abstract: A clock signal conversion circuit receives a clock signal and a control signal and generates a converted clock signal. A flip-flop holds the control signal in response to the clock signal and outputs a held control signal. The clock signal is selectively masked by an or gate in response to the held control signal thereby outputting the converted clock signal. A set signal is generated by a NAND gate in response to the clock signal, the control signal and the held control signal. The flip-flop forces the control signal to a predetermined state in response to the set signal generated by the NAND gate.