Abstract: A semiconductor device with reduced power consumption is provided. With three transistors, potentials of two nodes are switched and a voltage is detected. One of a source and a drain of a first transistor is electrically connected to a first terminal. The other of the source and the drain of the first transistor is electrically connected to a non-inverting input of a comparator through a first node. One of a source and a drain of a second transistor is electrically connected to a second terminal. The other of the source and the drain of the second transistor is electrically connected to one of a source and a drain of a third transistor through a second node. The other of the source and the drain of the third transistor is electrically connected to a third terminal. A first capacitor is provided between the first node and the second node. An inverting input of the comparator is electrically connected to a fourth terminal. An output of the comparator is electrically connected to a fifth terminal.

Abstract: A semiconductor optical device includes a first n-type III-V group compound semiconductor layer, an active layer, a tunnel junction structure including a p-type III-V group compound semiconductor layer and a second n-type III-V group compound semiconductor layer, and a third n-type III-V group compound semiconductor layer. The first n-type III-V group compound semiconductor layer, the active layer, the p-type III-V group compound semiconductor layer, the second n-type III-V group compound semiconductor layer, and the third n-type III-V group compound semiconductor layer are stacked in this order. The second n-type III-V group compound semiconductor layer has an n-type dopant concentration higher than an n-type dopant concentration of the third n-type III-V group compound semiconductor layer. The p-type III-V group compound semiconductor layer has a strain.

Abstract: A semiconductor device that has low power consumption and is capable of performing a product-sum operation is provided. The semiconductor device includes first and second cells, a first circuit, and first to third wirings. Each of the first and second cells includes a capacitor, and a first terminal of each of the capacitors is electrically connected to the third wiring. Each of the first and second cells has a function of feeding a current based on a potential held at a second terminal of the capacitor, to a corresponding one of the first and second wirings. The first circuit is electrically connected to the first and second wirings and stores currents I1 and I2 flowing through the first and second wirings. When the potential of the third wiring changes and accordingly the amount of current of the first wiring changes from I1 to I3 and the amount of current of the second wiring changes from I2 to I4, the first circuit generates a current with an amount I1?I2?I3+I4.

Abstract: An image processing device includes: a partial image extractor configured to extract partial images of multiple subjects to be imaged who are contained in each of multiple images captured at different times; a vote unit configured to accept a vote on the partial images of each of the subjects to be imaged among the partial images that are extracted by the partial image extractor; a partial image determination unit configured to determine one of the partial images based on a result of the votes on the partial images that are accepted by the vote unit; and an image processor configured to generate a partial image of the subject based on the partial image that is determined by the partial image determination unit.

Abstract: An object is to provide a pixel structure of a display device including a photosensor which prevents changes in an output of the photosensor and a decrease in imaging quality. The display device has a pixel layout structure in which a shielding wire is disposed between an FD and an imaging signal line (a PR line, a TX line, or an SE line) or between the FD and an image-display signal line in order to reduce or eliminate parasitic capacitance between the FD and a signal line for the purpose of suppressing changes in the potential of the FD. An imaging power supply line, image-display power supply line, a GND line, a common line, or the like whose potential is fixed, such as a common potential line, is used as a shielding wire.

Abstract: A semiconductor device with a small circuit area and low power consumption is provided. The semiconductor device includes first to fourth cells, a current mirror circuit, and first to fourth wirings, and the first to fourth cells each include a first transistor, a second transistor, and a capacitor. In each of the first to fourth cells, a first terminal of the first transistor is electrically connected to a first terminal of the capacitor and a gate of the second transistor. The first wiring is electrically connected to first terminals of the second transistors in the first cell and the second cell, the second wiring is electrically connected to first terminals of the second transistors in the third cell and the fourth cell, the third wiring is electrically connected to second terminals of the capacitors in the first cell and the third cell, and the fourth wiring is electrically connected to second terminals of the capacitors in the second cell and the fourth cell.

Abstract: A vertical-cavity surface-emitting laser includes a substrate having a main surface, a first lower distributed Bragg reflector that extends to an edge of the main surface, a III-V compound semiconductor layer disposed on the first lower distributed Bragg reflector, a second lower distributed Bragg reflector disposed on the III-V compound semiconductor layer, an active layer disposed above the second lower distributed Bragg reflector and an upper distributed Bragg reflector disposed on the active layer. The first lower distributed Bragg reflector includes a first layer and a second layer that are alternately arranged. The upper distributed Bragg reflector includes a third layer and a fourth layer that are alternately arranged. The III-V compound semiconductor layer is free of aluminum or has an aluminum composition less than an aluminum composition of the third layer. The first layer has an aluminum composition greater than the aluminum composition of the third layer.

Abstract: A photoelectric conversion device is provided. The device includes: a semiconductor layer having a photoelectric conversion element; a wiring structure; and contact plug that connect the semiconductor layer and a wiring pattern arranged in a wiring layer closest to the semiconductor layer among wiring layers included in the wiring structure. A light reflecting layer through which the contact plug penetrate is arranged between the wiring layer and the semiconductor layer, and the light reflecting layer has a periodic structure in which a first layer constituted by one of a dielectric and a semiconductor and a second layer constituted by one of a dielectric and a semiconductor that are different from the first layer are periodically stacked.

Abstract: A recording apparatus includes a recording unit including a recorder configured to perform recording on a medium, and a first side plate and a second side plate being a pair of side plates positioned across the recording unit, and configured to support the recording unit. An apparatus gravity center position is on a side close to the second side plate with respect to an intermediate position between the first side plate and the second side plate, and the number of components, of the recording unit, supported by the first side plate is smaller than the number of components, of the recording unit, supported by the second side plate.

Abstract: A memory device includes memory cells, first wirings extending along a first direction and connected to the cells, second wirings extending along a second direction and connected to the cells, the second direction intersecting the first direction, third wirings extending along a third direction and each connected to one or more second wirings, the third direction intersecting the first and second directions, sense circuits each connected to one or more third wirings, a switching circuit connected to the circuits and selectively outputting signals from the sense circuits, and a control circuit storing first addresses indicating second and third wirings connected to defective cells, and when a memory cell is selected, determining second addresses indicating second and third wirings connected to the selected cell, and based on the first and second addresses, controlling the switching circuit not to output signals from one or more sense circuits connected to the defective cells.

Abstract: A semiconductor device having a novel structure is provided. The semiconductor device includes a plurality of operation circuits that can switch different kinds of operation processing; a plurality of switch circuits that can switch a connection state between the operation circuits; and a controller. The operation circuit includes a first memory that stores data corresponding to a weight parameter used in the plurality of kinds of operation processing. The operation circuit executes a product-sum operation by switching weight data in accordance with a context. The switch circuit includes a second memory that stores data for switching a plurality of connection states in response to switching of a second context signal. The controller generates a second context signal on the basis of a first context signal. The amount of data stored in the second memory can be smaller than the amount of data stored in the first memory in the operation circuit.

Abstract: A printer includes a line head, a transport unit, a head moving unit, a maintenance unit, a lid unit, and a rotation mechanism portion. The head moving unit moves the line head to a retreat position and a recording position along a B direction. The maintenance unit includes a cap portion configured to cover the nozzles, is formed with an opening, and is movable in a transport direction of a medium. A lid unit is rotatable about a rotation axis, and closes the opening in a closed posture. When the head moving unit moves the line head from the recording position to the retreat position, the rotation mechanism portion rotates the lid unit so that a posture of the lid unit becomes the closed posture.

Abstract: A printer includes a line head, a transport unit, a head moving unit, a maintenance unit, a lid unit, and a rotation mechanism portion. The head moving unit moves the line head to a retreat position and a recording position along a B direction. The maintenance unit includes a cap portion configured to cover the nozzles, is formed with an opening, and is movable in a transport direction of a medium. A lid unit is rotatable about a rotation axis, and closes the opening in a closed posture. When the head moving unit moves the line head from the recording position to the retreat position, the rotation mechanism portion rotates the lid unit so that a posture of the lid unit becomes the closed posture.

Abstract: A main body frame of a multifunction machine has first and second frames of which surfaces parallel to a Z-axis face each other. A recording head is disposed between the first and the second frames and fixed to the main body frame. An ejection tray is fixed to the main body frame on a +Z direction with respect to the recording head. A scanner is fixed to the main body frame on the +Z direction with respect to the ejection tray and forms an ejection space with the ejection tray. The recording head performs recording on a medium which is being transported toward a first direction, which is an in-plane direction of the first frame. The ejection tray is configured to be removed toward a second direction, which is the in-plane direction of the first frame, in a state where the scanner is fixed to the main body frame.

Abstract: A method of producing a P-type nitride semiconductor includes, in order, applying an SOG solution containing group II atoms on a substrate made of a nitride semiconductor, baking the substrate to form an SOG film, diffusing the group II atoms into the substrate by subjecting the substrate to an annealing treatment under an inert gas atmosphere, and removing the SOG film from the substrate.

Abstract: A recording apparatus includes a support portion to transport a medium in a transport direction. A recording head includes an ejecting surface that faces the support portion and is provided with a nozzle to eject liquid to the medium to be transported. A cap portion covers the ejecting surface, and a movement mechanism moves the recording head in a moving direction which is orthogonal to the transport direction. A cap moving portion supports and moves the cap portion between a cap position where a cap surface of the cap portion covers the ejecting surface and a standby position where the cap surface does not cover the ejecting surface.

Abstract: An object is to provide a pixel structure of a display device including a photosensor which prevents changes in an output of the photosensor and a decrease in imaging quality. The display device has a pixel layout structure in which a shielding wire is disposed between an FD and an imaging signal line (a PR line, a TX line, or an SE line) or between the FD and an image-display signal line in order to reduce or eliminate parasitic capacitance between the FD and a signal line for the purpose of suppressing changes in the potential of the FD. An imaging power supply line, image-display power supply line, a GND line, a common line, or the like whose potential is fixed, such as a common potential line, is used as a shielding wire.

Abstract: A semiconductor device with a small circuit area and low power consumption is provided. The semiconductor device includes first to fourth cells, a current mirror circuit, and first to fourth wirings, and the first to fourth cells each include a first transistor, a second transistor, and a capacitor. In each of the first to fourth cells, a first terminal of the first transistor is electrically connected to a first terminal of the capacitor and a gate of the second transistor. The first wiring is electrically connected to first terminals of the second transistors in the first cell and the second cell, the second wiring is electrically connected to first terminals of the second transistors in the third cell and the fourth cell, the third wiring is electrically connected to second terminals of the capacitors in the first cell and the third cell, and the fourth wiring is electrically connected to second terminals of the capacitors in the second cell and the fourth cell.

Abstract: A semiconductor device using unipolar transistors, in which high and low levels are expressed using high and low power supply potentials, is provided. The semiconductor device includes four transistors, two capacitors, two wirings, two input terminals, and an output terminal. A source or a drain of the first transistor and a source or a drain of the fourth transistor are electrically connected to the first wiring. A gate of the fourth transistor is electrically connected to the first input terminal, and a gate of the second transistor is electrically connected to the second input terminal. A source or a drain of the second transistor and a source or a drain of the third transistor are electrically connected to the second wiring. The first transistor, the second transistor, and the two capacitors are electrically connected to the output terminal.

Abstract: A semiconductor device that has low power consumption and is capable of performing a product-sum operation is provided. The semiconductor device includes first and second cells, a first circuit, and first to third wirings. Each of the first and second cells includes a capacitor, and a first terminal of each of the capacitors is electrically connected to the third wiring. Each of the first and second cells has a function of feeding a current based on a potential held at a second terminal of the capacitor, to a corresponding one of the first and second wirings. The first circuit is electrically connected to the first and second wirings and stores currents I1 and I2 flowing through the first and second wirings. When the potential of the third wiring changes and accordingly the amount of current of the first wiring changes from I1 to I3 and the amount of current of the second wiring changes from I2 to I4, the first circuit generates a current with an amount I1?I2?I3+I4.